src/contrib/llvm, branch main

Move all sources from the llvm project into contrib/llvm-project.

2019-12-20T19:53:05+00:00

This uses the new layout of the upstream repository, which was recently
migrated to GitHub, and converted into a "monorepo".  That is, most of
the earlier separate sub-projects with their own branches and tags were
consolidated into one top-level directory, and are now branched and
tagged together.

Updating the vendor area to match this layout is next.

Merge commit 241cbf201 from llvm git (by Nemanja Ivanovic):

2019-12-04T18:38:50+00:00

  [PowerPC] Fix crash in peephole optimization

  When converting reg+reg shifts to reg+imm rotates, we neglect to
  consider the CodeGenOnly versions of the 32-bit shift mnemonics. This
  means we produce a rotate with missing operands which causes a crash.

  Committing this fix without review since it is non-controversial that
  the list of mnemonics to consider should include the 64-bit aliases
  for the exact mnemonics.

  Fixes PR44183.

This should fix "Assertion failed: (idx < size()), function operator[],
file /usr/src/contrib/llvm/include/llvm/ADT/SmallVector.h, line 153"
when building the graphics/mesa-dri port for the PowerPC64 ELFv2 ABI.

Reported by:	Alfredo Dal'Ava Júnior 
MFC after:      1 month
X-MFC-With:     r353358

Merge commit a751f557d from llvm git (by Simon Atanasyan):

2019-11-21T20:36:46+00:00

  [mips] Set macros for Octeon+ CPU

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit 0d14656b9 from llvm git (by Simon Atanasyan):

2019-11-21T20:35:53+00:00

  [mips] Set __OCTEON__ macros

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit e578d0fd2 from llvm git (by Simon Atanasyan):

2019-11-21T20:32:34+00:00

  [mips] Fix `__mips_isa_rev` macros value for Octeon CPU

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit 3552d3e0f from llvm git (by Simon Atanasyan):

2019-11-21T20:26:34+00:00

  [mips] Add `octeon+` to the list of CPUs accepted by the driver

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit bf996f761 from llvm git (by Simon Atanasyan):

2019-11-21T20:25:12+00:00

  [mips] Write `AFL_EXT_OCTEONP` flag to the `.MIPS.abiflags` section

  Differential Revision: https://reviews.llvm.org/D69851

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit 3718102d4 from llvm git (by Simon Atanasyan):

2019-11-21T20:23:35+00:00

  [mips] Support `octeon+` CPU in the `.set arch=` directive

  Differential Revision: https://reviews.llvm.org/D69850

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit 7bed381ea from llvm git (by Simon Atanasyan):

2019-11-21T20:22:07+00:00

  [mips] Implement Octeon+ `saa` and `saad` instructions

  `saa` and `saad` are 32-bit and 64-bit store atomic add instructions.

     memory[base] = memory[base] + rt

  These instructions are available for "Octeon+" CPU. The patch adds
  support for both instructions to MIPS assembler and diassembler and
  introduces new CPU type - "octeon+".

  Next patches will implement `.set arch=octeon+` directive and
  `AFL_EXT_OCTEONP` ISA extension flag support.

  Differential Revision: https://reviews.llvm.org/D69849

This is one of the upstream changes needed for adding support for the
OCTEON+ CPU type, so that we can test Clang builds using the most
commonly available FreeBSD/mips64 reference platform, the Edge Router
Lite.

Requested by:	kevans
MFC after:	1 month
X-MFC-With:	r353358

Merge commit 5bbb604bb from llvm git (by Craig Topper):

2019-11-15T06:56:25+00:00

  [InstCombine] Disable some portions of foldGEPICmp for GEPs that
  return a vector of pointers. Fix other portions.

  llvm-svn: 370114

This should fix instances of 'Assertion failed: (isa(Val) &&
"cast() argument of incompatible type!"), function cast, file
/usr/src/contrib/llvm/include/llvm/Support/Casting.h, line 255', when
building openjdk8 for aarch64 and armv7.

Reported by:	jbeich
PR:		236566
MFC after:	3 days