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<title>src/sys/dev/nctgpio, branch stable/13</title>
<subtitle>FreeBSD source tree</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/'/>
<entry>
<title>sys: Remove $FreeBSD$: two-line .h pattern</title>
<updated>2023-08-23T17:43:20+00:00</updated>
<author>
<name>Warner Losh</name>
<email>imp@FreeBSD.org</email>
</author>
<published>2023-08-22T01:31:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=f8167e0404dab9ffeaca95853dd237ab7c587f82'/>
<id>f8167e0404dab9ffeaca95853dd237ab7c587f82</id>
<content type='text'>
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

Similar commit in current:
(cherry picked from commit 95ee2897e98f)
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<pre>
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/

Similar commit in current:
(cherry picked from commit 95ee2897e98f)
</pre>
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</content>
</entry>
<entry>
<title>nctgpio: improve performance (latency) of operation</title>
<updated>2019-10-22T14:20:35+00:00</updated>
<author>
<name>Andriy Gapon</name>
<email>avg@FreeBSD.org</email>
</author>
<published>2019-10-22T14:20:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=155514eacf0efd907f1ce2d1fd961964968868b4'/>
<id>155514eacf0efd907f1ce2d1fd961964968868b4</id>
<content type='text'>
This change consists of two parts.

First, nctgpio now supports hardware access via an I/O port window if
it's configured by firmware.  For instance, PC Engines firmware
v4.10.0.2 does that.  This is faster than going through the Super I/O
configuration registers.

Second, nctgpio now caches values of bits that it controls.  For
example, the driver does not need to access the hardware to determine if
a pin is an output or an input, or a state of an output.  Also, the
driver makes use of the fact that the hardware preserves an output state
of a pin accross a switch to the input mode and back.

With this change I am able to use the 1-Wire bus over nctgpio whereas
previously the driver introduced too much latency to be compliant with
the relatively strict protocol timings.

superio0: &lt;Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)&gt; at port 0x2e-0x2f on isa0
gpio1: &lt;Nuvoton GPIO controller&gt; at GPIO ldn 0x07 on superio0
pcib0: allocated type 4 (0x220-0x226) for rid 0 of gpio1
gpiobus1: &lt;GPIO bus&gt; on gpio1
owc0: &lt;GPIO attached one-wire bus&gt; at pin 4 on gpiobus1
ow0: &lt;1 Wire Bus&gt; on owc0
ow0: romid 28:b2:9e:45:92:10:02:34: no driver
ow_temp0: &lt;Advanced One Wire Temperature&gt; romid 28:b2:9e:45:92:10:02:34 on ow0

MFC after:	4 weeks
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This change consists of two parts.

First, nctgpio now supports hardware access via an I/O port window if
it's configured by firmware.  For instance, PC Engines firmware
v4.10.0.2 does that.  This is faster than going through the Super I/O
configuration registers.

Second, nctgpio now caches values of bits that it controls.  For
example, the driver does not need to access the hardware to determine if
a pin is an output or an input, or a state of an output.  Also, the
driver makes use of the fact that the hardware preserves an output state
of a pin accross a switch to the input mode and back.

With this change I am able to use the 1-Wire bus over nctgpio whereas
previously the driver introduced too much latency to be compliant with
the relatively strict protocol timings.

superio0: &lt;Nuvoton NCT5104D/NCT6102D/NCT6106D (rev. B+)&gt; at port 0x2e-0x2f on isa0
gpio1: &lt;Nuvoton GPIO controller&gt; at GPIO ldn 0x07 on superio0
pcib0: allocated type 4 (0x220-0x226) for rid 0 of gpio1
gpiobus1: &lt;GPIO bus&gt; on gpio1
owc0: &lt;GPIO attached one-wire bus&gt; at pin 4 on gpiobus1
ow0: &lt;1 Wire Bus&gt; on owc0
ow0: romid 28:b2:9e:45:92:10:02:34: no driver
ow_temp0: &lt;Advanced One Wire Temperature&gt; romid 28:b2:9e:45:92:10:02:34 on ow0

MFC after:	4 weeks
</pre>
</div>
</content>
</entry>
<entry>
<title>move nctgpio to superio(4) bus</title>
<updated>2019-10-16T14:42:49+00:00</updated>
<author>
<name>Andriy Gapon</name>
<email>avg@FreeBSD.org</email>
</author>
<published>2019-10-16T14:42:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=e3df342a32debf2cc8bdc20582afd8adeec35775'/>
<id>e3df342a32debf2cc8bdc20582afd8adeec35775</id>
<content type='text'>
This is where it logically belongs.
The change allows to drop a bunch of low lewel code.

Reviewed by:	gonzo
MFC after:	19 days
Differential Revision: https://reviews.freebsd.org/D21980
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<pre>
This is where it logically belongs.
The change allows to drop a bunch of low lewel code.

Reviewed by:	gonzo
MFC after:	19 days
Differential Revision: https://reviews.freebsd.org/D21980
</pre>
</div>
</content>
</entry>
<entry>
<title>nctgpio: change default pin names to those used by the datasheet(s)</title>
<updated>2019-07-01T15:43:48+00:00</updated>
<author>
<name>Andriy Gapon</name>
<email>avg@FreeBSD.org</email>
</author>
<published>2019-07-01T15:43:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=02226256082badea2d76ff0b467c9cce3da47531'/>
<id>02226256082badea2d76ff0b467c9cce3da47531</id>
<content type='text'>
That is, instead of the current GPIO00 - GPIO15 the names will be GPIO00
- GPIO07, GPIO10 - GPIO17.  The first digit is a GPIO "bank" / group
number and the second one is a pin number within the bank.  Alternative
view is that the pin names are changed from decimal numbering scheme to
octal one (as there are 8 pins per bank).

Discussed with:	cem, gonzo
MFC after:	2 weeks
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<pre>
That is, instead of the current GPIO00 - GPIO15 the names will be GPIO00
- GPIO07, GPIO10 - GPIO17.  The first digit is a GPIO "bank" / group
number and the second one is a pin number within the bank.  Alternative
view is that the pin names are changed from decimal numbering scheme to
octal one (as there are 8 pins per bank).

Discussed with:	cem, gonzo
MFC after:	2 weeks
</pre>
</div>
</content>
</entry>
<entry>
<title>nctgpio: add new device id for the GPIO chip in PCEngines APU3</title>
<updated>2018-01-02T20:58:05+00:00</updated>
<author>
<name>Oleksandr Tymoshenko</name>
<email>gonzo@FreeBSD.org</email>
</author>
<published>2018-01-02T20:58:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=9d1208bbd27ed9c7b3fd10247e48e5df70d9cbda'/>
<id>9d1208bbd27ed9c7b3fd10247e48e5df70d9cbda</id>
<content type='text'>
PR:		224512
Submitted by:	mike@sentex.net
MFC after:	2 weeks
</content>
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<pre>
PR:		224512
Submitted by:	mike@sentex.net
MFC after:	2 weeks
</pre>
</div>
</content>
</entry>
<entry>
<title>nctgpio(4): Don't index past the end of sc-&gt;pins array</title>
<updated>2016-04-20T01:17:18+00:00</updated>
<author>
<name>Conrad Meyer</name>
<email>cem@FreeBSD.org</email>
</author>
<published>2016-04-20T01:17:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=523af57ea24624de9430a0bf980b515ba7148b53'/>
<id>523af57ea24624de9430a0bf980b515ba7148b53</id>
<content type='text'>
This driver thinks that the NCT_MAX_PIN index is a valid index in a few places
(nct_attach() for-loop, as well as NCT_IS_VALID_PIN()).  Allocate room for
NCT_MAX_PIN as an index, that is, NCT_MAX_PIN + 1 elements.

Reported by:	Coverity
CIDs:		1353806, 1353807, 1353808, 1353809, 1353810
Sponsored by:	EMC / Isilon Storage Division
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<pre>
This driver thinks that the NCT_MAX_PIN index is a valid index in a few places
(nct_attach() for-loop, as well as NCT_IS_VALID_PIN()).  Allocate room for
NCT_MAX_PIN as an index, that is, NCT_MAX_PIN + 1 elements.

Reported by:	Coverity
CIDs:		1353806, 1353807, 1353808, 1353809, 1353810
Sponsored by:	EMC / Isilon Storage Division
</pre>
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</content>
</entry>
<entry>
<title>sys/dev: use our nitems() macro when it is avaliable through param.h.</title>
<updated>2016-04-19T23:37:24+00:00</updated>
<author>
<name>Pedro F. Giffuni</name>
<email>pfg@FreeBSD.org</email>
</author>
<published>2016-04-19T23:37:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=73a1170a8c41cb848f17cc0a8839e9dcee3d126e'/>
<id>73a1170a8c41cb848f17cc0a8839e9dcee3d126e</id>
<content type='text'>
No functional change, only trivial cases are done in this sweep,
Drivers that can get further enhancements will be done independently.

Discussed in:	freebsd-current
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<pre>
No functional change, only trivial cases are done in this sweep,
Drivers that can get further enhancements will be done independently.

Discussed in:	freebsd-current
</pre>
</div>
</content>
</entry>
<entry>
<title>Add support for the Nuvoton NCT5104D.</title>
<updated>2016-03-31T04:57:38+00:00</updated>
<author>
<name>Adrian Chadd</name>
<email>adrian@FreeBSD.org</email>
</author>
<published>2016-03-31T04:57:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=6b7b2d80ed4d728d3ffd12c422e57798c1b63a84'/>
<id>6b7b2d80ed4d728d3ffd12c422e57798c1b63a84</id>
<content type='text'>
Make it compile only for i386/amd64 for now as it's been tested there.
It's quite possible it'll show up elsewhere and we can enable it
for other architectures later.

Tested:

* PC Engines APU1C4

Submitted by:	Daniel Wyatt &lt;daniel@dewyatt.com&gt;
Reviewed by:	adrian, loos
Differential Revision:	https://reviews.freebsd.org/D5389
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<pre>
Make it compile only for i386/amd64 for now as it's been tested there.
It's quite possible it'll show up elsewhere and we can enable it
for other architectures later.

Tested:

* PC Engines APU1C4

Submitted by:	Daniel Wyatt &lt;daniel@dewyatt.com&gt;
Reviewed by:	adrian, loos
Differential Revision:	https://reviews.freebsd.org/D5389
</pre>
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