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<title>src/sys/dev/re, branch stable/10</title>
<subtitle>FreeBSD source tree</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/'/>
<entry>
<title>MFC: r287768, r290566, r290946</title>
<updated>2015-12-27T17:34:18+00:00</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2015-12-27T17:34:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=28b0a2c29c7d11f8d753f808925c4cfc6635d44f'/>
<id>28b0a2c29c7d11f8d753f808925c4cfc6635d44f</id>
<content type='text'>
- Although it doesn't make a whole lot of sense to enable RX and TX
  before their initial configuration is done, it turns out that r281337
  (MFCed to stable/10 in r285177) has the inverse effect on some older
  chips. Moreover, as with newer chips before, two chips seemingly
  identical according to their MAC revisions may behave differently in
  this regard, with most working but a few not, making changes extremely
  hard to test.
  Closer inspection of the corresponding Linux code suggests that RX
  and TX should only be enabled after their initial configuration with
  RTL8168G and later chips, i. e. RTL8106E{,US}, RTL8107E, as well as
  RTL8168{EP,G,GU,H}, so limit the new code path to these. [1]
- Distinguish between RTL8168H and RTL8107E, with the latter being the
  10/100-Mbit/s-only variant of the former.
- For MAC variants that can only do Fast Ethernet at a maximum, ensure
  that we don't advertise Gigabit Ethernet speed.
- In re_stop(), do the inverse of re_init_locked() and enable RXDV gate
  on RTL8168G and later chips again, matching what Linux does.
- With the latter in place, it turns out that WOL previously only worked
  by accident with RTL8168G and later chips when the interface actually
  was brought up. This is due to the fact that with these MAC variants,
  RXDV gate needs be disabled for WOL to work. So in re_setwol() do just
  that when IFCAP_WOL is requested.
- Add preliminary support for RTL8168H and RTL8107E, with the latter
  being the 10/100-Mbit/s-only variant of the former.
</content>
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<pre>
- Although it doesn't make a whole lot of sense to enable RX and TX
  before their initial configuration is done, it turns out that r281337
  (MFCed to stable/10 in r285177) has the inverse effect on some older
  chips. Moreover, as with newer chips before, two chips seemingly
  identical according to their MAC revisions may behave differently in
  this regard, with most working but a few not, making changes extremely
  hard to test.
  Closer inspection of the corresponding Linux code suggests that RX
  and TX should only be enabled after their initial configuration with
  RTL8168G and later chips, i. e. RTL8106E{,US}, RTL8107E, as well as
  RTL8168{EP,G,GU,H}, so limit the new code path to these. [1]
- Distinguish between RTL8168H and RTL8107E, with the latter being the
  10/100-Mbit/s-only variant of the former.
- For MAC variants that can only do Fast Ethernet at a maximum, ensure
  that we don't advertise Gigabit Ethernet speed.
- In re_stop(), do the inverse of re_init_locked() and enable RXDV gate
  on RTL8168G and later chips again, matching what Linux does.
- With the latter in place, it turns out that WOL previously only worked
  by accident with RTL8168G and later chips when the interface actually
  was brought up. This is due to the fact that with these MAC variants,
  RXDV gate needs be disabled for WOL to work. So in re_setwol() do just
  that when IFCAP_WOL is requested.
- Add preliminary support for RTL8168H and RTL8107E, with the latter
  being the 10/100-Mbit/s-only variant of the former.
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC: r271864</title>
<updated>2015-12-27T17:12:54+00:00</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2015-12-27T17:12:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=ad51f8c5349278d1d6a5cb464dcbd3765f311ee8'/>
<id>ad51f8c5349278d1d6a5cb464dcbd3765f311ee8</id>
<content type='text'>
Move rl(4) to dev/rl.
</content>
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<pre>
Move rl(4) to dev/rl.
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC: r281337</title>
<updated>2015-07-05T20:16:38+00:00</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2015-07-05T20:16:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=39093c87fa49af6d13a5184872503523720a5be2'/>
<id>39093c87fa49af6d13a5184872503523720a5be2</id>
<content type='text'>
Don't enable RX and TX before their initial configuration is done, i. e.
after setting up interrupt moderation but before turning interrupts on.
This matches what Realtek's r8168 Linux driver does as of version 8.039.00
and fixes problems with certain incarnations of certain MAC revisions
like the interface requiring an extra up/down-cycle after boot to start
working or DMA configuration not being adhered to.

PR:		193743, 197535
Approved by:	re (kib)
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<pre>
Don't enable RX and TX before their initial configuration is done, i. e.
after setting up interrupt moderation but before turning interrupts on.
This matches what Realtek's r8168 Linux driver does as of version 8.039.00
and fixes problems with certain incarnations of certain MAC revisions
like the interface requiring an extra up/down-cycle after boot to start
working or DMA configuration not being adhered to.

PR:		193743, 197535
Approved by:	re (kib)
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC r273359:</title>
<updated>2014-10-28T00:43:00+00:00</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2014-10-28T00:43:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=8eaf06ca019aa10d02b85ed772d50cf456ae493d'/>
<id>8eaf06ca019aa10d02b85ed772d50cf456ae493d</id>
<content type='text'>
  It seems multicast filtering of RTL8168F does not work.  Workaround
  the silicon bug by accepting any multicast packets.

  PR:	193488
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<pre>
  It seems multicast filtering of RTL8168F does not work.  Workaround
  the silicon bug by accepting any multicast packets.

  PR:	193488
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC r265943:</title>
<updated>2014-05-16T05:10:16+00:00</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2014-05-16T05:10:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=6f717f8f63792c28ad09c70383bb2d600eabd23b'/>
<id>6f717f8f63792c28ad09c70383bb2d600eabd23b</id>
<content type='text'>
  Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
  Previously only TX IP checksum offloading was disabled but it's
  reported that TX checksum offloading for UDP datagrams with IP
  options also generates corrupted frames.  Reporter's controller is
  RTL8168CP but I guess RTL8168C also have the same issue since it
  shall share the same core.
</content>
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<pre>
  Disable TX IP/TCP/UDP checksum offloading for RTL8168C/RTL8168CP.
  Previously only TX IP checksum offloading was disabled but it's
  reported that TX checksum offloading for UDP datagrams with IP
  options also generates corrupted frames.  Reporter's controller is
  RTL8168CP but I guess RTL8168C also have the same issue since it
  shall share the same core.
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC: r261531</title>
<updated>2014-02-23T21:08:41+00:00</updated>
<author>
<name>Marius Strobl</name>
<email>marius@FreeBSD.org</email>
</author>
<published>2014-02-23T21:08:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=f102fe7b6510d7437efc980a48325e0e5ae55c51'/>
<id>f102fe7b6510d7437efc980a48325e0e5ae55c51</id>
<content type='text'>
- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
  driver as iof version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8411B.
  This makes reception of packets work with the RTL8168G (HW rev. 0x4c000000)
  in my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with:	yongari
</content>
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<pre>
- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux
  driver as iof version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8411B.
  This makes reception of packets work with the RTL8168G (HW rev. 0x4c000000)
  in my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with:	yongari
</pre>
</div>
</content>
</entry>
<entry>
<title>MFH: sync the netmap code with the one in HEAD</title>
<updated>2014-02-18T05:01:04+00:00</updated>
<author>
<name>Luigi Rizzo</name>
<email>luigi@FreeBSD.org</email>
</author>
<published>2014-02-18T05:01:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=2d47b4a1972fddbb8a4c9e26afbf09e373c6ba19'/>
<id>2d47b4a1972fddbb8a4c9e26afbf09e373c6ba19</id>
<content type='text'>
(enhanced VALE switch, netmap pipes, emulated netmap mode).
See details in the log for svn 261909.
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<pre>
(enhanced VALE switch, netmap pipes, emulated netmap mode).
See details in the log for svn 261909.
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC r257306:</title>
<updated>2013-11-04T05:58:59+00:00</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2013-11-04T05:58:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=e2d6c2d7008048a8a449d75bfe2fe95abf791c32'/>
<id>e2d6c2d7008048a8a449d75bfe2fe95abf791c32</id>
<content type='text'>
  Add preliminary support for RTL8168EP.
Approved by:	re (delphij)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  Add preliminary support for RTL8168EP.
Approved by:	re (delphij)
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC r257305:</title>
<updated>2013-11-04T05:56:02+00:00</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2013-11-04T05:56:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=4f69543ab0799aba9f1e489525f8f7b419280def'/>
<id>4f69543ab0799aba9f1e489525f8f7b419280def</id>
<content type='text'>
  Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
  RTL8168GU has two variants(GMII and MII) but it uses the same chip
  revision id.  Driver checks PCI device id of controller and
  sets internal capability flag(i.e. jumbo frame and link speed down
  in WOL).
Approved by:	re (delphij)
</content>
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<pre>
  Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.
  RTL8168GU has two variants(GMII and MII) but it uses the same chip
  revision id.  Driver checks PCI device id of controller and
  sets internal capability flag(i.e. jumbo frame and link speed down
  in WOL).
Approved by:	re (delphij)
</pre>
</div>
</content>
</entry>
<entry>
<title>MFC r256828:</title>
<updated>2013-11-04T05:48:12+00:00</updated>
<author>
<name>Pyun YongHyeon</name>
<email>yongari@FreeBSD.org</email>
</author>
<published>2013-11-04T05:48:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.freebsd.org/src/commit/?id=7c1f011b8174aa4f6f0c21100d45a30c61698572'/>
<id>7c1f011b8174aa4f6f0c21100d45a30c61698572</id>
<content type='text'>
  Add preliminary support for RTL8106E PCIe FastEthernet.
Approved by:	re (delphij)
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
  Add preliminary support for RTL8106E PCIe FastEthernet.
Approved by:	re (delphij)
</pre>
</div>
</content>
</entry>
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