src/sys/pci, branch main

Move all the power management (SMBus) drivers to their own directory,

2014-09-23T06:31:15+00:00

away from sys/pci.

Move amdsmb and nfsmb from dev/pci to their own device directory.

2014-09-23T05:54:18+00:00

Move pci/ncr to dev/ncr.

2014-09-23T05:37:17+00:00

Move rl(4) to dev/rl.

2014-09-19T10:32:20+00:00

Fix various NIC drivers to properly cleanup static DMA resources.

2014-06-11T14:53:58+00:00

In particular, don't check the value of the bus_dma map against NULL
to determine if either bus_dmamem_alloc() or bus_dmamap_load() succeeded.
Instead, assume that bus_dmamap_load() succeeeded (and thus that
bus_dmamap_unload() should be called) if the bus address for a resource
is non-zero, and assume that bus_dmamem_alloc() succeeded (and thus
that bus_dmamem_free() should be called) if the virtual address for a
resource is not NULL.

In many cases these bugs could result in leaks when a driver was detached.

Reviewed by:	yongari
MFC after:	2 weeks

Increase the number of TX DMA segments from 32 to 35. It turned

2014-03-31T01:54:59+00:00

out 32 is not enough to support a full sized TSO packet.
While I'm here fix a long standing bug introduced in r169632 in
bce(4) where it didn't include L2 header length of TSO packet in
the maximum DMA segment size calculation.

In collaboration with:	rmacklem
MFC after:		2 weeks

- Implement the RX EARLYOFF and RXDV GATED bits as done by RealTek's Linux

2014-02-05T23:13:40+00:00

  driver as version 8.037.00 for RTL8168{E-VL,EP,F,G,GU} and RTL8111B. This
  makes reception of packets work with the RTL8168G (HW rev. 0x4c000000) in
  my Shuttle DS47.
- Consistently use RL_MSI_MESSAGES.
In joint forces with:	yongari

MFC after:	5 days

Try to make the style used here consistent.

2014-02-05T22:27:49+00:00

Add preliminary support for RTL8168EP.

2013-10-29T05:37:05+00:00

Submitted by:	Edward O'Callaghan (eocallaghan <> alterapraxis dot com)

Add preliminary support for RTL8168G, RTL8168GU and RTL8411B.

2013-10-29T05:30:21+00:00

RTL8168GU has two variants(GMII and MII) but it uses the same chip
revision id.  Driver checks PCI device id of controller and
sets internal capability flag(i.e. jumbo frame and link speed down
in WOL).

H/W donated by:	RealTek Semiconductor Corp.