ath: clean up empty lines in .c and .h files

99 files changed, 83 insertions, 197 deletions

diff --git a/sys/dev/ath/ah_osdep.c b/sys/dev/ath/ah_osdep.c
index b141d7d66006..44878486a0c7 100644
--- a/sys/dev/ath/ah_osdep.c
+++ b/sys/dev/ath/ah_osdep.c
@@ -447,7 +447,6 @@ ath_hal_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ah_osdep_ar5210.c b/sys/dev/ath/ah_osdep_ar5210.c
index 905befe9ca95..e47a2dc11054 100644
--- a/sys/dev/ath/ah_osdep_ar5210.c
+++ b/sys/dev/ath/ah_osdep_ar5210.c
@@ -64,7 +64,6 @@ ath_hal_ar5210_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ah_osdep_ar5211.c b/sys/dev/ath/ah_osdep_ar5211.c
index 92400965e55b..c87f9ff9b0cb 100644
--- a/sys/dev/ath/ah_osdep_ar5211.c
+++ b/sys/dev/ath/ah_osdep_ar5211.c
@@ -64,7 +64,6 @@ ath_hal_ar5211_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ah_osdep_ar5212.c b/sys/dev/ath/ah_osdep_ar5212.c
index 3bc21ef803ec..daaa81ff2509 100644
--- a/sys/dev/ath/ah_osdep_ar5212.c
+++ b/sys/dev/ath/ah_osdep_ar5212.c
@@ -85,7 +85,6 @@ ath_hal_ar5212_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ah_osdep_ar5416.c b/sys/dev/ath/ah_osdep_ar5416.c
index a735838068b6..058027b44c8f 100644
--- a/sys/dev/ath/ah_osdep_ar5416.c
+++ b/sys/dev/ath/ah_osdep_ar5416.c
@@ -92,7 +92,6 @@ ath_hal_ar5416_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ah_osdep_ar9300.c b/sys/dev/ath/ah_osdep_ar9300.c
index f481d7ea2a2d..70dbfc2c3d39 100644
--- a/sys/dev/ath/ah_osdep_ar9300.c
+++ b/sys/dev/ath/ah_osdep_ar9300.c
@@ -64,7 +64,6 @@ ath_hal_ar9300_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/ath_dfs/null/dfs_null.c b/sys/dev/ath/ath_dfs/null/dfs_null.c
index 1463c8c96648..2c262d1c9ef5 100644
--- a/sys/dev/ath/ath_dfs/null/dfs_null.c
+++ b/sys/dev/ath/ath_dfs/null/dfs_null.c
@@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_media.h>
diff --git a/sys/dev/ath/ath_hal/ah.c b/sys/dev/ath/ath_hal/ah.c
index 9d80c4f1e109..e2305d10b452 100644
--- a/sys/dev/ath/ath_hal/ah.c
+++ b/sys/dev/ath/ath_hal/ah.c
@@ -556,7 +556,6 @@ ath_hal_get_curmode(struct ath_hal *ah, const struct ieee80211_channel *chan)
 	return HAL_MODE_11NG_HT20;
 }
 
-
 typedef enum {
 	WIRELESS_MODE_11a   = 0,
 	WIRELESS_MODE_TURBO = 1,
@@ -971,7 +970,7 @@ ath_hal_getregdump(struct ath_hal *ah, const HAL_REGRANGE *regs,
 	}
 	return (char *) dp - (char *) dstbuf;
 }
- 
+
 static void
 ath_hal_setregs(struct ath_hal *ah, const HAL_REGWRITE *regs, int space)
 {
diff --git a/sys/dev/ath/ath_hal/ah.h b/sys/dev/ath/ath_hal/ah.h
index 412754bc7c2e..e39ff2b7d03d 100644
--- a/sys/dev/ath/ath_hal/ah.h
+++ b/sys/dev/ath/ath_hal/ah.h
@@ -739,7 +739,6 @@ typedef enum {
 	HAL_HT_EXTPROTSPACING_25 = 1,	/* 25 MHz spacing */
 } HAL_HT_EXTPROTSPACING;
 
-
 typedef enum {
 	HAL_RX_CLEAR_CTL_LOW	= 0x1,	/* force control channel to appear busy */
 	HAL_RX_CLEAR_EXT_LOW	= 0x2,	/* force extension channel to appear busy */
@@ -1053,7 +1052,6 @@ typedef enum {
 	HAL_DFS_MKK4_DOMAIN	= 3,	/* Japan dfs domain */
 } HAL_DFS_DOMAIN;
 
-
 /*
  * MFP decryption options for initializing the MAC.
  */
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_9287.c b/sys/dev/ath/ath_hal/ah_eeprom_9287.c
index 974580d26394..42b3ff8b3252 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_9287.c
+++ b/sys/dev/ath/ath_hal/ah_eeprom_9287.c
@@ -207,11 +207,11 @@ static uint16_t
 v9287EepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
 { 
 	HAL_EEPROM_9287 *ee = AH_PRIVATE(ah)->ah_eeprom;
-	
+
 	HALASSERT(is2GHz == AH_TRUE);
 	if (is2GHz != AH_TRUE)
 		return 0;	/* XXX ? */
-	
+
 	HALASSERT(0 <= ix && ix <  AR5416_EEPROM_MODAL_SPURS);
 	return ee->ee_base.modalHeader.spurChans[ix].spurChan;
 }
@@ -234,7 +234,6 @@ fbin2freq(uint8_t fbin, HAL_BOOL is2GHz)
 	return (uint16_t)((is2GHz) ? (2300 + fbin) : (4800 + 5 * fbin));
 }
 
-
 /*
  * Copy EEPROM Conformance Testing Limits contents 
  * into the allocated space
@@ -247,7 +246,7 @@ v9287EepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_9287 *ee)
 {
 	RD_EDGES_POWER *rep = ee->ee_rdEdgesPower;
 	int i, j;
-	
+
 	HALASSERT(AR9287_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
 
 	for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR9287_NUM_CTLS; i++) {
@@ -359,7 +358,7 @@ ath_hal_9287EepromAttach(struct ath_hal *ah)
 		len = ee->ee_base.baseEepHeader.length;
 	}
 	len = AH_MIN(len, sizeof(HAL_EEPROM_9287)) / sizeof(uint16_t);
-	
+
 	/* Apply the checksum, done in native eeprom format */
 	/* XXX - Need to check to make sure checksum calculation is done
 	 * in the correct endian format.  Right now, it seems it would
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_9287.h b/sys/dev/ath/ath_hal/ah_eeprom_9287.h
index 891b4841b153..6d15a6df0204 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_9287.h
+++ b/sys/dev/ath/ath_hal/ah_eeprom_9287.h
@@ -166,5 +166,4 @@ typedef struct {
 typedef struct modal_eep_ar9287_header MODAL_EEP_9287_HEADER;
 typedef struct base_eep_ar9287_header BASE_EEP_9287_HEADER;
 
-
 #endif /* __AH_EEPROM_9287_H__ */
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_v14.c b/sys/dev/ath/ath_hal/ah_eeprom_v14.c
index 3ae81217327d..d8bb96d56b28 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_v14.c
+++ b/sys/dev/ath/ath_hal/ah_eeprom_v14.c
@@ -249,7 +249,7 @@ static uint16_t
 v14EepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
 { 
 	HAL_EEPROM_v14 *ee = AH_PRIVATE(ah)->ah_eeprom;
-	
+
 	HALASSERT(0 <= ix && ix <  AR5416_EEPROM_MODAL_SPURS);
 	return ee->ee_base.modalHeader[is2GHz].spurChans[ix].spurChan;
 }
@@ -284,7 +284,7 @@ v14EepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_v14 *ee)
 {
 	RD_EDGES_POWER *rep = ee->ee_rdEdgesPower;
 	int i, j;
-	
+
 	HALASSERT(AR5416_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
 
 	for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR5416_NUM_CTLS; i++) {
@@ -342,7 +342,7 @@ ath_hal_v14EepromAttach(struct ath_hal *ah)
 	uint32_t sum;
 
 	HALASSERT(ee == AH_NULL);
- 
+
 	/*
 	 * Don't check magic if we're supplied with an EEPROM block,
 	 * typically this is from Howl but it may also be from later
@@ -398,7 +398,7 @@ ath_hal_v14EepromAttach(struct ath_hal *ah)
 		len = ee->ee_base.baseEepHeader.length;
 	}
 	len = AH_MIN(len, sizeof(struct ar5416eeprom)) / sizeof(uint16_t);
-	
+
 	/* Apply the checksum, done in native eeprom format */
 	/* XXX - Need to check to make sure checksum calculation is done
 	 * in the correct endian format.  Right now, it seems it would
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_v3.c b/sys/dev/ath/ath_hal/ah_eeprom_v3.c
index 9d7d011fcd65..2f1b2940de47 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_v3.c
+++ b/sys/dev/ath/ath_hal/ah_eeprom_v3.c
@@ -739,14 +739,14 @@ readEepromRawPowerCalInfo2413(struct ath_hal *ah, HAL_EEPROM *ee)
 	int numEEPROMWordsPerChannel;
 	uint32_t off;
 	HAL_BOOL ret = AH_FALSE;
-	
+
 	HALASSERT(ee->ee_version >= AR_EEPROM_VER5_0);
 	HALASSERT(ee->ee_eepMap == 2);
-	
+
 	pCal = ath_hal_malloc(sizeof(EEPROM_DATA_STRUCT_2413));
 	if (pCal == AH_NULL)
 		goto exit;
-	
+
 	off = ee->ee_eepMap2PowerCalStart;
 	if (ee->ee_Amode) {
 		OS_MEMZERO(pCal, sizeof(EEPROM_DATA_STRUCT_2413));
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_v3.h b/sys/dev/ath/ath_hal/ah_eeprom_v3.h
index 2ec54713b261..be71a2486fde 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_v3.h
+++ b/sys/dev/ath/ath_hal/ah_eeprom_v3.h
@@ -231,7 +231,6 @@ typedef struct cornerCalInfo {
 #define NUM_TARGET_POWER_LOCATIONS_11B  4
 #define NUM_TARGET_POWER_LOCATIONS_11G  6
 
-
 typedef struct {
 	uint16_t	xpd_gain;
 	uint16_t	numPcdacs;
diff --git a/sys/dev/ath/ath_hal/ah_eeprom_v4k.c b/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
index 69142ded5447..a9d16100d917 100644
--- a/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
+++ b/sys/dev/ath/ath_hal/ah_eeprom_v4k.c
@@ -200,7 +200,7 @@ static uint16_t
 v4kEepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
 { 
 	HAL_EEPROM_v4k *ee = AH_PRIVATE(ah)->ah_eeprom;
-	
+
 	HALASSERT(0 <= ix && ix <  AR5416_EEPROM_MODAL_SPURS);
 	HALASSERT(is2GHz);
 	return ee->ee_base.modalHeader.spurChans[ix].spurChan;
@@ -236,7 +236,7 @@ v4kEepromReadCTLInfo(struct ath_hal *ah, HAL_EEPROM_v4k *ee)
 {
 	RD_EDGES_POWER *rep = ee->ee_rdEdgesPower;
 	int i, j;
-	
+
 	HALASSERT(AR5416_4K_NUM_CTLS <= sizeof(ee->ee_rdEdgesPower)/NUM_EDGES);
 
 	for (i = 0; ee->ee_base.ctlIndex[i] != 0 && i < AR5416_4K_NUM_CTLS; i++) {
@@ -347,7 +347,7 @@ ath_hal_v4kEepromAttach(struct ath_hal *ah)
 		len = ee->ee_base.baseEepHeader.length;
 	}
 	len = AH_MIN(len, sizeof(struct ar5416eeprom_4k)) / sizeof(uint16_t);
-	
+
 	/* Apply the checksum, done in native eeprom format */
 	/* XXX - Need to check to make sure checksum calculation is done
 	 * in the correct endian format.  Right now, it seems it would
diff --git a/sys/dev/ath/ath_hal/ah_internal.h b/sys/dev/ath/ath_hal/ah_internal.h
index 6b584c2454b3..87c67d73ddca 100644
--- a/sys/dev/ath/ath_hal/ah_internal.h
+++ b/sys/dev/ath/ath_hal/ah_internal.h
@@ -849,7 +849,6 @@ typedef struct {
 	uint16_t	ee_data;	/* write data */
 } HAL_DIAG_EEVAL;
 
-
 typedef struct {
 	u_int offset;		/* reg offset */
 	uint32_t val;		/* reg value  */
diff --git a/sys/dev/ath/ath_hal/ah_regdomain.c b/sys/dev/ath/ath_hal/ah_regdomain.c
index 2901b6960382..c0ae4a94a4c6 100644
--- a/sys/dev/ath/ath_hal/ah_regdomain.c
+++ b/sys/dev/ath/ath_hal/ah_regdomain.c
@@ -953,7 +953,6 @@ ath_hal_getctl(struct ath_hal *ah, const struct ieee80211_channel *c)
 	return ctl;
 }
 
-
 /*
  * Update the current dfsDomain setting based on the given
  * country code.
@@ -979,7 +978,6 @@ ath_hal_update_dfsdomain(struct ath_hal *ah)
 	    __func__, AH_PRIVATE(ah)->ah_dfsDomain);
 }
 
-
 /*
  * Return the max allowed antenna gain and apply any regulatory
  * domain specific changes.
diff --git a/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_domains.h b/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_domains.h
index 6555147b4e60..5956a804b03a 100644
--- a/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_domains.h
+++ b/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_domains.h
@@ -64,7 +64,6 @@
 	  W1(_fg) | W1(_fh) | W1(_fi) }
 
 static REG_DOMAIN regDomains[] = {
-
 	{.regDmnEnum		= DEBUG_REG_DMN,
 	 .conformanceTestLimit	= FCC,
 	 .dfsMask		= DFS_FCC3,
diff --git a/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_freqbands.h b/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_freqbands.h
index c7169113c11b..5475c6508972 100644
--- a/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_freqbands.h
+++ b/sys/dev/ath/ath_hal/ah_regdomain/ah_rd_freqbands.h
@@ -198,7 +198,6 @@ static REG_DMN_FREQ_BAND regDmn5GhzFreq[] = {
 #define	W2_5825_5825	AFTER(W2_5180_5240)
 };
 
-
 /*
  * 5GHz Turbo (dynamic & static) tags
  */
@@ -373,7 +372,7 @@ static REG_DMN_FREQ_BAND regDmn2Ghz11gFreq[] = {
 #define	G3_2412_2462	AFTER(G2_2412_2462)
 	{ 2412, 2462, 27, 6,  5, 5, NO_DFS, NO_PSCAN },
 #define	G4_2412_2462	AFTER(G3_2412_2462)
-	
+
 	{ 2432, 2442, 20, 0, 20, 5, NO_DFS, NO_PSCAN },
 #define	G1_2432_2442	AFTER(G4_2412_2462)
 
diff --git a/sys/dev/ath/ath_hal/ah_soc.h b/sys/dev/ath/ath_hal/ah_soc.h
index 3d77b8234857..e391a2c869e8 100644
--- a/sys/dev/ath/ath_hal/ah_soc.h
+++ b/sys/dev/ath/ath_hal/ah_soc.h
@@ -62,18 +62,18 @@ struct ar531x_boarddata {
 #define BD_WLAN1_5G_EN  0x00040000   /* FLAG for radio0_2G */
 	uint16_t resetConfigGpio;   /* Reset factory GPIO pin */
 	uint16_t sysLedGpio;        /* System LED GPIO pin */
-	
+
 	uint32_t cpuFreq;           /* CPU core frequency in Hz */
 	uint32_t sysFreq;           /* System frequency in Hz */
 	uint32_t cntFreq;           /* Calculated C0_COUNT frequency */
-	
+
 	uint8_t  wlan0Mac[6];
 	uint8_t  enet0Mac[6];
 	uint8_t  enet1Mac[6];
-	
+
 	uint16_t pciId;             /* Pseudo PCIID for common code */
 	uint16_t memCap;            /* cap bank1 in MB */
-	
+
 	/* version 3 */
 	uint8_t  wlan1Mac[6];       /* (ar5212) */
 };
diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_recv.c b/sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
index 1077886b7d01..a11e0300721f 100644
--- a/sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
+++ b/sys/dev/ath/ath_hal/ar5210/ar5210_recv.c
@@ -50,7 +50,6 @@ ar5210SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE qtype)
 	OS_REG_WRITE(ah, AR_RXDP, rxdp);
 }
 
-
 /*
  * Set Receive Enable bits.
  */
diff --git a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
index b5656fb36419..bf1b9683a2cc 100644
--- a/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
+++ b/sys/dev/ath/ath_hal/ar5210/ar5210_reset.c
@@ -611,7 +611,6 @@ ar5210SetResetReg(struct ath_hal *ah, uint32_t resetMask, u_int delay)
 	return rt;
 }
 
-
 /*
  * Returns: the pcdac value
  */
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c b/sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
index 8d703023edb3..7a8ed460ff80 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_keycache.c
@@ -163,7 +163,6 @@ ar5211SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry,
 	if (k->kv_len <= 104 / NBBY)
 		key4 &= 0xff;
 
-
 	/*
 	 * Note: WEP key cache hardware requires that each double-word
 	 * pair be written in even/odd order (since the destination is
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
index 4395818ab2bd..ea1327b11a6a 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_misc.c
@@ -708,7 +708,6 @@ ar5211Get11nExtBusy(struct ath_hal *ah)
 	return (0);
 }
 
-
 /*
  * There's no channel survey support for the AR5211.
  */
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_phy.c b/sys/dev/ath/ath_hal/ar5211/ar5211_phy.c
index 6507c879ed92..42d9665396a1 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_phy.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_phy.c
@@ -81,7 +81,6 @@ HAL_RATE_TABLE ar5211_11b_table = {
 #undef	CCK
 #undef	TURBO
 
-
 const HAL_RATE_TABLE *
 ar5211GetRateTable(struct ath_hal *ah, u_int mode)
 {
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_recv.c b/sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
index 09462b546a95..1922f8775d54 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_recv.c
@@ -51,7 +51,6 @@ ar5211SetRxDP(struct ath_hal *ah, uint32_t rxdp, HAL_RX_QUEUE qtype)
 	HALASSERT(OS_REG_READ(ah, AR_RXDP) == rxdp);
 }
 
-
 /*
  * Set Receive Enable bits.
  */
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c b/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c
index 4bcb8fd6497a..9b32c4de496e 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211_xmit.c
@@ -193,7 +193,6 @@ setTxQInterrupts(struct ath_hal *ah, HAL_TX_QUEUE_INFO *qi)
 		AR_IMR_S2_QCU_TXURN, ahp->ah_txUrnInterruptMask);
 }
 
-
 /*
  * Free a tx DCU/QCU combination.
  */
@@ -677,7 +676,6 @@ ar5211GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *ds0, int *
 	return AH_FALSE;
 }
 
-
 void
 ar5211SetTxDescLink(struct ath_hal *ah, void *ds, uint32_t link)
 {
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211phy.h b/sys/dev/ath/ath_hal/ar5211/ar5211phy.h
index c344cdc9b054..9e44b903b085 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211phy.h
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211phy.h
@@ -48,7 +48,6 @@
 #define	AR_PHY_PLL_CTL_40	0x18	/* 40 MHz */
 #define	AR_PHY_PLL_CTL_20	0x13	/* 20 MHz half rate 11a for emulation */
 
-
 #define	AR_PHY_RX_DELAY	0x9914	/* PHY analog_power_on_time, in 100ns increments */
 #define	AR_PHY_RX_DELAY_M	0x00003FFF	/* Mask for delay from active assertion (wake up) */
 				/* to enable_receiver */
diff --git a/sys/dev/ath/ath_hal/ar5211/ar5211reg.h b/sys/dev/ath/ath_hal/ar5211/ar5211reg.h
index ef2fb863d815..3cbdacc972c1 100644
--- a/sys/dev/ath/ath_hal/ar5211/ar5211reg.h
+++ b/sys/dev/ath/ath_hal/ar5211/ar5211reg.h
@@ -808,7 +808,6 @@
 #define	AR5211_USEC_RX_LAT_M	0x1F800000	/* Rx latency */
 #define	AR5211_USEC_RX_LAT_S	23
 
-
 #define	AR_BEACON_PERIOD	0x0000FFFF	/* Beacon period in TU/msec */
 #define	AR_BEACON_PERIOD_S	0		/* Byte offset of PERIOD start*/
 #define	AR_BEACON_TIM		0x007F0000	/* Byte offset of TIM start */
diff --git a/sys/dev/ath/ath_hal/ar5212/ar2316.c b/sys/dev/ath/ath_hal/ar5212/ar2316.c
index 186e72e9856c..1259c777d99c 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar2316.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar2316.c
@@ -629,7 +629,7 @@ ar2316GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2316 *data)
 {
 	uint32_t ii;
 	uint16_t Pmax=0,numVpd;
-	
+
 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
 		/* work forwards cuase lowest pdGain for highest power */
 		numVpd = data->pDataPerPDGain[ii].numVpd;
@@ -664,7 +664,7 @@ ar2316GetChannelMaxMinPower(struct ath_hal *ah,
 
 	numChannels = pRawDataset->numChannels;
 	data = pRawDataset->pDataPerChannel;
-	
+
 	/* Make sure the channel is in the range of the TP values 
 	 *  (freq piers)
 	 */
diff --git a/sys/dev/ath/ath_hal/ar5212/ar2317.c b/sys/dev/ath/ath_hal/ar5212/ar2317.c
index 29a9b369f3a5..814e4318b39d 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar2317.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar2317.c
@@ -608,7 +608,7 @@ ar2317GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2317 *data)
 	uint32_t ii;
 	uint16_t Pmax=0,numVpd;
 	uint16_t vpdmax;
-	
+
 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
 		/* work forwards cuase lowest pdGain for highest power */
 		numVpd = data->pDataPerPDGain[ii].numVpd;
@@ -644,7 +644,7 @@ ar2317GetChannelMaxMinPower(struct ath_hal *ah,
 
 	numChannels = pRawDataset->numChannels;
 	data = pRawDataset->pDataPerChannel;
-	
+
 	/* Make sure the channel is in the range of the TP values 
 	 *  (freq piers)
 	 */
diff --git a/sys/dev/ath/ath_hal/ar5212/ar2413.c b/sys/dev/ath/ath_hal/ar5212/ar2413.c
index e2a8d0203360..3c1ce6805a2a 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar2413.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar2413.c
@@ -624,7 +624,7 @@ ar2413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
 {
 	uint32_t ii;
 	uint16_t Pmax=0,numVpd;
-	
+
 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
 		/* work forwards cuase lowest pdGain for highest power */
 		numVpd = data->pDataPerPDGain[ii].numVpd;
@@ -659,7 +659,7 @@ ar2413GetChannelMaxMinPower(struct ath_hal *ah,
 
 	numChannels = pRawDataset->numChannels;
 	data = pRawDataset->pDataPerChannel;
-	
+
 	/* Make sure the channel is in the range of the TP values 
 	 *  (freq piers)
 	 */
diff --git a/sys/dev/ath/ath_hal/ar5212/ar2425.c b/sys/dev/ath/ath_hal/ar5212/ar2425.c
index 9159ad2370d1..979f45b3619e 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar2425.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar2425.c
@@ -492,7 +492,6 @@ ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
 	HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
 }
 
-
 /* Same as 2413 set power table */
 static HAL_BOOL
 ar2425SetPowerTable(struct ath_hal *ah,
@@ -586,7 +585,7 @@ ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
 {
 	uint32_t ii;
 	uint16_t Pmax=0,numVpd;
-	
+
 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
 		/* work forwards cuase lowest pdGain for highest power */
 		numVpd = data->pDataPerPDGain[ii].numVpd;
@@ -622,7 +621,7 @@ ar2425GetChannelMaxMinPower(struct ath_hal *ah,
 
 	numChannels = pRawDataset->numChannels;
 	data = pRawDataset->pDataPerChannel;
-	
+
 	/* Make sure the channel is in the range of the TP values 
 	 *  (freq piers)
 	 */
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5111.c b/sys/dev/ath/ath_hal/ar5212/ar5111.c
index 128332266b52..fe8acccd0691 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5111.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5111.c
@@ -336,7 +336,6 @@ ar5111SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
         	ar5212ModifyRfBuffer(rfReg, rfWaitS, 5, 19, 0);
         	ar5212ModifyRfBuffer(rfReg, rfWaitI, 5, 24, 0);
         	ar5212ModifyRfBuffer(rfReg, rfMaxTime, 2, 49, 0);
-
 	}
 
 	HAL_INI_WRITE_BANK(ah, ar5212Bank7_5111, rfReg, regWrites);
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5112.c b/sys/dev/ath/ath_hal/ar5212/ar5112.c
index 1e9e20355677..0c3a6032e5fa 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5112.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5112.c
@@ -281,7 +281,7 @@ ar5112SetRfRegs(struct ath_hal *ah,
 		ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 279, 0);
 		ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 282, 0);
 	}
-	
+
 	/* Lower synth voltage for X112 Rev 2.0 only */
 	if (IS_RADX112_REV2(ah)) {
 		/* Non-Reversed analyg registers - so values are pre-reversed */
@@ -763,7 +763,7 @@ ar5112GetMinPower(struct ath_hal *ah, const EXPN_DATA_PER_CHANNEL_5112 *data)
 	retVal = minPwr - (minPcdac*2);
 	return(retVal);
 }
-	
+
 static HAL_BOOL
 ar5112GetChannelMaxMinPower(struct ath_hal *ah,
 	const struct ieee80211_channel *chan,
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c b/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c
index 4e2cd683df8c..eb9999e1ca5d 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_ani.c
@@ -225,7 +225,7 @@ ar5212AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
 	struct ath_hal_5212 *ahp = AH5212(ah);
 	struct ar5212AniState *aniState = ahp->ah_curani;
 	const struct ar5212AniParams *params = AH_NULL;
-	
+
 	/*
 	 * This function may be called before there's a current
 	 * channel (eg to disable ANI.)
@@ -784,7 +784,7 @@ ar5212AniLowerImmunity(struct ath_hal *ah)
 	struct ath_hal_5212 *ahp = AH5212(ah);
 	struct ar5212AniState *aniState;
 	const struct ar5212AniParams *params;
-	
+
 	HALASSERT(ANI_ENA(ah));
 
 	aniState = ahp->ah_curani;
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
index ead62adfce48..b52045baea19 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c
@@ -27,7 +27,6 @@
 #include "ar5212/ar5212reg.h"
 #include "ar5212/ar5212phy.h"
 
-
 /*
  * Checks to see if an interrupt is pending on our NIC
  *
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c b/sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
index fa6936231952..8daaf250ec0b 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_keycache.c
@@ -245,7 +245,6 @@ ar5212SetKeyCacheEntry(struct ath_hal *ah, uint16_t entry,
 		OS_REG_WRITE(ah, AR_KEYTABLE_TYPE(entry), keyType);
 		(void) ar5212SetKeyCacheEntryMac(ah, entry, mac);
 
-
 		/*
 		 * Write MIC entry according to new or old key layout.
 		 * The MISC_MODE register is assumed already set so
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
index 6450c8d6f426..577e1e7491b3 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_misc.c
@@ -623,7 +623,7 @@ ar5212SetCoverageClass(struct ath_hal *ah, uint8_t coverageclass, int now)
 		 * timeouts. This value is in core clocks.
   		 */
 		timeout = ACK_CTS_TIMEOUT_11A + (coverageclass * 3 * clkRate);
-	
+
 		/*
 		 * Write the values: slot, eifs, ack/cts timeouts.
 		 */
@@ -1194,7 +1194,6 @@ ar5212EnableDfs(struct ath_hal *ah, HAL_PHYERR_PARAM *pe)
 		val &= ~ AR_PHY_RADAR_0_ENA;
 
 	if (IS_5413(ah)) {
-
 		if (pe->pe_blockradar == 1)
 			OS_REG_SET_BIT(ah, AR_PHY_RADAR_2,
 			    AR_PHY_RADAR_2_BLOCKOFDMWEAK);
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_phy.c b/sys/dev/ath/ath_hal/ar5212/ar5212_phy.c
index 6f9c9dc1744b..ba56477fa506 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_phy.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_phy.c
@@ -129,7 +129,6 @@ HAL_RATE_TABLE ar5212_11b_table = {
 	},
 };
 
-
 /* Venice TODO: roundUpRate() is broken when the rate table does not represent rates
  * in increasing order  e.g.  5.5, 11, 6, 9.    
  * An average rate of 6 Mbps will currently map to 11 Mbps. 
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c b/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
index a5e9ca65d056..12fe41b0c19f 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_reset.c
@@ -692,7 +692,7 @@ done:
 	HALDEBUG(ah, HAL_DEBUG_RESET, "%s: done\n", __func__);
 
 	RESTORE_CCK(ah, chan, isBmode);
-	
+
 	OS_MARK(ah, AH_MARK_RESET_DONE, 0);
 
 	return AH_TRUE;
@@ -1192,7 +1192,6 @@ ar5212MacStop(struct ath_hal *ah)
 	return status;
 }
 
-
 /*
  * Write the given reset bit mask into the reset register
  */
@@ -1923,7 +1922,6 @@ ar5212SetSpurMitigation(struct ath_hal *ah,
 #undef CHAN_TO_SPUR
 }
 
-
 /*
  * Delta slope coefficient computation.
  * Required for OFDM operation.
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c b/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c
index 6b8730b0d063..cebaa989ef8d 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c
@@ -107,7 +107,6 @@ ar5212GetTxQueueProps(struct ath_hal *ah, int q, HAL_TXQ_INFO *qInfo)
 	struct ath_hal_5212 *ahp = AH5212(ah);
 	HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
 
-
 	if (q >= pCap->halTotalQueues) {
 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid queue num %u\n",
 		    __func__, q);
@@ -346,7 +345,7 @@ ar5212ResetTxQueue(struct ath_hal *ah, u_int q)
 			  SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_INT)
 			| AR_Q_RDYTIMECFG_ENA);
 	}
-	
+
 	OS_REG_WRITE(ah, AR_DCHNTIME(q),
 		  SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR)
 		| (qi->tqi_burstTime ? AR_D_CHNTIME_EN : 0));
@@ -473,7 +472,7 @@ ar5212ResetTxQueue(struct ath_hal *ah, u_int q)
 			     OS_REG_READ(ah, AR_Q0_MISC + 4*q)
 			     | AR_Q_MISC_QCU_COMP_EN);
 	}
-	
+
 	/*
 	 * Always update the secondary interrupt mask registers - this
 	 * could be a new queue getting enabled in a running system or
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212phy.h b/sys/dev/ath/ath_hal/ar5212/ar5212phy.h
index a91f2c10ee87..74ccb268fa0d 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5212phy.h
+++ b/sys/dev/ath/ath_hal/ar5212/ar5212phy.h
@@ -78,7 +78,6 @@
 #define AR_PHY_TSTDAC_CONST_Q_S	9
 #define AR_PHY_TSTDAC_CONST_I	0x000001FF
 
-
 #define	AR_PHY_SETTLING		0x9844
 #define AR_PHY_SETTLING_AGC 0x0000007F
 #define AR_PHY_SETTLING_AGC_S   0
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5413.c b/sys/dev/ath/ath_hal/ar5212/ar5413.c
index 1d57b9ec7450..1b1817c6c3c4 100644
--- a/sys/dev/ath/ath_hal/ar5212/ar5413.c
+++ b/sys/dev/ath/ath_hal/ar5212/ar5413.c
@@ -241,7 +241,6 @@ ar5413SetRfRegs(struct ath_hal *ah,
 	} else {
         	ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 247, 0);
         	ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 244, 0);
-
 	}
 
 	/* Bank 7 Setup */
@@ -668,7 +667,7 @@ ar5413GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
 {
 	uint32_t ii;
 	uint16_t Pmax=0,numVpd;
-	
+
 	for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
 		/* work forwards cuase lowest pdGain for highest power */
 		numVpd = data->pDataPerPDGain[ii].numVpd;
@@ -705,7 +704,7 @@ ar5413GetChannelMaxMinPower(struct ath_hal *ah,
 
 	numChannels = pRawDataset->numChannels;
 	data = pRawDataset->pDataPerChannel;
-	
+
 	/* Make sure the channel is in the range of the TP values 
 	 *  (freq piers)
 	 */
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_eeprom.c b/sys/dev/ath/ath_hal/ar5312/ar5312_eeprom.c
index 9b79c36c323f..74a7394665ee 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312_eeprom.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312_eeprom.c
@@ -20,7 +20,6 @@
  */
 #include "opt_ah.h"
 
-
 #ifdef AH_SUPPORT_AR5312
 
 #include "ah.h"
@@ -39,7 +38,7 @@ ar5312EepromRead(struct ath_hal *ah, u_int off, uint16_t *dataIn)
         int i,offset;
 	const char *eepromAddr = AR5312_RADIOCONFIG(ah);
 	uint8_t *data;
-	
+
 	data = (uint8_t *) dataIn;
 	for (i=0,offset=2*off; i<2; i++,offset++) {
 		data[i] = eepromAddr[offset];
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c b/sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
index 809904d649b5..84bfd50099c3 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312_gpio.c
@@ -129,5 +129,4 @@ ar5312GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
 	(void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);
 }
 
-
 #endif /* AH_SUPPORT_AR5312 */
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_interrupts.c b/sys/dev/ath/ath_hal/ar5312/ar5312_interrupts.c
index 43cdda719db6..926fcc2863e1 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312_interrupts.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312_interrupts.c
@@ -29,7 +29,6 @@
 #include "ar5312/ar5312reg.h"
 #include "ar5312/ar5312phy.h"
 
-
 /*
  * Checks to see if an interrupt is pending on our NIC
  *
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c b/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c
index ebc12277a736..2daea4007c98 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312_reset.c
@@ -271,7 +271,7 @@ ar5312Reset(struct ath_hal *ah, HAL_OPMODE opmode,
 		/* Set the mute mask to the correct default */
 		OS_REG_WRITE(ah, AR_SEQ_MASK, 0x0000000F);
 	}
-	
+
 	if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_3) {
 		/* Clear reg to alllow RX_CLEAR line debug */
 		OS_REG_WRITE(ah, AR_PHY_BLUETOOTH,  0);
@@ -827,12 +827,10 @@ ar5312MacReset(struct ath_hal *ah, unsigned int RCMask)
 			OS_REG_READ(ah,
 						(AR5315_RSTIMER_BASE- ((uint32_t) ah->ah_sh) +AR5315_RESET));
 
-
 		} 
         else 
 #endif
 		{
-
 			switch(wlanNum) {
 			case 0:
 				resetBB = AR5312_RC_BB0_CRES | AR5312_RC_WBB0_RES;
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5312reg.h b/sys/dev/ath/ath_hal/ar5312/ar5312reg.h
index 0e78a52dfe9e..34c8aef51ef1 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5312reg.h
+++ b/sys/dev/ath/ath_hal/ar5312/ar5312reg.h
@@ -29,7 +29,6 @@
 /* Register base addresses for modules which are not wmac modules */
 /* 531X has a fixed memory map */
 
-
 #define REG_WRITE(_reg,_val)		*((volatile uint32_t *)(_reg)) = (_val);
 #define REG_READ(_reg)		*((volatile uint32_t *)(_reg))
 /* 
@@ -129,7 +128,6 @@
 #define AR5312_RC_WMAC1_RES  0x00020000  /* Warm reset to WMAC1 */
 #define AR5312_RC_WBB1_RES   0x00040000  /* Warm reset to WBB */
 
-
 #define AR_RAD2112_SREV_MAJOR   0x40    /* 2112 Major Rev */
 
 enum AR5312PowerMode {
diff --git a/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c b/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
index 5fe8eec6c225..41a7bd6cfb38 100644
--- a/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
+++ b/sys/dev/ath/ath_hal/ar5312/ar5315_gpio.c
@@ -128,5 +128,4 @@ ar5315GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)
 	(void) ar5212SetInterrupts(ah, AH5212(ah)->ah_maskReg | HAL_INT_GPIO);
 }
 
-
 #endif /* AH_SUPPORT_2316 || AH_SUPPORT_2317 */
diff --git a/sys/dev/ath/ath_hal/ar5416/ar2133.c b/sys/dev/ath/ath_hal/ar5416/ar2133.c
index 96d5792ba99a..1cb5432609d7 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar2133.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar2133.c
@@ -278,7 +278,7 @@ ar2133SetRfRegs(struct ath_hal *ah, const struct ieee80211_channel *chan,
 
 	/* Setup Bank 6 Write */
 	ath_hal_ini_bank_setup(priv->Bank6Data, &AH5416(ah)->ah_ini_bank6, modesIndex);
-	
+
 	/* Only the 5 or 2 GHz OB/DB need to be set for a mode */
 	if (IEEE80211_IS_CHAN_2GHZ(chan)) {
 		HALDEBUG(ah, HAL_DEBUG_EEPROM, "%s: 2ghz: OB_2:%d, DB_2:%d\n",
@@ -473,7 +473,6 @@ ar2133GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
 		    "NF calibrated [ctl] [chain 1] is %d\n", nf);
 		nfarray[1] = nf;
 
-
 		nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR_PHY_CH1_EXT_MINCCA_PWR);
 		if (nf & 0x100)
 			nf = 0 - ((nf ^ 0x1ff) + 1);
@@ -522,7 +521,7 @@ ar2133RfDetach(struct ath_hal *ah)
 	ath_hal_free(ahp->ah_rfHal);
 	ahp->ah_rfHal = AH_NULL;
 }
-	
+
 /*
  * Allocate memory for analog bank scratch buffers
  * Scratch Buffer will be reinitialized every reset so no need to zero now
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c
index a10d884aaaf8..340d67f2e52b 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_ani.c
@@ -223,7 +223,6 @@ ar5416AniControl(struct ath_hal *ah, HAL_ANI_CMD cmd, int param)
 		return AH_FALSE;
 	}
 
-
 	switch (cmd) {
 	case HAL_ANI_NOISE_IMMUNITY_LEVEL: {
 		u_int level = param;
@@ -727,7 +726,7 @@ ar5416AniLowerImmunity(struct ath_hal *ah)
 	struct ath_hal_5212 *ahp = AH5212(ah);
 	struct ar5212AniState *aniState;
 	const struct ar5212AniParams *params;
-	
+
 	HALASSERT(ANI_ENA(ah));
 
 	aniState = ahp->ah_curani;
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
index 6d8dfd3b8567..369e4b0bb551 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
@@ -721,7 +721,6 @@ ar5416SpurMitigate(struct ath_hal *ah, const struct ieee80211_channel *chan)
         SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
     OS_REG_WRITE(ah, AR_PHY_TIMING11, new);
 
-
     /*
      * ============================================
      * pilot mask 1 [31:0] = +6..-26, no 0 bin
@@ -893,7 +892,7 @@ ar5416FillCapabilityInfo(struct ath_hal *ah)
 	struct ath_hal_private *ahpriv = AH_PRIVATE(ah);
 	HAL_CAPABILITIES *pCap = &ahpriv->ah_caps;
 	uint16_t val;
-	
+
 	/* Construct wireless mode from EEPROM */
 	pCap->halWirelessModes = 0;
 	if (ath_hal_eepromGetFlag(ah, AR_EEP_AMODE)) {
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c b/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
index 7de707b3293c..e1b61bb3ccb4 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_beacon.c
@@ -155,7 +155,7 @@ ar5416SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
 	uint32_t nextTbtt, nextdtim,beaconintval, dtimperiod;
 
 	HALASSERT(bs->bs_intval != 0);
-	
+
 	/* NB: no cfp setting since h/w automatically takes care */
 
 	OS_REG_WRITE(ah, AR_NEXT_TBTT, TU_TO_USEC(bs->bs_nexttbtt));
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
index 106833fe6303..44b436c4f389 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.c
@@ -196,7 +196,6 @@ ar5416RunInitCals(struct ath_hal *ah, int init_cal_count)
 }
 #endif
 
-
 /*
  * AGC calibration for the AR5416, AR9130, AR9160, AR9280.
  */
@@ -623,7 +622,6 @@ ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *chan)
 	h = AH5416(ah)->ah_cal.nfCalHist;
 	HALDEBUG(ah, HAL_DEBUG_NFCAL, "CCA: ");
 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
-
 		/* Don't write to EXT radio CCA registers unless in HT/40 mode */
 		/* XXX this check should really be cleaner! */
 		if (i > 2 && !IEEE80211_IS_CHAN_HT40(chan))
@@ -674,7 +672,6 @@ ar5416LoadNF(struct ath_hal *ah, const struct ieee80211_channel *chan)
 	 * of next noise floor calibration the baseband does.  
 	 */
 	for (i = 0; i < AR5416_NUM_NF_READINGS; i ++) {
-
 		/* Don't write to EXT radio CCA registers unless in HT/40 mode */
 		/* XXX this check should really be cleaner! */
 		if (i > 2 && !IEEE80211_IS_CHAN_HT40(chan))
@@ -781,7 +778,6 @@ ar5416SanitizeNF(struct ath_hal *ah, int16_t *nf)
         }
 }
 
-
 /*
  * Read the NF and check it against the noise floor threshold
  *
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h
index 5cf1ed0ef108..73a6a87499eb 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_cal.h
@@ -20,7 +20,7 @@
  */
 #ifndef _ATH_AR5416_CAL_H_
 #define _ATH_AR5416_CAL_H_
- 
+
 typedef enum {
 	ADC_DC_INIT_CAL	= 0x1,
 	ADC_GAIN_CAL	= 0x2,
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c b/sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
index 1695eda2c5f6..e1d1320d0852 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_gpio.c
@@ -131,7 +131,7 @@ ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)
 	return AH_TRUE;
 #undef	N
 }
- 
+
 /*
  * Configure GPIO Input lines
  */
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_power.c b/sys/dev/ath/ath_hal/ar5416/ar5416_power.c
index bcd5fd9807a8..ac1366fedefa 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_power.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_power.c
@@ -114,7 +114,7 @@ static void
 ar5416SetPowerModeNetworkSleep(struct ath_hal *ah, int setChip)
 {
 	OS_REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
-	
+
 	if (setChip)
 		OS_REG_CLR_BIT(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
 }
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
index 7501885be6f5..f3d6fcab0d68 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
@@ -386,7 +386,6 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMODE opmode,
 		    AR_PCU_MISC_MODE2_ENABLE_AGGWEP);
 	}
 
-
 	/*
 	 * disable seq number generation in hw
 	 */
@@ -606,7 +605,7 @@ ar5416InitDMA(struct ath_hal *ah)
 	 * Setup receive FIFO threshold to hold off TX activities
 	 */
 	OS_REG_WRITE(ah, AR_RXFIFO_CFG, 0x200);
-	
+
 	/*
 	 * reduce the number of usable entries in PCU TXBUF to avoid
 	 * wrap around.
@@ -645,7 +644,7 @@ ar5416InitBB(struct ath_hal *ah, const struct ieee80211_channel *chan)
 
 	/* Activate the PHY (includes baseband activate and synthesizer on) */
 	OS_REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
-	
+
 	/* 
 	 * If the AP starts the calibration before the base band timeout
 	 * completes  we could get rx_clear false triggering.  Add an
@@ -1049,7 +1048,6 @@ ar5416WriteTxPowerRateRegisters(struct ath_hal *ah,
 #undef POW_SM
 }
 
-
 /**************************************************************
  * ar5416SetTransmitPower
  *
@@ -1096,7 +1094,7 @@ ar5416SetTransmitPower(struct ath_hal *ah,
     if (IS_EEP_MINOR_V2(ah)) {
         AH5416(ah)->ah_ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
     }
- 
+
     if (!ar5416SetPowerPerRateTable(ah, pEepData,  chan,
                                     &AH5416(ah)->ah_ratesArray[0],
 				    cfgCtl,
@@ -1525,7 +1523,7 @@ ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
 			pll |= SM(0xb, AR_RTC_PLL_DIV);
 	} else
 		pll |= SM(0xb, AR_RTC_PLL_DIV);
-	
+
 	OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
 
 	/* TODO:
@@ -1657,7 +1655,6 @@ ar5416SetBoardValues(struct ath_hal *ah, const struct ieee80211_channel *chan)
 
         if ((i == 0) || AR_SREV_5416_V20_OR_LATER(ah))
 	    ar5416SetDefGainValues(ah, pModal, eep, txRxAttenLocal, regChainOffset, i);
-
     }
 
 	if (AR_SREV_MERLIN_10_OR_LATER(ah)) {
@@ -2804,7 +2801,6 @@ ar5416MarkPhyInactive(struct ath_hal *ah)
 #define	AR5416_HALF_RATE_USEC_44	21 /* ((44 / 2) - 1 ) */
 #define	AR5416_QUARTER_RATE_USEC_44	10  /* ((44 / 4) - 1 ) */
 
-
 /* XXX What should these be for 40/44MHz clocks (and half/quarter) ? */
 #define	AR5416_RX_NON_FULL_RATE_LATENCY		63
 #define	AR5416_TX_HALF_RATE_LATENCY		108
@@ -2903,4 +2899,3 @@ ar5416SetIFSTiming(struct ath_hal *ah, const struct ieee80211_channel *chan)
 	OS_REG_RMW_FIELD(ah, AR_D_GBL_IFS_MISC,
 	    AR_D_GBL_IFS_MISC_USEC_DURATION, init_usec);
 }
-
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c b/sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
index a5f1251607a8..496abbf4e9b4 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_spectral.c
@@ -243,4 +243,3 @@ ar5416RestoreSpectralConfig(struct ath_hal *ah, uint32_t restoreval)
 	}
 	return;
 }
-
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c
index 869d5fbea30a..e3330fe820b8 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c
@@ -266,7 +266,6 @@ ar5416GetTxRatePower(struct ath_hal *ah, uint8_t rate, uint8_t tx_chainmask,
 	 */
 	if (AR_SREV_MERLIN_20_OR_LATER(ah) &&
 	    ath_hal_eepromGetFlag(ah, AR_EEP_OL_PWRCTRL)) {
-
 		if (rate == 0x19 || rate == 0x1a || rate == 0x1b ||
 		    rate == (0x19 | 0x04) || rate == (0x1a | 0x04) ||
 		    rate == (0x1b | 0x04)) {
@@ -543,7 +542,7 @@ ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds,
 
 	int isaggr = 0;
 	uint32_t last_aggr = 0;
-	
+
 	(void) hdrLen;
 	(void) ah;
 
@@ -613,7 +612,7 @@ ar5416ChainTxDesc(struct ath_hal *ah, struct ath_desc *ds,
 	}
 	ds_txstatus[0] = ds_txstatus[1] = 0;
 	ds_txstatus[9] &= ~AR_TxDone;
-	
+
 	return AH_TRUE;
 }
 
@@ -631,7 +630,7 @@ ar5416SetupFirstTxDesc(struct ath_hal *ah, struct ath_desc *ds,
 	HALASSERT(isValidTxRate(txRate0));
 	HALASSERT((flags & RTSCTS) != RTSCTS);
 	/* XXX validate antMode */
-	
+
 	txPower = (txPower + ahp->ah_txPowerIndexOffset );
 	if(txPower > 63)  txPower=63;
 
@@ -646,7 +645,7 @@ ar5416SetupFirstTxDesc(struct ath_hal *ah, struct ath_desc *ds,
 		| SM(AH5416(ah)->ah_tx_chainmask, AR_ChainSel1)
 		| SM(AH5416(ah)->ah_tx_chainmask, AR_ChainSel2) 
 		| SM(AH5416(ah)->ah_tx_chainmask, AR_ChainSel3);
-	
+
 	/* NB: no V1 WAR */
 	ads->ds_ctl8 = SM(0, AR_AntCtl0);
 	ads->ds_ctl9 = SM(0, AR_AntCtl1) | SM(txPower, AR_XmitPower1);
@@ -673,7 +672,7 @@ ar5416SetupFirstTxDesc(struct ath_hal *ah, struct ath_desc *ds,
 		ads->ds_ctl10 = SM(0, AR_AntCtl2) | SM(0, AR_XmitPower2);
 		ads->ds_ctl11 = SM(0, AR_AntCtl3) | SM(0, AR_XmitPower3);
 	}
-	
+
 	return AH_TRUE;
 #undef RTSCTS
 }
@@ -1114,7 +1113,6 @@ ar5416GetTxCompletionRates(struct ath_hal *ah, const struct ath_desc *ds0, int *
 	return AH_TRUE;
 }
 
-
 /*
  * TX queue management routines - AR5416 and later chipsets
  */
@@ -1326,7 +1324,7 @@ ar5416ResetTxQueue(struct ath_hal *ah, u_int q)
 			  SM(qi->tqi_readyTime, AR_Q_RDYTIMECFG_INT)
 			| AR_Q_RDYTIMECFG_ENA);
 	}
-	
+
 	OS_REG_WRITE(ah, AR_DCHNTIME(q),
 		  SM(qi->tqi_burstTime, AR_D_CHNTIME_DUR)
 		| (qi->tqi_burstTime ? AR_D_CHNTIME_EN : 0));
@@ -1464,7 +1462,7 @@ ar5416ResetTxQueue(struct ath_hal *ah, u_int q)
 			     OS_REG_READ(ah, AR_Q0_MISC + 4*q)
 			     | AR_Q_MISC_QCU_COMP_EN);
 	}
-	
+
 	/*
 	 * Always update the secondary interrupt mask registers - this
 	 * could be a new queue getting enabled in a running system or
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416desc.h b/sys/dev/ath/ath_hal/ar5416/ar5416desc.h
index 0e58bc61eba8..efe56a11965f 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416desc.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416desc.h
@@ -64,7 +64,6 @@ struct ar5416_rx_desc { /* rx desc has 2 control words + 9 status words */
 	uint32_t	status8;
 };
 
-
 struct ar5416_desc {
 	uint32_t   ds_link;    /* link pointer */
 	uint32_t   ds_data;    /* data buffer pointer */
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
index ff4f558efa83..85c1d6454952 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
@@ -669,7 +669,6 @@
 #define	AR_XSREV_VERSION_OWL_PCI	0x0D
 #define	AR_XSREV_VERSION_OWL_PCIE	0x0C
 
-
 /*
  * These are from ath9k/Atheros and assume an AR_SREV version mask
  * of 0x07, rather than 0x0F which is being used in the FreeBSD HAL.
@@ -808,7 +807,6 @@
 	(AR_SREV_KIWI(_ah) && \
 	 AH_PRIVATE((_ah))->ah_macRev >= AR_XSREV_REVISION_KIWI_13)
 
-
 /* Not yet implemented chips */
 #define	AR_SREV_9271(_ah)	0
 
diff --git a/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c b/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
index 85389792219e..70277cc6ca2a 100644
--- a/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
+++ b/sys/dev/ath/ath_hal/ar9001/ar9130_attach.c
@@ -243,7 +243,6 @@ ar9130Attach(uint16_t devid, HAL_SOFTC sc,
 	AH_PRIVATE(ah)->ah_currentRDext =
 	    ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL);
 
-
 	/*
 	 * ah_miscMode is populated by ar5416FillCapabilityInfo()
 	 * starting from griffin. Set here to make sure that
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
index d6336bef734c..17604e720cef 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9280_attach.c
@@ -434,7 +434,6 @@ ar9280ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore, HAL_BOOL power_off)
 		OS_DELAY(1000);
 	}
 
-
 	/*
 	 * Set PCIe workaround bits
 	 *
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c b/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
index 5eeb420d5d3a..9d75e3b43131 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9280_olc.c
@@ -171,7 +171,6 @@ ar9280olcTemperatureCompensation(struct ath_hal *ah)
 	}
 }
 
-
 static int16_t
 ar9280ChangeGainBoundarySettings(struct ath_hal *ah, uint16_t *gb,
     uint16_t numXpdGain, uint16_t pdGainOverlap_t2, int8_t pwr_table_offset,
@@ -302,7 +301,6 @@ ar9280SetPowerCalTable(struct ath_hal *ah, struct ar5416eeprom *pEepData,
 
 	(void) ath_hal_eepromGet(ah, AR_EEP_PWR_TABLE_OFFSET, &pwr_table_offset);
 
-
 	if (IS_EEP_MINOR_V2(ah)) {
 		pdGainOverlap_t2 = pEepData->modalHeader[IEEE80211_IS_CHAN_2GHZ(chan)].pdGainOverlap;
 	} else { 
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285.c b/sys/dev/ath/ath_hal/ar9002/ar9285.c
index c4362637c173..0044f73a97c5 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285.c
@@ -52,7 +52,6 @@ ar9285GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
 	    "NF calibrated [ctl] [chain 0] is %d\n", nf);
 	nfarray[0] = nf;
 
-
 	nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
 	if (nf & 0x100)
 		nf = 0 - ((nf ^ 0x1ff) + 1);
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
index 718a89995df3..7fc6b96a25c9 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_attach.c
@@ -196,7 +196,7 @@ ar9285Attach(uint16_t devid, HAL_SOFTC sc,
 	AH5416(ah)->ah_writeIni		= ar9285WriteIni;
 	AH5416(ah)->ah_rx_chainmask	= AR9285_DEFAULT_RXCHAINMASK;
 	AH5416(ah)->ah_tx_chainmask	= AR9285_DEFAULT_TXCHAINMASK;
-	
+
 	ahp->ah_maxTxTrigLev		= MAX_TX_FIFO_THRESHOLD >> 1;
 
 	if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c b/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c
index 3a168ae45ead..0596f19c3b64 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_btcoex.c
@@ -150,5 +150,3 @@ ar9285BTCoexSetParameter(struct ath_hal *ah, u_int32_t type, u_int32_t value)
 		break;
 	}
 }
-
-
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c b/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c
index 3da59311e5dc..25ae031da2af 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_diversity.c
@@ -77,7 +77,7 @@ ar9285SetAntennaSwitch(struct ath_hal *ah, HAL_ANT_SETTING settings)
 	/* Store settings */
 	AH5212(ah)->ah_antControl = settings;
 	AH5212(ah)->ah_diversity = (settings == HAL_ANT_VARIABLE);
-	
+
 	/* XXX don't fiddle if the PHY is in sleep mode or ! chan */
 
 	/* Begin setting the relevant registers */
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c b/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
index 961e25e89efa..7b598a05720c 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9285_reset.c
@@ -107,7 +107,7 @@ ar9285SetTransmitPower(struct ath_hal *ah,
     if (IS_EEP_MINOR_V2(ah)) {
         AH5416(ah)->ah_ht40PowerIncForPdadc = pModal->ht40PowerIncForPdadc;
     }
- 
+
     if (!ar9285SetPowerPerRateTable(ah, pEepData,  chan,
                                     &AH5416(ah)->ah_ratesArray[0],cfgCtl,
                                     twiceAntennaReduction,
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c b/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
index b5173dab309e..3cd13f73b772 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9287_attach.c
@@ -146,7 +146,6 @@ ar9287Attach(uint16_t devid, HAL_SOFTC sc,
 		ah->ah_eepromdata = eepromdata;
 	}
 
-
 	/* XXX override with 9280 specific state */
 	/* override 5416 methods for our needs */
 	AH5416(ah)->ah_initPLL = ar9280InitPLL;
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9287_cal.c b/sys/dev/ath/ath_hal/ar9002/ar9287_cal.c
index 09940a187e7d..3bdb4c7f0810 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9287_cal.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9287_cal.c
@@ -41,7 +41,6 @@
 
 #include "ar9002/ar9287_cal.h"
 
-
 void
 ar9287PACal(struct ath_hal *ah, HAL_BOOL is_reset)
 {
@@ -55,7 +54,7 @@ HAL_BOOL
 ar9287InitCalHardware(struct ath_hal *ah, const struct ieee80211_channel *chan)
 {
 	OS_REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
-	
+
 	/* Calibrate the AGC */
 	OS_REG_WRITE(ah, AR_PHY_AGC_CONTROL,
 	    OS_REG_READ(ah, AR_PHY_AGC_CONTROL) | AR_PHY_AGC_CONTROL_CAL);
diff --git a/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c b/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c
index 372d6c476d12..e4b6eed5bfec 100644
--- a/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c
+++ b/sys/dev/ath/ath_hal/ar9002/ar9287_reset.c
@@ -113,7 +113,6 @@ ar9287SetPowerCalTable(struct ath_hal *ah,
 	*pTxPowerIndexOffset = 0;
 }
 
-
 /* XXX hard-coded values? */
 #define REDUCE_SCALED_POWER_BY_TWO_CHAIN     6
 
diff --git a/sys/dev/ath/ath_rate/amrr/amrr.c b/sys/dev/ath/ath_rate/amrr/amrr.c
index 3e71ca70f1e4..b04b728b2bc5 100644
--- a/sys/dev/ath/ath_rate/amrr/amrr.c
+++ b/sys/dev/ath/ath_rate/amrr/amrr.c
@@ -64,7 +64,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_media.h>
 #include <net/if_arp.h>
@@ -145,7 +145,6 @@ ath_rate_getxtxrates(struct ath_softc *sc, struct ath_node *an,
 	rc[3].tries = amn->amn_tx_try3;
 }
 
-
 void
 ath_rate_setupxtxdesc(struct ath_softc *sc, struct ath_node *an,
 	struct ath_desc *ds, int shortPreamble, u_int8_t rix)
@@ -217,7 +216,6 @@ node_reset(struct amrr_node *amn)
   	amn->amn_success_threshold = ath_rate_min_success_threshold;
 }
 
-
 /**
  * The code below assumes that we are dealing with hardware multi rate retry
  * I have no idea what will happen if you try to use this module with another
@@ -416,7 +414,6 @@ ath_rate_ctl(void *arg, struct ieee80211_node *ni)
    		} else {
 			amn->amn_recovery = 0;
 		}
-
    	}
 	if (is_enough (amn) || rix != amn->amn_rix) {
 		/* reset counters. */
diff --git a/sys/dev/ath/ath_rate/onoe/onoe.c b/sys/dev/ath/ath_rate/onoe/onoe.c
index 216047d37d20..5229feaeebfd 100644
--- a/sys/dev/ath/ath_rate/onoe/onoe.c
+++ b/sys/dev/ath/ath_rate/onoe/onoe.c
@@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_media.h>
 #include <net/if_arp.h>
@@ -197,7 +197,6 @@ ath_rate_update_rx_rssi(struct ath_softc *sc, struct ath_node *an, int rssi)
 {
 }
 
-
 static void
 ath_rate_update(struct ath_softc *sc, struct ieee80211_node *ni, int rate)
 {
@@ -227,7 +226,7 @@ ath_rate_update(struct ath_softc *sc, struct ieee80211_node *ni, int rate)
 	ni->ni_txrate = ni->ni_rates.rs_rates[rate] & IEEE80211_RATE_VAL;
 	on->on_tx_rix0 = sc->sc_rixmap[ni->ni_txrate];
 	on->on_tx_rate0 = rt->info[on->on_tx_rix0].rateCode;
-	
+
 	on->on_tx_rate0sp = on->on_tx_rate0 |
 		rt->info[on->on_tx_rix0].shortPreamble;
 	if (sc->sc_mrretry) {
diff --git a/sys/dev/ath/ath_rate/sample/sample.c b/sys/dev/ath/ath_rate/sample/sample.c
index d142ca2c34d6..a8fdcb28e49f 100644
--- a/sys/dev/ath/ath_rate/sample/sample.c
+++ b/sys/dev/ath/ath_rate/sample/sample.c
@@ -62,7 +62,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_media.h>
@@ -422,7 +422,7 @@ pick_sample_rate(struct sample_softc *ssc , struct ath_node *an,
 	int current_rix, rix;
 	unsigned current_tt;
 	uint64_t mask;
-	
+
 	current_rix = sn->current_rix[size_bin];
 	if (current_rix < 0) {
 		/* no successes yet, send at the lowest bit-rate */
@@ -657,7 +657,6 @@ ath_rate_pick_seed_rate_ht(struct ath_softc *sc, struct ath_node *an,
 #undef	DOT11RATE
 }
 
-
 void
 ath_rate_findrate(struct ath_softc *sc, struct ath_node *an,
 		  int shortPreamble, size_t frameLen, int tid,
@@ -1275,7 +1274,6 @@ ath_rate_update_rx_rssi(struct ath_softc *sc, struct ath_node *an, int rssi)
 {
 }
 
-
 static const struct txschedule *mrr_schedules[IEEE80211_MODE_MAX+2] = {
 	NULL,		/* IEEE80211_MODE_AUTO */
 	series_11a,	/* IEEE80211_MODE_11A */
@@ -1632,7 +1630,7 @@ struct ath_ratectrl *
 ath_rate_attach(struct ath_softc *sc)
 {
 	struct sample_softc *ssc;
-	
+
 	ssc = malloc(sizeof(struct sample_softc), M_DEVBUF, M_NOWAIT|M_ZERO);
 	if (ssc == NULL)
 		return NULL;
@@ -1651,6 +1649,6 @@ void
 ath_rate_detach(struct ath_ratectrl *arc)
 {
 	struct sample_softc *ssc = (struct sample_softc *) arc;
-	
+
 	free(ssc, M_DEVBUF);
 }
diff --git a/sys/dev/ath/ath_rate/sample/sample.h b/sys/dev/ath/ath_rate/sample/sample.h
index c726f84a8d3e..3b6fe9f6fba2 100644
--- a/sys/dev/ath/ath_rate/sample/sample.h
+++ b/sys/dev/ath/ath_rate/sample/sample.h
@@ -137,7 +137,7 @@ static unsigned calc_usecs_unicast_packet(struct ath_softc *sc,
 	const HAL_RATE_TABLE *rt = sc->sc_currates;
 	struct ieee80211com *ic = &sc->sc_ic;
 	int rts, cts;
-	
+
 	unsigned t_slot = 20;
 	unsigned t_difs = 50; 
 	unsigned t_sifs = 10; 
@@ -145,7 +145,7 @@ static unsigned calc_usecs_unicast_packet(struct ath_softc *sc,
 	int x = 0;
 	int cw = WIFI_CW_MIN;
 	int cix;
-	
+
 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
 
 	if (rix >= rt->rateCount) {
diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c
index 660547f32701..77fe45252891 100644
--- a/sys/dev/ath/if_ath.c
+++ b/sys/dev/ath/if_ath.c
@@ -1221,7 +1221,6 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
 					 IEEE80211_HTC_TXLDPC;
 		}
 
-
 		device_printf(sc->sc_dev,
 		    "[HT] %d RX streams; %d TX streams\n", rxs, txs);
 	}
@@ -3540,7 +3539,7 @@ finish:
 	ATH_UNLOCK(sc);
 
 	ATH_KTR(sc, ATH_KTR_TX, 0, "ath_transmit: finished");
-	
+
 	return (retval);
 }
 
@@ -4380,8 +4379,6 @@ ath_tx_process_buf_completion(struct ath_softc *sc, struct ath_txq *txq,
 		bf->bf_comp(sc, bf, 0);
 }
 
-
-
 /*
  * Process completed xmit descriptors from the specified queue.
  * Kick the packet scheduler if needed. This can occur from this
@@ -6103,7 +6100,6 @@ ath_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
 
 		taskqueue_unblock(sc->sc_tq);
 	} else if (nstate == IEEE80211_S_INIT) {
-
 		/* Quiet time handling - ensure we resync */
 		memset(&avp->quiet_ie, 0, sizeof(avp->quiet_ie));
 
diff --git a/sys/dev/ath/if_ath_ahb.c b/sys/dev/ath/if_ath_ahb.c
index 3c4c05e57846..ea329589f1ab 100644
--- a/sys/dev/ath/if_ath_ahb.c
+++ b/sys/dev/ath/if_ath_ahb.c
@@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/rman.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_media.h>
 #include <net/if_arp.h>
@@ -336,7 +336,6 @@ static device_method_t ath_ahb_methods[] = {
 	DEVMETHOD(device_shutdown,	ath_ahb_shutdown),
 	DEVMETHOD(device_suspend,	ath_ahb_suspend),
 	DEVMETHOD(device_resume,	ath_ahb_resume),
-
 	{ 0,0 }
 };
 static driver_t ath_ahb_driver = {
diff --git a/sys/dev/ath/if_ath_beacon.c b/sys/dev/ath/if_ath_beacon.c
index 509e24caf601..ac1244c5f8e7 100644
--- a/sys/dev/ath/if_ath_beacon.c
+++ b/sys/dev/ath/if_ath_beacon.c
@@ -777,7 +777,6 @@ ath_beacon_generate(struct ath_softc *sc, struct ieee80211vap *vap)
 	 * insure cab frames are triggered by this beacon.
 	 */
 	if (vap->iv_bcn_off.bo_tim[4] & 1) {
-
 		/* NB: only at DTIM */
 		ATH_TXQ_LOCK(&avp->av_mcastq);
 		if (nmcastq) {
diff --git a/sys/dev/ath/if_ath_beacon.h b/sys/dev/ath/if_ath_beacon.h
index e4a9e7918af2..cda145ba32e2 100644
--- a/sys/dev/ath/if_ath_beacon.h
+++ b/sys/dev/ath/if_ath_beacon.h
@@ -53,4 +53,3 @@ extern	void ath_beacon_proc(void *arg, int pending);
 extern	void ath_beacon_miss(struct ath_softc *sc);
 
 #endif
-
diff --git a/sys/dev/ath/if_ath_btcoex.c b/sys/dev/ath/if_ath_btcoex.c
index 881a2c8acf95..1f0400b696f5 100644
--- a/sys/dev/ath/if_ath_btcoex.c
+++ b/sys/dev/ath/if_ath_btcoex.c
@@ -55,7 +55,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_media.h>
@@ -481,4 +481,3 @@ bad:
 		free(outdata, M_TEMP);
 	return (error);
 }
-
diff --git a/sys/dev/ath/if_ath_dfs.c b/sys/dev/ath/if_ath_dfs.c
index 2078f154981c..8f1bc5b015ae 100644
--- a/sys/dev/ath/if_ath_dfs.c
+++ b/sys/dev/ath/if_ath_dfs.c
@@ -63,7 +63,6 @@ ath_dfs_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/if_ath_drv.c b/sys/dev/ath/if_ath_drv.c
index cc7b9162fb2c..c4384cb73916 100644
--- a/sys/dev/ath/if_ath_drv.c
+++ b/sys/dev/ath/if_ath_drv.c
@@ -68,7 +68,6 @@ ath_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/if_ath_ioctl.c b/sys/dev/ath/if_ath_ioctl.c
index 9601ba3456bb..f58742d6e5fb 100644
--- a/sys/dev/ath/if_ath_ioctl.c
+++ b/sys/dev/ath/if_ath_ioctl.c
@@ -204,7 +204,6 @@ ath_ioctl_diag(struct ath_softc *sc, struct ath_diag *ad)
 		}
 	}
 
-
 	ATH_LOCK(sc);
 	if (id != HAL_DIAG_REGS)
 		ath_power_set_power_state(sc, HAL_PM_AWAKE);
@@ -306,4 +305,3 @@ ath_ioctl(struct ieee80211com *ic, u_long cmd, void *data)
 		return (ENOTTY);
 	}
 }
-
diff --git a/sys/dev/ath/if_ath_led.c b/sys/dev/ath/if_ath_led.c
index 3cd519a8d198..8b4ac821f2be 100644
--- a/sys/dev/ath/if_ath_led.c
+++ b/sys/dev/ath/if_ath_led.c
@@ -112,7 +112,6 @@ __FBSDID("$FreeBSD$");
  * XXX TODO: move the LED sysctls here.
  */
 
-
 /*
  * Configure the hardware for software and LED blinking.
  * The user may choose to configure part of each, depending upon the
diff --git a/sys/dev/ath/if_ath_lna_div.c b/sys/dev/ath/if_ath_lna_div.c
index 7b970285b9b7..c89a6b107749 100644
--- a/sys/dev/ath/if_ath_lna_div.c
+++ b/sys/dev/ath/if_ath_lna_div.c
@@ -55,7 +55,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_media.h>
@@ -1018,4 +1018,3 @@ div_comb_done:
 	antcomb->main_recv_cnt = 0;
 	antcomb->alt_recv_cnt = 0;
 }
-
diff --git a/sys/dev/ath/if_ath_pci.c b/sys/dev/ath/if_ath_pci.c
index 0b35e6670015..d3b130e091dc 100644
--- a/sys/dev/ath/if_ath_pci.c
+++ b/sys/dev/ath/if_ath_pci.c
@@ -52,7 +52,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/rman.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_media.h>
 #include <net/if_arp.h>
@@ -383,7 +383,6 @@ static device_method_t ath_pci_methods[] = {
 	DEVMETHOD(device_shutdown,	ath_pci_shutdown),
 	DEVMETHOD(device_suspend,	ath_pci_suspend),
 	DEVMETHOD(device_resume,	ath_pci_resume),
-
 	{ 0,0 }
 };
 static driver_t ath_pci_driver = {
diff --git a/sys/dev/ath/if_ath_pci_devlist.h b/sys/dev/ath/if_ath_pci_devlist.h
index dc49ab578d65..ec5bb1405553 100644
--- a/sys/dev/ath/if_ath_pci_devlist.h
+++ b/sys/dev/ath/if_ath_pci_devlist.h
@@ -663,7 +663,5 @@ static const struct pci_device_table ath_pci_id_table[] = {
 	/* PCI-E AR9565 (WB335) */
 	{ PCI_VDEVICE(PCI_VENDOR_ID_ATHEROS, 0x0036),
 	  .driver_data = ATH_PCI_BT_ANT_DIV },
-
 	{ 0 }
 };
-
diff --git a/sys/dev/ath/if_ath_rate.c b/sys/dev/ath/if_ath_rate.c
index 8eb7a518c2a4..ff2e0e1336f1 100644
--- a/sys/dev/ath/if_ath_rate.c
+++ b/sys/dev/ath/if_ath_rate.c
@@ -63,7 +63,6 @@ ath_rate_modevent(module_t mod __unused, int type, void *data __unused)
 	default:
 		error = EOPNOTSUPP;
 		break;
-
 	}
 	return (error);
 }
diff --git a/sys/dev/ath/if_ath_spectral.c b/sys/dev/ath/if_ath_spectral.c
index eaf91b9b1cab..44d5064c182d 100644
--- a/sys/dev/ath/if_ath_spectral.c
+++ b/sys/dev/ath/if_ath_spectral.c
@@ -54,7 +54,7 @@ __FBSDID("$FreeBSD$");
 #include <sys/bus.h>
 
 #include <sys/socket.h>
- 
+
 #include <net/if.h>
 #include <net/if_var.h>
 #include <net/if_media.h>
@@ -299,4 +299,3 @@ bad:
 
 	return (error);
 }
-
diff --git a/sys/dev/ath/if_ath_sysctl.c b/sys/dev/ath/if_ath_sysctl.c
index 03a61b3a841e..3c873d3e8b34 100644
--- a/sys/dev/ath/if_ath_sysctl.c
+++ b/sys/dev/ath/if_ath_sysctl.c
@@ -1066,7 +1066,7 @@ ath_sysctl_stats_attach(struct ath_softc *sc)
 	struct sysctl_oid *tree = device_get_sysctl_tree(sc->sc_dev);
 	struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->sc_dev);
 	struct sysctl_oid_list *child = SYSCTL_CHILDREN(tree);
- 
+
 	/* Create "clear" node */
 	SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
 	    "clear_stats", CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_NEEDGIANT, sc,
@@ -1300,7 +1300,7 @@ ath_sysctl_stats_attach(struct ath_softc *sc)
 	SYSCTL_ADD_UINT(ctx, child, OID_AUTO, "ast_tx_ldpc",
 	    CTLFLAG_RD, &sc->sc_stats.ast_tx_ldpc, 0,
 	    "Number of LDPC frames transmitted");
-	
+
 	/* Attach the RX phy error array */
 	ath_sysctl_stats_attach_rxphyerr(sc, child);
 
diff --git a/sys/dev/ath/if_ath_tx.c b/sys/dev/ath/if_ath_tx.c
index f3e1f1a71440..f8800fab04cd 100644
--- a/sys/dev/ath/if_ath_tx.c
+++ b/sys/dev/ath/if_ath_tx.c
@@ -1307,7 +1307,7 @@ ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
 	/* Squirrel away in ath_buf */
 	bf->bf_state.bfs_ctsrate = ctsrate;
 	bf->bf_state.bfs_ctsduration = ctsduration;
-	
+
 	/*
 	 * Must disable multi-rate retry when using RTS/CTS.
 	 */
@@ -1486,7 +1486,6 @@ ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
 	}
 }
 
-
 /*
  * Transmit the given frame to the hardware.
  *
@@ -2519,7 +2518,6 @@ ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
 	sc->sc_txstart_cnt--;
 	ATH_PCU_UNLOCK(sc);
 
-
 	/* Put the hardware back to sleep if required */
 	ATH_LOCK(sc);
 	ath_power_restore_power_state(sc);
@@ -2713,7 +2711,6 @@ ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
 	    tid->baw_tail);
 
-
 #if 0
 	assert(tid->tx_buf[cindex] == NULL);
 #endif
@@ -3225,7 +3222,6 @@ ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
 		 */
 		/* XXX TXQ locking */
 		if (txq->axq_depth + txq->fifo.axq_depth == 0) {
-
 			bf = ATH_TID_FIRST(atid);
 			ATH_TID_REMOVE(atid, bf, bf_list);
 
@@ -4312,7 +4308,6 @@ ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
 	ath_tx_default_comp(sc, bf, 0);
 }
 
-
 /*
  * This as it currently stands is a bit dumb.  Ideally we'd just
  * fail the frame the normal way and have it permanently fail
@@ -5392,7 +5387,6 @@ ath_tx_tid_swq_depth_bytes(struct ath_softc *sc, struct ath_node *an,
 	 * ever queue more than that in a single frame.
 	 */
 	TAILQ_FOREACH(bf, &tid->tid_q, bf_list) {
-
 		/*
 		 * TODO: I'm not sure if we're going to hit cases where
 		 * no frames get sent because the list is empty.
@@ -5612,7 +5606,6 @@ ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
 			 * already points to the rest in the chain.
 			 */
 			ath_tx_setds_11n(sc, bf);
-
 		}
 	queuepkt:
 		/* Set completion handler, multi-frame aggregate or not */
@@ -5684,7 +5677,6 @@ ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
 		    __func__, tid->tid);
 
 	for (;;) {
-
 		/*
 		 * If the upper layers have paused the TID, don't
 		 * queue any further packets.
@@ -5916,7 +5908,6 @@ ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
  * Is AMPDU-TX pending for the given TID?
  */
 
-
 /*
  * Method to handle sending an ADDBA request.
  *
@@ -6044,7 +6035,6 @@ ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
 	return r;
 }
 
-
 /*
  * Stop ADDBA on a queue.
  *
diff --git a/sys/dev/ath/if_ath_tx.h b/sys/dev/ath/if_ath_tx.h
index 517007716e9f..2ad2f75e926d 100644
--- a/sys/dev/ath/if_ath_tx.h
+++ b/sys/dev/ath/if_ath_tx.h
@@ -71,7 +71,6 @@
 #define	ATH_BA_ISSET(_bm, _n)	(((_n) < (WME_BA_BMP_SIZE)) &&		\
 	    ((_bm)[(_n) >> 5] & (1 << ((_n) & 31))))
 
-
 /* extracting the seqno from buffer seqno */
 #define	SEQNO(_a)	((_a) >> IEEE80211_SEQ_SEQ_SHIFT)
 
diff --git a/sys/dev/ath/if_ath_tx_edma.c b/sys/dev/ath/if_ath_tx_edma.c
index b7e97428ba69..4ec98b3382c9 100644
--- a/sys/dev/ath/if_ath_tx_edma.c
+++ b/sys/dev/ath/if_ath_tx_edma.c
@@ -654,7 +654,7 @@ ath_edma_setup_txfifo(struct ath_softc *sc, int qnum)
 	 * Set initial "empty" state.
 	 */
 	te->m_fifo_head = te->m_fifo_tail = te->m_fifo_depth = 0;
-	
+
 	return (0);
 }
 
@@ -778,7 +778,6 @@ ath_edma_tx_proc(void *arg, int npending)
 #endif
 	ath_edma_tx_processq(sc, 1);
 
-
 	ATH_PCU_LOCK(sc);
 	sc->sc_txproc_cnt--;
 	ATH_PCU_UNLOCK(sc);
diff --git a/sys/dev/ath/if_ath_tx_ht.c b/sys/dev/ath/if_ath_tx_ht.c
index 1ff8f3604235..c7fa41443d26 100644
--- a/sys/dev/ath/if_ath_tx_ht.c
+++ b/sys/dev/ath/if_ath_tx_ht.c
@@ -1026,7 +1026,6 @@ ath_tx_form_aggr(struct ath_softc *sc, struct ath_node *an,
 			break;
 		}
 #endif
-
 	}
 
 finish:
diff --git a/sys/dev/ath/if_athioctl.h b/sys/dev/ath/if_athioctl.h
index 82decdefe3d4..8367a3ebac18 100644
--- a/sys/dev/ath/if_athioctl.h
+++ b/sys/dev/ath/if_athioctl.h
@@ -193,7 +193,6 @@ struct ath_diag {
 #define	SIOCGATHDIAG	_IOWR('i', 138, struct ath_diag)
 #define	SIOCGATHPHYERR	_IOWR('i', 140, struct ath_diag)
 
-
 /*
  * The rate control ioctl has to support multiple potential rate
  * control classes.  For now, instead of trying to support an
diff --git a/sys/dev/ath/if_athvar.h b/sys/dev/ath/if_athvar.h
index aed8df9a7b8d..c789b2c459c1 100644
--- a/sys/dev/ath/if_athvar.h
+++ b/sys/dev/ath/if_athvar.h
@@ -411,7 +411,6 @@ struct ath_txq {
 #define	ATH_TXQ_UNLOCK_ASSERT(_tq)	mtx_assert(&(_tq)->axq_lock,	\
 					    MA_NOTOWNED)
 
-
 #define	ATH_NODE_LOCK(_an)		mtx_lock(&(_an)->an_mtx)
 #define	ATH_NODE_UNLOCK(_an)		mtx_unlock(&(_an)->an_mtx)
 #define	ATH_NODE_LOCK_ASSERT(_an)	mtx_assert(&(_an)->an_mtx, MA_OWNED)