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-rw-r--r--devel/ice/files/patch-include::IceUtil::Config.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/devel/ice/files/patch-include::IceUtil::Config.h b/devel/ice/files/patch-include::IceUtil::Config.h
new file mode 100644
index 000000000000..235ee4e818be
--- /dev/null
+++ b/devel/ice/files/patch-include::IceUtil::Config.h
@@ -0,0 +1,11 @@
+--- include/IceUtil/Config.h.orig Thu Jul 22 01:21:08 2004
++++ include/IceUtil/Config.h Tue Jul 27 16:16:48 2004
+@@ -16,7 +16,7 @@
+ // Most CPUs support only one endianness, with the notable exceptions
+ // of Itanium (IA64) and MIPS.
+ //
+-#if defined(__i386) || defined(_M_IX86) || defined (__x86_64)
++#if defined(__i386) || defined(_M_IX86) || defined (__x86_64) || defined(__alpha__)
+ # define ICE_LITTLE_ENDIAN
+ #elif defined(__sparc) || defined(__sparc__) || defined(__hppa) || defined(__ppc__) || defined(_ARCH_COM)
+ # define ICE_BIG_ENDIAN