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# RUN: llc -mtriple=i386-linux-gnu   -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64

--- |
  define i8 @test_zext_i1toi8(i1 %a) {
    %r = zext i1 %a to i8
    ret i8 %r
  }

  define i16 @test_zext_i1toi16(i1 %a) {
    %r = zext i1 %a to i16
    ret i16 %r
  }

  define i32 @test_zext_i1(i1 %a) {
    %r = zext i1 %a to i32
    ret i32 %r
  }

  define i32 @test_zext_i8(i8 %val) {
    %r = zext i8 %val to i32
    ret i32 %r
  }

  define i32 @test_zext_i16(i16 %val) {
    %r = zext i16 %val to i32
    ret i32 %r
  }

  define i32 @test_sext_i8(i8 %val) {
    %r = sext i8 %val to i32
    ret i32 %r
  }

  define i32 @test_sext_i16(i16 %val) {
    %r = sext i16 %val to i32
    ret i32 %r
  }

...
---
name:            test_zext_i1toi8
# ALL-LABEL: name:  test_zext_i1toi8
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr8, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %1 = AND8ri %0, 1, implicit-def %eflags
# ALL-NEXT:     %al = COPY %1
# ALL-NEXT:     RET 0, implicit %al
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s8) = G_ZEXT %0(s1)
    %al = COPY %1(s8)
    RET 0, implicit %al

...
---
name:            test_zext_i1toi16
# ALL-LABEL: name:  test_zext_i1toi16
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr16, preferred-register: '' }
registers:
  - { id: 0, class: gpr, preferred-register: '' }
  - { id: 1, class: gpr, preferred-register: '' }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %2 = SUBREG_TO_REG 0, %0, 1
# ALL-NEXT:     %1 = AND16ri8 %2, 1, implicit-def %eflags
# ALL-NEXT:     %ax = COPY %1
# ALL-NEXT:     RET 0, implicit %ax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s16) = G_ZEXT %0(s1)
    %ax = COPY %1(s16)
    RET 0, implicit %ax

...
---
name:            test_zext_i1
# ALL-LABEL: name:  test_zext_i1
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
# ALL-NEXT:   - { id: 2, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %2 = SUBREG_TO_REG 0, %0, 1
# ALL-NEXT:     %1 = AND32ri8 %2, 1, implicit-def %eflags
# ALL-NEXT:     %eax = COPY %1
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s1) = COPY %edi
    %1(s32) = G_ZEXT %0(s1)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_zext_i8
# ALL-LABEL: name:  test_zext_i8
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %1 = MOVZX32rr8 %0
# ALL-NEXT:     %eax = COPY %1
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s32) = G_ZEXT %0(s8)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_zext_i16
# ALL-LABEL: name:  test_zext_i16
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %di
# ALL-NEXT:     %1 = MOVZX32rr16 %0
# ALL-NEXT:     %eax = COPY %1
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s16) = COPY %edi
    %1(s32) = G_ZEXT %0(s16)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_sext_i8
# ALL-LABEL: name:  test_sext_i8
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr8, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %dil
# ALL-NEXT:     %1 = MOVSX32rr8 %0
# ALL-NEXT:     %eax = COPY %1
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s8) = COPY %edi
    %1(s32) = G_SEXT %0(s8)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...
---
name:            test_sext_i16
# ALL-LABEL: name:  test_sext_i16
alignment:       4
legalized:       true
regBankSelected: true
# ALL:      registers:
# ALL-NEXT:   - { id: 0, class: gr16, preferred-register: '' }
# ALL-NEXT:   - { id: 1, class: gr32, preferred-register: '' }
registers:
  - { id: 0, class: gpr }
  - { id: 1, class: gpr }
# ALL:          %0 = COPY %di
# ALL-NEXT:     %1 = MOVSX32rr16 %0
# ALL-NEXT:     %eax = COPY %1
# ALL-NEXT:     RET 0, implicit %eax
body:             |
  bb.1 (%ir-block.0):
    liveins: %edi

    %0(s16) = COPY %edi
    %1(s32) = G_SEXT %0(s16)
    %eax = COPY %1(s32)
    RET 0, implicit %eax

...