Vendor import of clang release_38 branch r261684:vendor/clang/clang-release_38-r261684

https://llvm.org/svn/llvm-project/cfe/branches/release_38@261684

5 files changed, 44 insertions, 5 deletions

diff --git a/docs/ReleaseNotes.rst b/docs/ReleaseNotes.rst
index 18015f8d7c6e..a9b4b0de2906 100644
--- a/docs/ReleaseNotes.rst
+++ b/docs/ReleaseNotes.rst
@@ -179,6 +179,33 @@ Several additional features/bugfixes have been added to the previous standards:
 
 - Improved diagnostics for function pointers.
 
+OpenMP Support in Clang
+---------------------
+
+OpenMP 3.1 is fully supported and is enabled by default with -fopenmp 
+which now uses the clang OpenMP library instead of the GCC OpenMP library.
+The runtime can be built in-tree.  
+
+In addition to OpenMP 3.1, several important elements of the OpenMP 4.0/4.5 
+are supported as well. We continue to aim to complete OpenMP 4.5
+
+- ``map`` clause
+- task dependencies
+- ``num_teams`` clause
+- ``thread_limit`` clause
+- ``target`` and ``target data`` directive
+- ``target`` directive with implicit data mapping
+- ``target enter data`` and ``target exit data`` directive
+- Array sections [2.4, Array Sections].
+- Directive name modifiers for ``if`` clause [2.12, if Clause].
+- ``linear`` clause can be used in loop-based directives [2.7.2, loop Construct].
+- ``simdlen`` clause [2.8, SIMD Construct].
+- ``hint`` clause [2.13.2, critical Construct].
+- Parsing/semantic analysis of all non-device directives introduced in OpenMP 4.5.
+
+The codegen for OpenMP constructs was significantly improved allowing us to produce much more stable and fast code.
+Full test cases of IR are also implemented.
+
 CUDA Support in Clang
 ---------------------
 Clang has experimental support for end-to-end CUDA compilation now:
diff --git a/lib/CodeGen/TargetInfo.cpp b/lib/CodeGen/TargetInfo.cpp
index cdb325f256f2..3d1ddef94657 100644
--- a/lib/CodeGen/TargetInfo.cpp
+++ b/lib/CodeGen/TargetInfo.cpp
@@ -3475,6 +3475,7 @@ public:
 
 Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
                                       QualType Ty) const {
+  const unsigned OverflowLimit = 8;
   if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
     // TODO: Implement this. For now ignore.
     (void)CTy;
@@ -3517,7 +3518,7 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
   }
 
   llvm::Value *CC =
-      Builder.CreateICmpULT(NumRegs, Builder.getInt8(8), "cond");
+      Builder.CreateICmpULT(NumRegs, Builder.getInt8(OverflowLimit), "cond");
 
   llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
   llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
@@ -3569,6 +3570,8 @@ Address PPC32_SVR4_ABIInfo::EmitVAArg(CodeGenFunction &CGF, Address VAList,
   {
     CGF.EmitBlock(UsingOverflow);
 
+    Builder.CreateStore(Builder.getInt8(OverflowLimit), NumRegsAddr);
+
     // Everything in the overflow area is rounded up to a size of at least 4.
     CharUnits OverflowAreaAlign = CharUnits::fromQuantity(4);
 
diff --git a/lib/Sema/SemaExpr.cpp b/lib/Sema/SemaExpr.cpp
index ebf79812d8dc..5a2eb6060ee9 100644
--- a/lib/Sema/SemaExpr.cpp
+++ b/lib/Sema/SemaExpr.cpp
@@ -1365,10 +1365,13 @@ Sema::CreateGenericSelectionExpr(SourceLocation KeyLoc,
 
   // Decay and strip qualifiers for the controlling expression type, and handle
   // placeholder type replacement. See committee discussion from WG14 DR423.
-  ExprResult R = DefaultFunctionArrayLvalueConversion(ControllingExpr);
-  if (R.isInvalid())
-    return ExprError();
-  ControllingExpr = R.get();
+  {
+    EnterExpressionEvaluationContext Unevaluated(*this, Sema::Unevaluated);
+    ExprResult R = DefaultFunctionArrayLvalueConversion(ControllingExpr);
+    if (R.isInvalid())
+      return ExprError();
+    ControllingExpr = R.get();
+  }
 
   // The controlling expression is an unevaluated operand, so side effects are
   // likely unintended.
diff --git a/test/CodeGen/ppc-varargs-struct.c b/test/CodeGen/ppc-varargs-struct.c
index 1ad57c26b485..d7936a126960 100644
--- a/test/CodeGen/ppc-varargs-struct.c
+++ b/test/CodeGen/ppc-varargs-struct.c
@@ -37,6 +37,7 @@ void testva (int n, ...)
 // CHECK-PPC-NEXT:  br label %[[CONT:[a-z0-9]+]]
 //
 // CHECK-PPC:[[USING_OVERFLOW]]
+// CHECK-PPC-NEXT:  store i8 8, i8* [[GPRPTR]], align 4
 // CHECK-PPC-NEXT:  [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
 // CHECK-PPC-NEXT:  [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
 // CHECK-PPC-NEXT:  %{{[0-9]+}} =  ptrtoint i8* %argp.cur to i32
@@ -76,6 +77,7 @@ void testva (int n, ...)
 // CHECK-PPC-NEXT:  br label %[[CONT:[a-z0-9]+]]
 //
 // CHECK-PPC:[[USING_OVERFLOW]]
+// CHECK-PPC-NEXT:  store i8 8, i8* [[GPRPTR]], align 4
 // CHECK-PPC-NEXT:  [[OVERFLOW_AREA_P:%[0-9]+]] = getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* [[ARRAYDECAY]], i32 0, i32 3
 // CHECK-PPC-NEXT:  [[OVERFLOW_AREA:%.+]] = load i8*, i8** [[OVERFLOW_AREA_P]], align 4
 // CHECK-PPC-NEXT:  [[MEMADDR:%.+]] = bitcast i8* [[OVERFLOW_AREA]] to i32*
diff --git a/test/Sema/generic-selection.c b/test/Sema/generic-selection.c
index 0563ec0f4fc0..5c02005d0fa8 100644
--- a/test/Sema/generic-selection.c
+++ b/test/Sema/generic-selection.c
@@ -31,4 +31,8 @@ void foo(int n) {
 
   const int i = 12;
   int a9[_Generic(i, int: 1, default: 2) == 1 ? 1 : -1];
+
+  // This is expected to not trigger any diagnostics because the controlling
+  // expression is not evaluated.
+  (void)_Generic(*(int *)0, int: 1);
 }