Vendor import of lldb release_39 branch r278877:vendor/lldb/lldb-release_390-r280324vendor/lldb/lldb-release_39-r279689vendor/lldb/lldb-release_39-r279477vendor/lldb/lldb-release_39-r278877

https://llvm.org/svn/llvm-project/lldb/branches/release_39@278877

32 files changed, 715 insertions, 296 deletions

diff --git a/include/lldb/Host/android/Android.h b/include/lldb/Host/android/Android.h
index 8efc1a53b01f..08e7dd93b285 100644
--- a/include/lldb/Host/android/Android.h
+++ b/include/lldb/Host/android/Android.h
@@ -14,9 +14,6 @@
 #include <string>
 #include <errno.h>
 
-#define _isatty			isatty
-#define SYS_tgkill		__NR_tgkill
-
 namespace std
 {
 	template <typename T>
diff --git a/include/lldb/Host/linux/Ptrace.h b/include/lldb/Host/linux/Ptrace.h
index b28bb37715d6..731e435da0db 100644
--- a/include/lldb/Host/linux/Ptrace.h
+++ b/include/lldb/Host/linux/Ptrace.h
@@ -14,33 +14,24 @@
 
 #include <sys/ptrace.h>
 
-#ifdef __ANDROID_NDK__
-#define PT_DETACH PTRACE_DETACH
+#ifndef __GLIBC__
 typedef int __ptrace_request;
 #endif
 
 #define DEBUG_PTRACE_MAXBYTES 20
 
 // Support ptrace extensions even when compiled without required kernel support
-#ifndef PT_GETREGS
-    #ifndef PTRACE_GETREGS
-        #define PTRACE_GETREGS 12
-    #endif
+#ifndef PTRACE_GETREGS
+    #define PTRACE_GETREGS 12
 #endif
-#ifndef PT_SETREGS
-    #ifndef PTRACE_SETREGS
-        #define PTRACE_SETREGS 13
-    #endif
+#ifndef PTRACE_SETREGS
+    #define PTRACE_SETREGS 13
 #endif
-#ifndef PT_GETFPREGS
-    #ifndef PTRACE_GETFPREGS
-        #define PTRACE_GETFPREGS 14
-    #endif
+#ifndef PTRACE_GETFPREGS
+    #define PTRACE_GETFPREGS 14
 #endif
-#ifndef PT_SETFPREGS
-    #ifndef PTRACE_SETFPREGS
-        #define PTRACE_SETFPREGS 15
-    #endif
+#ifndef PTRACE_SETFPREGS
+    #define PTRACE_SETFPREGS 15
 #endif
 #ifndef PTRACE_GETREGSET
     #define PTRACE_GETREGSET 0x4204
diff --git a/include/lldb/Target/RegisterContext.h b/include/lldb/Target/RegisterContext.h
index 037c27adaf10..dfeb18348bf7 100644
--- a/include/lldb/Target/RegisterContext.h
+++ b/include/lldb/Target/RegisterContext.h
@@ -46,6 +46,11 @@ public:
     virtual const RegisterInfo *
     GetRegisterInfoAtIndex (size_t reg) = 0;
 
+    // Detect the register size dynamically.
+    uint32_t
+    UpdateDynamicRegisterSize (const lldb_private::ArchSpec &arch,
+                               RegisterInfo* reg_info);
+
     virtual size_t
     GetRegisterSetCount () = 0;
 
diff --git a/include/lldb/lldb-private-types.h b/include/lldb/lldb-private-types.h
index bdcf532b4305..f5d986e2e993 100644
--- a/include/lldb/lldb-private-types.h
+++ b/include/lldb/lldb-private-types.h
@@ -54,6 +54,10 @@ namespace lldb_private
                                    // null, all registers in this list will be invalidated when the value of this
                                    // register changes.  For example, the invalidate list for eax would be rax
                                    // ax, ah, and al.
+        const uint8_t *dynamic_size_dwarf_expr_bytes; // A DWARF expression that when evaluated gives 
+                                                      // the byte size of this register.
+        size_t dynamic_size_dwarf_len; // The length of the DWARF expression in bytes
+                                       // in the dynamic_size_dwarf_expr_bytes member. 
     };
 
     //----------------------------------------------------------------------
diff --git a/scripts/Xcode/build-llvm.py b/scripts/Xcode/build-llvm.py
index b594a8cfe17b..f0460b6d5603 100755
--- a/scripts/Xcode/build-llvm.py
+++ b/scripts/Xcode/build-llvm.py
@@ -19,11 +19,11 @@ def LLVM_HASH_INCLUDES_DIFFS ():
 # it with regexps.  Only change how this works if you know what you are doing.
 
 def LLVM_REF ():
-    llvm_ref = "master"
+    llvm_ref = "release_39"
     return llvm_ref
 
 def CLANG_REF ():
-    clang_ref = "master"
+    clang_ref = "release_39"
     return clang_ref
 
 # For use with Xcode-style builds
diff --git a/source/Host/common/File.cpp b/source/Host/common/File.cpp
index 9d4ab3d9c55e..89587a999d93 100644
--- a/source/Host/common/File.cpp
+++ b/source/Host/common/File.cpp
@@ -1010,7 +1010,7 @@ File::CalculateInteractiveAndTerminal ()
     {
         m_is_interactive = eLazyBoolNo;
         m_is_real_terminal = eLazyBoolNo;
-#if (defined(_WIN32) || defined(__ANDROID_NDK__))
+#if defined(_WIN32)
         if (_isatty(fd))
         {
             m_is_interactive = eLazyBoolYes;
diff --git a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
index 99856a3684cb..47b98ca85b78 100644
--- a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
+++ b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
@@ -494,9 +494,13 @@ EmulateInstructionMIPS::GetOpcodeForInstruction (const char *op_name)
         //----------------------------------------------------------------------
         // Prologue/Epilogue instructions
         //----------------------------------------------------------------------
-        { "ADDiu",      &EmulateInstructionMIPS::Emulate_ADDiu,       "ADDIU rt,rs,immediate"    },
-        { "SW",         &EmulateInstructionMIPS::Emulate_SW,          "SW rt,offset(rs)"         },
-        { "LW",         &EmulateInstructionMIPS::Emulate_LW,          "LW rt,offset(base)"       },
+        { "ADDiu",      &EmulateInstructionMIPS::Emulate_ADDiu,       "ADDIU rt, rs, immediate"    },
+        { "SW",         &EmulateInstructionMIPS::Emulate_SW,          "SW rt, offset(rs)"          },
+        { "LW",         &EmulateInstructionMIPS::Emulate_LW,          "LW rt, offset(base)"        },
+        { "SUBU",       &EmulateInstructionMIPS::Emulate_SUBU_ADDU,   "SUBU rd, rs, rt"            },
+        { "ADDU",       &EmulateInstructionMIPS::Emulate_SUBU_ADDU,   "ADDU rd, rs, rt"            },
+        { "LUI",        &EmulateInstructionMIPS::Emulate_LUI,          "LUI rt, immediate"          },
+
         //----------------------------------------------------------------------
         // MicroMIPS Prologue/Epilogue instructions
         //----------------------------------------------------------------------
@@ -904,36 +908,57 @@ EmulateInstructionMIPS::nonvolatile_reg_p (uint32_t regnum)
 bool
 EmulateInstructionMIPS::Emulate_ADDiu (llvm::MCInst& insn)
 {
+    // ADDIU rt, rs, immediate
+    // GPR[rt] <- GPR[rs] + sign_extend(immediate)
+
+    uint8_t dst, src;
     bool success = false;
     const uint32_t imm16 = insn.getOperand(2).getImm();
-    uint32_t imm = SignedBits(imm16, 15, 0);
-    uint64_t result;
-    uint32_t src, dst;
+    int64_t imm = SignedBits(imm16, 15, 0);
 
     dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
     src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg());
 
-    /* Check if this is addiu sp,<src>,imm16 */
-    if (dst == dwarf_sp_mips)
+    // If immediate value is greater then 2^16 - 1 then clang generate
+    // LUI, ADDIU, SUBU instructions in prolog.
+    // Example
+    // lui    $1, 0x2
+    // addiu $1, $1, -0x5920
+    // subu  $sp, $sp, $1
+    // In this case, ADDIU dst and src will be same and not equal to sp
+    if (dst == src)
     {
+        Context context;
+
         /* read <src> register */
-        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + src, 0, &success);
+        const int64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + src, 0, &success);
         if (!success)
             return false;
 
-        result = src_opd_val + imm;
+        /* Check if this is daddiu sp, sp, imm16 */
+        if (dst == dwarf_sp_mips)
+        {
+            uint64_t result = src_opd_val + imm;
+            RegisterInfo reg_info_sp;
 
-        Context context;
-        RegisterInfo reg_info_sp;
-        if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips, reg_info_sp))
-            context.SetRegisterPlusOffset (reg_info_sp, imm);
+            if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips, reg_info_sp))
+                context.SetRegisterPlusOffset (reg_info_sp, imm);
 
-        /* We are allocating bytes on stack */
-        context.type = eContextAdjustStackPointer;
+            /* We are allocating bytes on stack */
+            context.type = eContextAdjustStackPointer;
 
-        WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips, result);
+            WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips, result);
+            return true;
+        }
+
+        imm += src_opd_val;
+        context.SetImmediateSigned (imm);
+        context.type = eContextImmediate;
+
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips + dst, imm))
+            return false;
     }
-    
+
     return true;
 }
 
@@ -968,7 +993,7 @@ EmulateInstructionMIPS::Emulate_SW (llvm::MCInst& insn)
     WriteRegisterUnsigned (bad_vaddr_context, eRegisterKindDWARF, dwarf_bad_mips, address);
 
     /* We look for sp based non-volatile register stores */
-    if (base == dwarf_sp_mips && nonvolatile_reg_p (src))
+    if (nonvolatile_reg_p (src))
     {
 
         RegisterInfo reg_info_src;
@@ -1027,7 +1052,7 @@ EmulateInstructionMIPS::Emulate_LW (llvm::MCInst& insn)
     bad_vaddr_context.type = eContextInvalid;
     WriteRegisterUnsigned (bad_vaddr_context, eRegisterKindDWARF, dwarf_bad_mips, address);
 
-    if (base == dwarf_sp_mips && nonvolatile_reg_p (src))
+    if (nonvolatile_reg_p (src))
     {
         RegisterValue data_src;
         RegisterInfo reg_info_src;
@@ -1049,6 +1074,105 @@ EmulateInstructionMIPS::Emulate_LW (llvm::MCInst& insn)
 }
 
 bool
+EmulateInstructionMIPS::Emulate_SUBU_ADDU (llvm::MCInst& insn)
+{
+     // SUBU sp, <src>, <rt>
+     // ADDU sp, <src>, <rt>
+     // ADDU dst, sp, <rt>
+
+    bool success = false;
+    uint64_t result;
+    uint8_t src, dst, rt;
+    const char *op_name = m_insn_info->getName (insn.getOpcode ());
+    
+    dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
+    src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg());
+
+    /* Check if sp is destination register */
+    if (dst == dwarf_sp_mips)
+    {
+        rt = m_reg_info->getEncodingValue (insn.getOperand(2).getReg());
+
+        /* read <src> register */
+        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + src, 0, &success);
+       if (!success)
+           return false;
+
+        /* read <rt > register */
+        uint64_t rt_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + rt, 0, &success);
+        if (!success)
+            return false;
+
+        if (!strcasecmp (op_name, "SUBU"))
+            result = src_opd_val - rt_opd_val;
+        else
+            result = src_opd_val + rt_opd_val;
+
+        Context context;
+        RegisterInfo reg_info_sp;
+        if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips, reg_info_sp))
+            context.SetRegisterPlusOffset (reg_info_sp, rt_opd_val);
+
+        /* We are allocating bytes on stack */
+        context.type = eContextAdjustStackPointer;
+
+        WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips, result);
+
+        return true;
+    }
+    else if (src == dwarf_sp_mips)
+    {
+        rt = m_reg_info->getEncodingValue (insn.getOperand(2).getReg());
+
+        /* read <src> register */
+        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + src, 0, &success);
+        if (!success)
+            return false;
+
+       /* read <rt> register */
+       uint64_t rt_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips + rt, 0, &success);
+       if (!success)
+           return false;
+
+       Context context;
+
+       if (!strcasecmp (op_name, "SUBU"))
+           result = src_opd_val - rt_opd_val;
+       else
+           result = src_opd_val + rt_opd_val; 
+
+       context.SetImmediateSigned (result);
+       context.type = eContextImmediate;
+
+       if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips + dst, result))
+           return false;
+    }
+
+    return true;
+}
+
+bool
+EmulateInstructionMIPS::Emulate_LUI (llvm::MCInst& insn)
+{
+    // LUI rt, immediate
+    // GPR[rt] <- sign_extend(immediate << 16)
+
+    const uint32_t imm32 = insn.getOperand(1).getImm() << 16;
+    int64_t imm = SignedBits(imm32, 31, 0);
+    uint8_t rt;
+    Context context;
+    
+    rt = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
+    context.SetImmediateSigned (imm);
+    context.type = eContextImmediate;
+
+    if (WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips + rt, imm))
+        return true;
+
+    return false;
+}
+
+bool
 EmulateInstructionMIPS::Emulate_ADDIUSP (llvm::MCInst& insn)
 {
     bool success = false;
diff --git a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
index 892de054e2ae..f1f92a065956 100644
--- a/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
+++ b/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
@@ -127,6 +127,12 @@ protected:
     Emulate_ADDiu (llvm::MCInst& insn);
 
     bool
+    Emulate_SUBU_ADDU (llvm::MCInst& insn);
+
+    bool
+    Emulate_LUI (llvm::MCInst& insn);
+
+    bool
     Emulate_SW (llvm::MCInst& insn);
 
     bool
diff --git a/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp b/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
index dd071b00de31..7b4b6aa0100e 100644
--- a/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
+++ b/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
@@ -482,10 +482,15 @@ EmulateInstructionMIPS64::GetOpcodeForInstruction (const char *op_name)
         //----------------------------------------------------------------------
         // Prologue/Epilogue instructions
         //----------------------------------------------------------------------
-        { "DADDiu",     &EmulateInstructionMIPS64::Emulate_DADDiu,      "DADDIU rt,rs,immediate"    },
-        { "ADDiu",      &EmulateInstructionMIPS64::Emulate_DADDiu,      "ADDIU rt,rs,immediate"     },
-        { "SD",         &EmulateInstructionMIPS64::Emulate_SD,          "SD rt,offset(rs)"          },
-        { "LD",         &EmulateInstructionMIPS64::Emulate_LD,          "LD rt,offset(base)"        },
+        { "DADDiu",     &EmulateInstructionMIPS64::Emulate_DADDiu,      "DADDIU rt, rs, immediate"    },
+        { "ADDiu",      &EmulateInstructionMIPS64::Emulate_DADDiu,      "ADDIU  rt, rs, immediate"    },
+        { "SD",         &EmulateInstructionMIPS64::Emulate_SD,          "SD     rt, offset(rs)"       },
+        { "LD",         &EmulateInstructionMIPS64::Emulate_LD,          "LD     rt, offset(base)"     },
+        { "DSUBU",      &EmulateInstructionMIPS64::Emulate_DSUBU_DADDU, "DSUBU  rd, rs, rt"           },
+        { "SUBU",       &EmulateInstructionMIPS64::Emulate_DSUBU_DADDU, "SUBU   rd, rs, rt"           },
+        { "DADDU",      &EmulateInstructionMIPS64::Emulate_DSUBU_DADDU, "DADDU  rd, rs, rt"           },
+        { "ADDU",       &EmulateInstructionMIPS64::Emulate_DSUBU_DADDU, "ADDU   rd, rs, rt"           },
+        { "LUI",        &EmulateInstructionMIPS64::Emulate_LUI,         "LUI    rt, immediate"        },
 
 
 
@@ -771,36 +776,57 @@ EmulateInstructionMIPS64::nonvolatile_reg_p (uint64_t regnum)
 bool
 EmulateInstructionMIPS64::Emulate_DADDiu (llvm::MCInst& insn)
 {
+    // DADDIU rt, rs, immediate
+    // GPR[rt] <- GPR[rs] + sign_extend(immediate)
+
+    uint8_t dst, src;
     bool success = false;
     const uint32_t imm16 = insn.getOperand(2).getImm();
-    uint64_t imm = SignedBits(imm16, 15, 0);
-    uint64_t result;
-    uint32_t src, dst;
+    int64_t imm = SignedBits(imm16, 15, 0);
 
     dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
     src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg());
 
-    /* Check if this is daddiu sp,<src>,imm16 */
-    if (dst == dwarf_sp_mips64)
+    // If immediate is greater than 2^16 - 1 then clang generate
+    // LUI, (D)ADDIU,(D)SUBU instructions in prolog.
+    // Example
+    // lui    $1, 0x2
+    // daddiu $1, $1, -0x5920
+    // dsubu  $sp, $sp, $1
+    // In this case, (D)ADDIU dst and src will be same and not equal to sp
+    if (dst == src)
     {
+        Context context;
+
         /* read <src> register */
-        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + src, 0, &success);
+        const int64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + src, 0, &success);
         if (!success)
             return false;
 
-        result = src_opd_val + imm;
+        /* Check if this is daddiu sp, sp, imm16 */
+        if (dst == dwarf_sp_mips64)
+        {
+            uint64_t result = src_opd_val + imm;
+            RegisterInfo reg_info_sp;
 
-        Context context;
-        RegisterInfo reg_info_sp;
-        if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips64, reg_info_sp))
-            context.SetRegisterPlusOffset (reg_info_sp, imm);
+            if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips64, reg_info_sp))
+                context.SetRegisterPlusOffset (reg_info_sp, imm);
 
-        /* We are allocating bytes on stack */
-        context.type = eContextAdjustStackPointer;
+            /* We are allocating bytes on stack */
+            context.type = eContextAdjustStackPointer;
 
-        WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips64, result);
+            WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips64, result);
+            return true;
+        }
+
+        imm += src_opd_val;
+        context.SetImmediateSigned (imm);
+        context.type = eContextImmediate;
+
+        if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips64 + dst, imm))
+            return false;
     }
-    
+
     return true;
 }
 
@@ -832,7 +858,7 @@ EmulateInstructionMIPS64::Emulate_SD (llvm::MCInst& insn)
     address = address + imm;
 
     /* We look for sp based non-volatile register stores */
-    if (base == dwarf_sp_mips64 && nonvolatile_reg_p (src))
+    if (nonvolatile_reg_p (src))
     {
         Context context;
         RegisterValue data_src;
@@ -888,7 +914,7 @@ EmulateInstructionMIPS64::Emulate_LD (llvm::MCInst& insn)
     WriteRegisterUnsigned (bad_vaddr_context, eRegisterKindDWARF, dwarf_bad_mips64, address);
 
 
-    if (base == dwarf_sp_mips64 && nonvolatile_reg_p (src))
+    if (nonvolatile_reg_p (src))
     {
         RegisterValue data_src;
         RegisterInfo reg_info_src;
@@ -908,6 +934,104 @@ EmulateInstructionMIPS64::Emulate_LD (llvm::MCInst& insn)
     return false;
 }
 
+bool
+EmulateInstructionMIPS64::Emulate_LUI (llvm::MCInst& insn)
+{
+    // LUI rt, immediate
+    // GPR[rt] <- sign_extend(immediate << 16)
+
+    const uint32_t imm32 = insn.getOperand(1).getImm() << 16;
+    int64_t imm = SignedBits(imm32, 31, 0);
+    uint8_t rt;
+    Context context;
+    
+    rt = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
+    context.SetImmediateSigned (imm);
+    context.type = eContextImmediate;
+
+    if (WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips64 + rt, imm))
+        return true;
+
+    return false;
+}
+
+bool
+EmulateInstructionMIPS64::Emulate_DSUBU_DADDU (llvm::MCInst& insn)
+{
+    // DSUBU sp, <src>, <rt>
+    // DADDU sp, <src>, <rt>
+    // DADDU dst, sp, <rt>
+
+    bool success = false;
+    uint64_t result;
+    uint8_t src, dst, rt;
+    const char *op_name = m_insn_info->getName (insn.getOpcode ());
+    
+    dst = m_reg_info->getEncodingValue (insn.getOperand(0).getReg());
+    src = m_reg_info->getEncodingValue (insn.getOperand(1).getReg());
+
+    /* Check if sp is destination register */
+    if (dst == dwarf_sp_mips64)
+    {
+        rt = m_reg_info->getEncodingValue (insn.getOperand(2).getReg());
+
+        /* read <src> register */
+        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + src, 0, &success);
+        if (!success)
+           return false;
+
+        /* read <rt > register */
+        uint64_t rt_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + rt, 0, &success);
+        if (!success)
+            return false;
+
+        if (!strcasecmp (op_name, "DSUBU") || !strcasecmp (op_name, "SUBU"))
+            result = src_opd_val - rt_opd_val;
+        else
+            result = src_opd_val + rt_opd_val;
+
+        Context context;
+        RegisterInfo reg_info_sp;
+        if (GetRegisterInfo (eRegisterKindDWARF, dwarf_sp_mips64, reg_info_sp))
+            context.SetRegisterPlusOffset (reg_info_sp, rt_opd_val);
+
+        /* We are allocating bytes on stack */
+        context.type = eContextAdjustStackPointer;
+
+        WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_sp_mips64, result);
+
+        return true;
+    }
+    else if (src == dwarf_sp_mips64)
+    {
+        rt = m_reg_info->getEncodingValue (insn.getOperand(2).getReg());
+
+        /* read <src> register */
+        uint64_t src_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + src, 0, &success);
+        if (!success)
+            return false;
+
+       /* read <rt> register */
+       uint64_t rt_opd_val = ReadRegisterUnsigned (eRegisterKindDWARF, dwarf_zero_mips64 + rt, 0, &success);
+       if (!success)
+           return false;
+
+       Context context;
+
+       if (!strcasecmp (op_name, "DSUBU") || !strcasecmp (op_name, "SUBU"))
+           result = src_opd_val - rt_opd_val;
+       else
+           result = src_opd_val + rt_opd_val;
+
+       context.SetImmediateSigned (result);
+       context.type = eContextImmediate;
+
+       if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_zero_mips64 + dst, result))
+           return false;
+    }
+
+    return true;
+}
 
 /*
     Emulate below MIPS branch instructions.
diff --git a/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h b/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
index 4ca274c9874b..4ee690bbf184 100644
--- a/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
+++ b/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
@@ -121,6 +121,12 @@ protected:
     Emulate_DADDiu (llvm::MCInst& insn);
 
     bool
+    Emulate_DSUBU_DADDU (llvm::MCInst& insn);
+
+    bool
+    Emulate_LUI (llvm::MCInst& insn);
+
+    bool
     Emulate_SD (llvm::MCInst& insn);
 
     bool
diff --git a/source/Plugins/Process/Linux/NativeProcessLinux.cpp b/source/Plugins/Process/Linux/NativeProcessLinux.cpp
index b3842302c6db..00f4010742b0 100644
--- a/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ b/source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -58,7 +58,6 @@
 #include "lldb/Host/linux/Personality.h"
 #include "lldb/Host/linux/Ptrace.h"
 #include "lldb/Host/linux/Uio.h"
-#include "lldb/Host/android/Android.h"
 
 #define LLDB_PERSONALITY_GET_CURRENT_SETTINGS  0xffffffff
 
diff --git a/source/Plugins/Process/Linux/NativeThreadLinux.cpp b/source/Plugins/Process/Linux/NativeThreadLinux.cpp
index 070b1bcda3b8..6509022b6c6e 100644
--- a/source/Plugins/Process/Linux/NativeThreadLinux.cpp
+++ b/source/Plugins/Process/Linux/NativeThreadLinux.cpp
@@ -30,7 +30,7 @@
 #include <sys/syscall.h>
 // Try to define a macro to encapsulate the tgkill syscall
 #define tgkill(pid, tid, sig) \
-    syscall(SYS_tgkill, static_cast< ::pid_t>(pid), static_cast< ::pid_t>(tid), sig)
+    syscall(__NR_tgkill, static_cast< ::pid_t>(pid), static_cast< ::pid_t>(tid), sig)
 
 using namespace lldb;
 using namespace lldb_private;
diff --git a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
index 26de4b549c9f..6efdb468111b 100644
--- a/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
+++ b/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp
@@ -19,6 +19,7 @@
 #include "lldb/Core/StructuredData.h"
 #include "lldb/DataFormatters/FormatManager.h"
 #include "lldb/Host/StringConvert.h"
+#include "lldb/Utility/StringExtractor.h"
 
 using namespace lldb;
 using namespace lldb_private;
@@ -30,6 +31,7 @@ DynamicRegisterInfo::DynamicRegisterInfo () :
     m_set_names (),
     m_value_regs_map (),
     m_invalidate_regs_map (),
+    m_dynamic_reg_size_map (),
     m_reg_data_byte_size (0),
     m_finalized (false)
 {
@@ -43,6 +45,7 @@ DynamicRegisterInfo::DynamicRegisterInfo(const lldb_private::StructuredData::Dic
     m_set_names (),
     m_value_regs_map (),
     m_invalidate_regs_map (),
+    m_dynamic_reg_size_map (),
     m_reg_data_byte_size (0),
     m_finalized (false)
 {
@@ -292,6 +295,27 @@ DynamicRegisterInfo::SetRegisterInfo(const StructuredData::Dictionary &dict, con
 
         reg_info.byte_size = bitsize / 8;
 
+        std::string dwarf_opcode_string;
+        if (reg_info_dict->GetValueForKeyAsString ("dynamic_size_dwarf_expr_bytes", dwarf_opcode_string))
+        {
+            reg_info.dynamic_size_dwarf_len = dwarf_opcode_string.length () / 2;
+            assert (reg_info.dynamic_size_dwarf_len > 0);
+
+            std::vector<uint8_t> dwarf_opcode_bytes(reg_info.dynamic_size_dwarf_len);
+            uint32_t j;
+            StringExtractor opcode_extractor;
+            // Swap "dwarf_opcode_string" over into "opcode_extractor"
+            opcode_extractor.GetStringRef ().swap (dwarf_opcode_string);
+            uint32_t ret_val = opcode_extractor.GetHexBytesAvail (dwarf_opcode_bytes.data (),
+                                                                  reg_info.dynamic_size_dwarf_len);
+            assert (ret_val == reg_info.dynamic_size_dwarf_len);
+
+            for (j = 0; j < reg_info.dynamic_size_dwarf_len; ++j)
+                m_dynamic_reg_size_map[i].push_back(dwarf_opcode_bytes[j]);
+
+            reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[i].data ();
+        }
+
         std::string format_str;
         if (reg_info_dict->GetValueForKeyAsString("format", format_str, nullptr))
         {
@@ -417,6 +441,14 @@ DynamicRegisterInfo::AddRegister (RegisterInfo &reg_info,
         for (i=0; reg_info.invalidate_regs[i] != LLDB_INVALID_REGNUM; ++i)
             m_invalidate_regs_map[reg_num].push_back(reg_info.invalidate_regs[i]);
     }
+    if (reg_info.dynamic_size_dwarf_expr_bytes)
+    {
+        for (i = 0; i < reg_info.dynamic_size_dwarf_len; ++i)
+           m_dynamic_reg_size_map[reg_num].push_back(reg_info.dynamic_size_dwarf_expr_bytes[i]);
+
+        reg_info.dynamic_size_dwarf_expr_bytes = m_dynamic_reg_size_map[reg_num].data ();
+    }
+
     m_regs.push_back (reg_info);
     uint32_t set = GetRegisterSetIndexByName (set_name, true);
     assert (set < m_sets.size());
@@ -641,6 +673,14 @@ DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i) const
     return NULL;
 }
 
+RegisterInfo *
+DynamicRegisterInfo::GetRegisterInfoAtIndex (uint32_t i)
+{
+    if (i < m_regs.size())
+        return &m_regs[i];
+    return NULL;
+}
+
 const RegisterSet *
 DynamicRegisterInfo::GetRegisterSet (uint32_t i) const
 {
@@ -688,6 +728,7 @@ DynamicRegisterInfo::Clear()
     m_set_names.clear();
     m_value_regs_map.clear();
     m_invalidate_regs_map.clear();
+    m_dynamic_reg_size_map.clear();
     m_reg_data_byte_size = 0;
     m_finalized = false;
 }
diff --git a/source/Plugins/Process/Utility/DynamicRegisterInfo.h b/source/Plugins/Process/Utility/DynamicRegisterInfo.h
index 1b99e2f1e701..d97dc136bd63 100644
--- a/source/Plugins/Process/Utility/DynamicRegisterInfo.h
+++ b/source/Plugins/Process/Utility/DynamicRegisterInfo.h
@@ -56,6 +56,9 @@ public:
     const lldb_private::RegisterInfo *
     GetRegisterInfoAtIndex (uint32_t i) const;
 
+    lldb_private::RegisterInfo *
+    GetRegisterInfoAtIndex (uint32_t i);
+
     const lldb_private::RegisterSet *
     GetRegisterSet (uint32_t i) const;
 
@@ -81,6 +84,8 @@ protected:
     typedef std::vector <reg_num_collection> set_reg_num_collection;
     typedef std::vector <lldb_private::ConstString> name_collection;
     typedef std::map<uint32_t, reg_num_collection> reg_to_regs_map;
+    typedef std::vector <uint8_t> dwarf_opcode;
+    typedef std::map<uint32_t, dwarf_opcode> dynamic_reg_size_map;
 
     lldb_private::RegisterInfo *
     GetRegisterInfo (const lldb_private::ConstString &reg_name);
@@ -91,6 +96,7 @@ protected:
     name_collection m_set_names;
     reg_to_regs_map m_value_regs_map;
     reg_to_regs_map m_invalidate_regs_map;
+    dynamic_reg_size_map m_dynamic_reg_size_map;
     size_t m_reg_data_byte_size;   // The number of bytes required to store all registers
     bool m_finalized;
 };
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
index aa1bace77203..1d0fc4fb7020 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm.cpp
@@ -177,7 +177,7 @@ enum
 #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU))
 #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextDarwin_arm::DBG, reg) + sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC)))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm::GPR) + sizeof (RegisterContextDarwin_arm::FPU) + sizeof (RegisterContextDarwin_arm::EXC))
 
 static RegisterInfo g_register_infos[] = {
diff --git a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
index 7de042dd11a9..53cb9dea0fb2 100644
--- a/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.cpp
@@ -51,7 +51,7 @@ using namespace lldb_private;
 #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU))
 #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
 
 //-----------------------------------------------------------------------------
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
index a507dad69f60..588793d5a644 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm.cpp
@@ -27,7 +27,7 @@ using namespace lldb_private;
 #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU))
 #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm::DBG, reg) + sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC)))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm::GPR) + sizeof (RegisterContextFreeBSD_arm::FPU) + sizeof (RegisterContextFreeBSD_arm::EXC))
 
 //-----------------------------------------------------------------------------
diff --git a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
index d39a9da5714b..6e7e9e67f524 100644
--- a/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextFreeBSD_arm64.cpp
@@ -23,7 +23,7 @@ using namespace lldb;
 #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::EXC, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU))
 #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextFreeBSD_arm64::DBG, reg) + sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextFreeBSD_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextFreeBSD_arm64::GPR) + sizeof (RegisterContextFreeBSD_arm64::FPU) + sizeof (RegisterContextFreeBSD_arm64::EXC))
 
 //-----------------------------------------------------------------------------
diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
index f8d97aa3482c..a4d8738d79bf 100644
--- a/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm.cpp
@@ -26,7 +26,7 @@ using namespace lldb_private;
 #define EXC_OFFSET(idx) ((idx) * 4 + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU))
 #define DBG_OFFSET(reg) ((LLVM_EXTENSION offsetof (RegisterContextLinux_arm::DBG, reg) + sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC)))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm::DBG *)NULL)->reg[i]), DBG_OFFSET(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm::GPR) + sizeof (RegisterContextLinux_arm::FPU) + sizeof (RegisterContextLinux_arm::EXC))
 
 //-----------------------------------------------------------------------------
diff --git a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
index a4ab083995f6..e65537af729a 100644
--- a/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
+++ b/source/Plugins/Process/Utility/RegisterContextLinux_arm64.cpp
@@ -26,7 +26,7 @@
 #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::EXC, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU))
 #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextLinux_arm64::DBG, reg) + sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
 
-#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL
+#define DEFINE_DBG(reg, i)  #reg, NULL, sizeof(((RegisterContextLinux_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, dbg_##reg##i }, NULL, NULL, NULL, 0
 #define REG_CONTEXT_SIZE (sizeof (RegisterContextLinux_arm64::GPR) + sizeof (RegisterContextLinux_arm64::FPU) + sizeof (RegisterContextLinux_arm64::EXC))
 
 
diff --git a/source/Plugins/Process/Utility/RegisterInfos_arm.h b/source/Plugins/Process/Utility/RegisterInfos_arm.h
index 03457728b632..e3c7473bf712 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_arm.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_arm.h
@@ -327,111 +327,111 @@ static uint32_t g_q15_contains[] = { fpu_d30, fpu_d31, LLDB_INVALID_REGNUM };
 static RegisterInfo g_register_infos_arm[] = {
 //  NAME         ALT     SZ   OFFSET          ENCODING          FORMAT                  EH_FRAME             DWARF                GENERIC                     PROCESS PLUGIN       LLDB NATIVE      VALUE REGS      INVALIDATE REGS
 //  ===========  ======= ==   ==============  ================  ====================    ===================  ===================  ==========================  ===================  =============    ==============  =================
-{   "r0",        nullptr, 4,  GPR_OFFSET(0),  eEncodingUint,    eFormatHex,           { ehframe_r0,          dwarf_r0,            LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM, gpr_r0        }, nullptr,        nullptr           },
-{   "r1",        nullptr, 4,  GPR_OFFSET(1),  eEncodingUint,    eFormatHex,           { ehframe_r1,          dwarf_r1,            LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM, gpr_r1        }, nullptr,        nullptr           },
-{   "r2",        nullptr, 4,  GPR_OFFSET(2),  eEncodingUint,    eFormatHex,           { ehframe_r2,          dwarf_r2,            LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM, gpr_r2        }, nullptr,        nullptr           },
-{   "r3",        nullptr, 4,  GPR_OFFSET(3),  eEncodingUint,    eFormatHex,           { ehframe_r3,          dwarf_r3,            LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM, gpr_r3        }, nullptr,        nullptr           },
-{   "r4",        nullptr, 4,  GPR_OFFSET(4),  eEncodingUint,    eFormatHex,           { ehframe_r4,          dwarf_r4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r4        }, nullptr,        nullptr           },
-{   "r5",        nullptr, 4,  GPR_OFFSET(5),  eEncodingUint,    eFormatHex,           { ehframe_r5,          dwarf_r5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r5        }, nullptr,        nullptr           },
-{   "r6",        nullptr, 4,  GPR_OFFSET(6),  eEncodingUint,    eFormatHex,           { ehframe_r6,          dwarf_r6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r6        }, nullptr,        nullptr           },
-{   "r7",        nullptr, 4,  GPR_OFFSET(7),  eEncodingUint,    eFormatHex,           { ehframe_r7,          dwarf_r7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r7        }, nullptr,        nullptr           },
-{   "r8",        nullptr, 4,  GPR_OFFSET(8),  eEncodingUint,    eFormatHex,           { ehframe_r8,          dwarf_r8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r8        }, nullptr,        nullptr           },
-{   "r9",        nullptr, 4,  GPR_OFFSET(9),  eEncodingUint,    eFormatHex,           { ehframe_r9,          dwarf_r9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r9        }, nullptr,        nullptr           },
-{   "r10",       nullptr, 4,  GPR_OFFSET(10), eEncodingUint,    eFormatHex,           { ehframe_r10,         dwarf_r10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r10       }, nullptr,        nullptr           },
-{   "r11",       nullptr, 4,  GPR_OFFSET(11), eEncodingUint,    eFormatHex,           { ehframe_r11,         dwarf_r11,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM, gpr_r11       }, nullptr,        nullptr           },
-{   "r12",       nullptr, 4,  GPR_OFFSET(12), eEncodingUint,    eFormatHex,           { ehframe_r12,         dwarf_r12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r12       }, nullptr,        nullptr           },
-{   "sp",        "r13",   4,  GPR_OFFSET(13), eEncodingUint,    eFormatHex,           { ehframe_sp,          dwarf_sp,            LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM, gpr_sp        }, nullptr,        nullptr           },
-{   "lr",        "r14",   4,  GPR_OFFSET(14), eEncodingUint,    eFormatHex,           { ehframe_lr,          dwarf_lr,            LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM, gpr_lr        }, nullptr,        nullptr           },
-{   "pc",        "r15",   4,  GPR_OFFSET(15), eEncodingUint,    eFormatHex,           { ehframe_pc,          dwarf_pc,            LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM, gpr_pc        }, nullptr,        nullptr           },
-{   "cpsr",      "psr",   4,  GPR_OFFSET(16), eEncodingUint,    eFormatHex,           { ehframe_cpsr,        dwarf_cpsr,          LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM, gpr_cpsr      }, nullptr,        nullptr           },
-
-{   "s0",        nullptr, 4,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s0        }, nullptr,        g_s0_invalidates  },
-{   "s1",        nullptr, 4,  FPU_OFFSET(1),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s1        }, nullptr,        g_s1_invalidates  },
-{   "s2",        nullptr, 4,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s2        }, nullptr,        g_s2_invalidates  },
-{   "s3",        nullptr, 4,  FPU_OFFSET(3),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s3        }, nullptr,        g_s3_invalidates  },
-{   "s4",        nullptr, 4,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s4        }, nullptr,        g_s4_invalidates  },
-{   "s5",        nullptr, 4,  FPU_OFFSET(5),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s5        }, nullptr,        g_s5_invalidates  },
-{   "s6",        nullptr, 4,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s6        }, nullptr,        g_s6_invalidates  },
-{   "s7",        nullptr, 4,  FPU_OFFSET(7),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s7        }, nullptr,        g_s7_invalidates  },
-{   "s8",        nullptr, 4,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s8        }, nullptr,        g_s8_invalidates  },
-{   "s9",        nullptr, 4,  FPU_OFFSET(9),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s9        }, nullptr,        g_s9_invalidates  },
-{   "s10",       nullptr, 4,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s10       }, nullptr,        g_s10_invalidates },
-{   "s11",       nullptr, 4,  FPU_OFFSET(11), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s11       }, nullptr,        g_s11_invalidates },
-{   "s12",       nullptr, 4,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s12       }, nullptr,        g_s12_invalidates },
-{   "s13",       nullptr, 4,  FPU_OFFSET(13), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s13       }, nullptr,        g_s13_invalidates },
-{   "s14",       nullptr, 4,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s14       }, nullptr,        g_s14_invalidates },
-{   "s15",       nullptr, 4,  FPU_OFFSET(15), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s15       }, nullptr,        g_s15_invalidates },
-{   "s16",       nullptr, 4,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s16       }, nullptr,        g_s16_invalidates },
-{   "s17",       nullptr, 4,  FPU_OFFSET(17), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s17       }, nullptr,        g_s17_invalidates },
-{   "s18",       nullptr, 4,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s18       }, nullptr,        g_s18_invalidates },
-{   "s19",       nullptr, 4,  FPU_OFFSET(19), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s19       }, nullptr,        g_s19_invalidates },
-{   "s20",       nullptr, 4,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s20       }, nullptr,        g_s20_invalidates },
-{   "s21",       nullptr, 4,  FPU_OFFSET(21), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s21       }, nullptr,        g_s21_invalidates },
-{   "s22",       nullptr, 4,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s22       }, nullptr,        g_s22_invalidates },
-{   "s23",       nullptr, 4,  FPU_OFFSET(23), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s23       }, nullptr,        g_s23_invalidates },
-{   "s24",       nullptr, 4,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s24       }, nullptr,        g_s24_invalidates },
-{   "s25",       nullptr, 4,  FPU_OFFSET(25), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s25       }, nullptr,        g_s25_invalidates },
-{   "s26",       nullptr, 4,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s26       }, nullptr,        g_s26_invalidates },
-{   "s27",       nullptr, 4,  FPU_OFFSET(27), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s27       }, nullptr,        g_s27_invalidates },
-{   "s28",       nullptr, 4,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s28       }, nullptr,        g_s28_invalidates },
-{   "s29",       nullptr, 4,  FPU_OFFSET(29), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s29       }, nullptr,        g_s29_invalidates },
-{   "s30",       nullptr, 4,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s30       }, nullptr,        g_s30_invalidates },
-{   "s31",       nullptr, 4,  FPU_OFFSET(31), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s31       }, nullptr,        g_s31_invalidates },
-{   "fpscr",     nullptr, 4,  FPSCR_OFFSET,   eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_fpscr     }, nullptr,        nullptr           },
-
-{   "d0",        nullptr, 8,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d0        }, g_d0_contains,  g_d0_invalidates  },
-{   "d1",        nullptr, 8,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d1        }, g_d1_contains,  g_d1_invalidates  },
-{   "d2",        nullptr, 8,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d2        }, g_d2_contains,  g_d2_invalidates  },
-{   "d3",        nullptr, 8,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d3        }, g_d3_contains,  g_d3_invalidates  },
-{   "d4",        nullptr, 8,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d4        }, g_d4_contains,  g_d4_invalidates  },
-{   "d5",        nullptr, 8,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d5        }, g_d5_contains,  g_d5_invalidates  },
-{   "d6",        nullptr, 8,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d6        }, g_d6_contains,  g_d6_invalidates  },
-{   "d7",        nullptr, 8,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d7        }, g_d7_contains,  g_d7_invalidates  },
-{   "d8",        nullptr, 8,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d8        }, g_d8_contains,  g_d8_invalidates  },
-{   "d9",        nullptr, 8,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d9        }, g_d9_contains,  g_d9_invalidates  },
-{   "d10",       nullptr, 8,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d10       }, g_d10_contains, g_d10_invalidates },
-{   "d11",       nullptr, 8,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d11       }, g_d11_contains, g_d11_invalidates },
-{   "d12",       nullptr, 8,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d12       }, g_d12_contains, g_d12_invalidates },
-{   "d13",       nullptr, 8,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d13       }, g_d13_contains, g_d13_invalidates },
-{   "d14",       nullptr, 8,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d14       }, g_d14_contains, g_d14_invalidates },
-{   "d15",       nullptr, 8,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d15       }, g_d15_contains, g_d15_invalidates },
-{   "d16",       nullptr, 8,  FPU_OFFSET(32), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d16       }, nullptr,        g_d16_invalidates },
-{   "d17",       nullptr, 8,  FPU_OFFSET(34), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d17       }, nullptr,        g_d17_invalidates },
-{   "d18",       nullptr, 8,  FPU_OFFSET(36), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d18       }, nullptr,        g_d18_invalidates },
-{   "d19",       nullptr, 8,  FPU_OFFSET(38), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d19       }, nullptr,        g_d19_invalidates },
-{   "d20",       nullptr, 8,  FPU_OFFSET(40), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d20       }, nullptr,        g_d20_invalidates },
-{   "d21",       nullptr, 8,  FPU_OFFSET(42), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d21       }, nullptr,        g_d21_invalidates },
-{   "d22",       nullptr, 8,  FPU_OFFSET(44), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d22       }, nullptr,        g_d22_invalidates },
-{   "d23",       nullptr, 8,  FPU_OFFSET(46), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d23       }, nullptr,        g_d23_invalidates },
-{   "d24",       nullptr, 8,  FPU_OFFSET(48), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d24       }, nullptr,        g_d24_invalidates },
-{   "d25",       nullptr, 8,  FPU_OFFSET(50), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d25       }, nullptr,        g_d25_invalidates },
-{   "d26",       nullptr, 8,  FPU_OFFSET(52), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d26       }, nullptr,        g_d26_invalidates },
-{   "d27",       nullptr, 8,  FPU_OFFSET(54), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d27       }, nullptr,        g_d27_invalidates },
-{   "d28",       nullptr, 8,  FPU_OFFSET(56), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d28       }, nullptr,        g_d28_invalidates },
-{   "d29",       nullptr, 8,  FPU_OFFSET(58), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d29       }, nullptr,        g_d29_invalidates },
-{   "d30",       nullptr, 8,  FPU_OFFSET(60), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d30       }, nullptr,        g_d30_invalidates },
-{   "d31",       nullptr, 8,  FPU_OFFSET(62), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d31       }, nullptr,        g_d31_invalidates },
-
-{   "q0",        nullptr, 16, FPU_OFFSET(0),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q0        }, g_q0_contains,  nullptr,          },
-{   "q1",        nullptr, 16, FPU_OFFSET(4),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q1        }, g_q1_contains,  nullptr,          },
-{   "q2",        nullptr, 16, FPU_OFFSET(8),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q2        }, g_q2_contains,  nullptr,          },
-{   "q3",        nullptr, 16, FPU_OFFSET(12), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q3        }, g_q3_contains,  nullptr,          },
-{   "q4",        nullptr, 16, FPU_OFFSET(16), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q4        }, g_q4_contains,  nullptr,          },
-{   "q5",        nullptr, 16, FPU_OFFSET(20), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q5        }, g_q5_contains,  nullptr,          },
-{   "q6",        nullptr, 16, FPU_OFFSET(24), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q6        }, g_q6_contains,  nullptr,          },
-{   "q7",        nullptr, 16, FPU_OFFSET(28), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q7        }, g_q7_contains,  nullptr,          },
-{   "q8",        nullptr, 16, FPU_OFFSET(32), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q8        }, g_q8_contains,  nullptr,          },
-{   "q9",        nullptr, 16, FPU_OFFSET(36), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q9        }, g_q9_contains,  nullptr,          },
-{   "q10",       nullptr, 16, FPU_OFFSET(40), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q10       }, g_q10_contains, nullptr,          },
-{   "q11",       nullptr, 16, FPU_OFFSET(44), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q11       }, g_q11_contains, nullptr,          },
-{   "q12",       nullptr, 16, FPU_OFFSET(48), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q12       }, g_q12_contains, nullptr,          },
-{   "q13",       nullptr, 16, FPU_OFFSET(52), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q13       }, g_q13_contains, nullptr,          },
-{   "q14",       nullptr, 16, FPU_OFFSET(56), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q14       }, g_q14_contains, nullptr,          },
-{   "q15",       nullptr, 16, FPU_OFFSET(60), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q15       }, g_q15_contains, nullptr,          },
-
-{   "exception", nullptr, 4,  EXC_OFFSET(0),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_exception }, nullptr,           nullptr        },
-{   "fsr",       nullptr, 4,  EXC_OFFSET(1),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_fsr       }, nullptr,           nullptr        },
-{   "far",       nullptr, 4,  EXC_OFFSET(2),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_far       }, nullptr,           nullptr        },
+{   "r0",        nullptr, 4,  GPR_OFFSET(0),  eEncodingUint,    eFormatHex,           { ehframe_r0,          dwarf_r0,            LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM, gpr_r0        }, nullptr,        nullptr, nullptr, 0},
+{   "r1",        nullptr, 4,  GPR_OFFSET(1),  eEncodingUint,    eFormatHex,           { ehframe_r1,          dwarf_r1,            LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM, gpr_r1        }, nullptr,        nullptr, nullptr, 0},
+{   "r2",        nullptr, 4,  GPR_OFFSET(2),  eEncodingUint,    eFormatHex,           { ehframe_r2,          dwarf_r2,            LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM, gpr_r2        }, nullptr,        nullptr, nullptr, 0},
+{   "r3",        nullptr, 4,  GPR_OFFSET(3),  eEncodingUint,    eFormatHex,           { ehframe_r3,          dwarf_r3,            LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM, gpr_r3        }, nullptr,        nullptr, nullptr, 0},
+{   "r4",        nullptr, 4,  GPR_OFFSET(4),  eEncodingUint,    eFormatHex,           { ehframe_r4,          dwarf_r4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r4        }, nullptr,        nullptr, nullptr, 0},
+{   "r5",        nullptr, 4,  GPR_OFFSET(5),  eEncodingUint,    eFormatHex,           { ehframe_r5,          dwarf_r5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r5        }, nullptr,        nullptr, nullptr, 0},
+{   "r6",        nullptr, 4,  GPR_OFFSET(6),  eEncodingUint,    eFormatHex,           { ehframe_r6,          dwarf_r6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r6        }, nullptr,        nullptr, nullptr, 0},
+{   "r7",        nullptr, 4,  GPR_OFFSET(7),  eEncodingUint,    eFormatHex,           { ehframe_r7,          dwarf_r7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r7        }, nullptr,        nullptr, nullptr, 0},
+{   "r8",        nullptr, 4,  GPR_OFFSET(8),  eEncodingUint,    eFormatHex,           { ehframe_r8,          dwarf_r8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r8        }, nullptr,        nullptr, nullptr, 0},
+{   "r9",        nullptr, 4,  GPR_OFFSET(9),  eEncodingUint,    eFormatHex,           { ehframe_r9,          dwarf_r9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r9        }, nullptr,        nullptr, nullptr, 0},
+{   "r10",       nullptr, 4,  GPR_OFFSET(10), eEncodingUint,    eFormatHex,           { ehframe_r10,         dwarf_r10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r10       }, nullptr,        nullptr, nullptr, 0},
+{   "r11",       nullptr, 4,  GPR_OFFSET(11), eEncodingUint,    eFormatHex,           { ehframe_r11,         dwarf_r11,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM, gpr_r11       }, nullptr,        nullptr, nullptr, 0},
+{   "r12",       nullptr, 4,  GPR_OFFSET(12), eEncodingUint,    eFormatHex,           { ehframe_r12,         dwarf_r12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, gpr_r12       }, nullptr,        nullptr, nullptr, 0},
+{   "sp",        "r13",   4,  GPR_OFFSET(13), eEncodingUint,    eFormatHex,           { ehframe_sp,          dwarf_sp,            LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM, gpr_sp        }, nullptr,        nullptr, nullptr, 0},
+{   "lr",        "r14",   4,  GPR_OFFSET(14), eEncodingUint,    eFormatHex,           { ehframe_lr,          dwarf_lr,            LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM, gpr_lr        }, nullptr,        nullptr, nullptr, 0},
+{   "pc",        "r15",   4,  GPR_OFFSET(15), eEncodingUint,    eFormatHex,           { ehframe_pc,          dwarf_pc,            LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM, gpr_pc        }, nullptr,        nullptr, nullptr, 0},
+{   "cpsr",      "psr",   4,  GPR_OFFSET(16), eEncodingUint,    eFormatHex,           { ehframe_cpsr,        dwarf_cpsr,          LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM, gpr_cpsr      }, nullptr,        nullptr, nullptr, 0},
+
+{   "s0",        nullptr, 4,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s0        }, nullptr, g_s0_invalidates, nullptr, 0},
+{   "s1",        nullptr, 4,  FPU_OFFSET(1),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s1        }, nullptr, g_s1_invalidates, nullptr, 0},
+{   "s2",        nullptr, 4,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s2        }, nullptr, g_s2_invalidates, nullptr, 0},
+{   "s3",        nullptr, 4,  FPU_OFFSET(3),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s3        }, nullptr, g_s3_invalidates, nullptr, 0},
+{   "s4",        nullptr, 4,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s4        }, nullptr, g_s4_invalidates, nullptr, 0},
+{   "s5",        nullptr, 4,  FPU_OFFSET(5),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s5        }, nullptr, g_s5_invalidates, nullptr, 0},
+{   "s6",        nullptr, 4,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s6        }, nullptr, g_s6_invalidates, nullptr, 0},
+{   "s7",        nullptr, 4,  FPU_OFFSET(7),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s7        }, nullptr, g_s7_invalidates, nullptr, 0},
+{   "s8",        nullptr, 4,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s8        }, nullptr, g_s8_invalidates, nullptr, 0},
+{   "s9",        nullptr, 4,  FPU_OFFSET(9),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s9        }, nullptr, g_s9_invalidates, nullptr, 0},
+{   "s10",       nullptr, 4,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s10       }, nullptr, g_s10_invalidates, nullptr, 0},
+{   "s11",       nullptr, 4,  FPU_OFFSET(11), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s11       }, nullptr, g_s11_invalidates, nullptr, 0},
+{   "s12",       nullptr, 4,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s12       }, nullptr, g_s12_invalidates, nullptr, 0},
+{   "s13",       nullptr, 4,  FPU_OFFSET(13), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s13       }, nullptr, g_s13_invalidates, nullptr, 0},
+{   "s14",       nullptr, 4,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s14       }, nullptr, g_s14_invalidates, nullptr, 0},
+{   "s15",       nullptr, 4,  FPU_OFFSET(15), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s15       }, nullptr, g_s15_invalidates, nullptr, 0},
+{   "s16",       nullptr, 4,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s16       }, nullptr, g_s16_invalidates, nullptr, 0},
+{   "s17",       nullptr, 4,  FPU_OFFSET(17), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s17       }, nullptr, g_s17_invalidates, nullptr, 0},
+{   "s18",       nullptr, 4,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s18       }, nullptr, g_s18_invalidates, nullptr, 0},
+{   "s19",       nullptr, 4,  FPU_OFFSET(19), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s19       }, nullptr, g_s19_invalidates, nullptr, 0},
+{   "s20",       nullptr, 4,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s20       }, nullptr, g_s20_invalidates, nullptr, 0},
+{   "s21",       nullptr, 4,  FPU_OFFSET(21), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s21       }, nullptr, g_s21_invalidates, nullptr, 0},
+{   "s22",       nullptr, 4,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s22       }, nullptr, g_s22_invalidates, nullptr, 0},
+{   "s23",       nullptr, 4,  FPU_OFFSET(23), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s23       }, nullptr, g_s23_invalidates, nullptr, 0},
+{   "s24",       nullptr, 4,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s24       }, nullptr, g_s24_invalidates, nullptr, 0},
+{   "s25",       nullptr, 4,  FPU_OFFSET(25), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s25       }, nullptr, g_s25_invalidates, nullptr, 0},
+{   "s26",       nullptr, 4,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s26       }, nullptr, g_s26_invalidates, nullptr, 0},
+{   "s27",       nullptr, 4,  FPU_OFFSET(27), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s27       }, nullptr, g_s27_invalidates, nullptr, 0},
+{   "s28",       nullptr, 4,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s28       }, nullptr, g_s28_invalidates, nullptr, 0},
+{   "s29",       nullptr, 4,  FPU_OFFSET(29), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s29       }, nullptr, g_s29_invalidates, nullptr, 0},
+{   "s30",       nullptr, 4,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s30       }, nullptr, g_s30_invalidates, nullptr, 0},
+{   "s31",       nullptr, 4,  FPU_OFFSET(31), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_s31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_s31       }, nullptr, g_s31_invalidates, nullptr, 0},
+{   "fpscr",     nullptr, 4,  FPSCR_OFFSET,   eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_fpscr     }, nullptr,        nullptr, nullptr,    0},
+
+{   "d0",        nullptr, 8,  FPU_OFFSET(0),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d0        }, g_d0_contains, g_d0_invalidates, nullptr, 0},
+{   "d1",        nullptr, 8,  FPU_OFFSET(2),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d1        }, g_d1_contains, g_d1_invalidates, nullptr, 0},
+{   "d2",        nullptr, 8,  FPU_OFFSET(4),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d2        }, g_d2_contains, g_d2_invalidates, nullptr, 0},
+{   "d3",        nullptr, 8,  FPU_OFFSET(6),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d3        }, g_d3_contains, g_d3_invalidates, nullptr, 0},
+{   "d4",        nullptr, 8,  FPU_OFFSET(8),  eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d4        }, g_d4_contains, g_d4_invalidates, nullptr, 0},
+{   "d5",        nullptr, 8,  FPU_OFFSET(10), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d5        }, g_d5_contains, g_d5_invalidates, nullptr, 0},
+{   "d6",        nullptr, 8,  FPU_OFFSET(12), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d6        }, g_d6_contains, g_d6_invalidates, nullptr, 0},
+{   "d7",        nullptr, 8,  FPU_OFFSET(14), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d7        }, g_d7_contains, g_d7_invalidates, nullptr, 0},
+{   "d8",        nullptr, 8,  FPU_OFFSET(16), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d8        }, g_d8_contains, g_d8_invalidates, nullptr, 0},
+{   "d9",        nullptr, 8,  FPU_OFFSET(18), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d9        }, g_d9_contains, g_d9_invalidates, nullptr, 0},
+{   "d10",       nullptr, 8,  FPU_OFFSET(20), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d10,           LLDB_INVALID_REGNUM,       LLDB_INVALID_REGNUM, fpu_d10      }, g_d10_contains, g_d10_invalidates, nullptr, 0},
+{   "d11",       nullptr, 8,  FPU_OFFSET(22), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d11     }, g_d11_contains, g_d11_invalidates, nullptr, 0},
+{   "d12",       nullptr, 8,  FPU_OFFSET(24), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d12     }, g_d12_contains, g_d12_invalidates, nullptr, 0},
+{   "d13",       nullptr, 8,  FPU_OFFSET(26), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d13     }, g_d13_contains, g_d13_invalidates, nullptr, 0},
+{   "d14",       nullptr, 8,  FPU_OFFSET(28), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d14     }, g_d14_contains, g_d14_invalidates, nullptr, 0},
+{   "d15",       nullptr, 8,  FPU_OFFSET(30), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d15     }, g_d15_contains, g_d15_invalidates, nullptr, 0},
+{   "d16",       nullptr, 8,  FPU_OFFSET(32), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d16,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d16     }, nullptr,   g_d16_invalidates, nullptr, 0 },
+{   "d17",       nullptr, 8,  FPU_OFFSET(34), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d17,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d17       }, nullptr, g_d17_invalidates, nullptr, 0},
+{   "d18",       nullptr, 8,  FPU_OFFSET(36), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d18,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d18       }, nullptr, g_d18_invalidates, nullptr, 0},
+{   "d19",       nullptr, 8,  FPU_OFFSET(38), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d19,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d19       }, nullptr, g_d19_invalidates, nullptr, 0},
+{   "d20",       nullptr, 8,  FPU_OFFSET(40), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d20,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d20       }, nullptr, g_d20_invalidates, nullptr, 0},
+{   "d21",       nullptr, 8,  FPU_OFFSET(42), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d21,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d21       }, nullptr, g_d21_invalidates, nullptr, 0},
+{   "d22",       nullptr, 8,  FPU_OFFSET(44), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d22,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d22       }, nullptr, g_d22_invalidates, nullptr, 0},
+{   "d23",       nullptr, 8,  FPU_OFFSET(46), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d23,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d23       }, nullptr, g_d23_invalidates, nullptr, 0},
+{   "d24",       nullptr, 8,  FPU_OFFSET(48), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d24,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d24       }, nullptr, g_d24_invalidates, nullptr, 0},
+{   "d25",       nullptr, 8,  FPU_OFFSET(50), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d25,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d25       }, nullptr, g_d25_invalidates, nullptr, 0},
+{   "d26",       nullptr, 8,  FPU_OFFSET(52), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d26,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d26       }, nullptr, g_d26_invalidates, nullptr, 0},
+{   "d27",       nullptr, 8,  FPU_OFFSET(54), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d27,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d27       }, nullptr, g_d27_invalidates, nullptr, 0},
+{   "d28",       nullptr, 8,  FPU_OFFSET(56), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d28,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d28       }, nullptr, g_d28_invalidates, nullptr, 0},
+{   "d29",       nullptr, 8,  FPU_OFFSET(58), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d29,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d29       }, nullptr, g_d29_invalidates, nullptr, 0},
+{   "d30",       nullptr, 8,  FPU_OFFSET(60), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d30,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d30       }, nullptr, g_d30_invalidates, nullptr, 0},
+{   "d31",       nullptr, 8,  FPU_OFFSET(62), eEncodingIEEE754, eFormatFloat,         { LLDB_INVALID_REGNUM, dwarf_d31,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_d31       }, nullptr, g_d31_invalidates, nullptr, 0},
+
+{   "q0",        nullptr, 16, FPU_OFFSET(0),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q0        }, g_q0_contains,  nullptr, nullptr, 0},
+{   "q1",        nullptr, 16, FPU_OFFSET(4),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q1        }, g_q1_contains,  nullptr, nullptr, 0},
+{   "q2",        nullptr, 16, FPU_OFFSET(8),  eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q2        }, g_q2_contains,  nullptr, nullptr, 0},
+{   "q3",        nullptr, 16, FPU_OFFSET(12), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q3        }, g_q3_contains,  nullptr, nullptr, 0},
+{   "q4",        nullptr, 16, FPU_OFFSET(16), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q4        }, g_q4_contains,  nullptr, nullptr, 0},
+{   "q5",        nullptr, 16, FPU_OFFSET(20), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q5        }, g_q5_contains,  nullptr, nullptr, 0},
+{   "q6",        nullptr, 16, FPU_OFFSET(24), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q6        }, g_q6_contains,  nullptr, nullptr, 0},
+{   "q7",        nullptr, 16, FPU_OFFSET(28), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q7        }, g_q7_contains,  nullptr, nullptr, 0},
+{   "q8",        nullptr, 16, FPU_OFFSET(32), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q8        }, g_q8_contains,  nullptr, nullptr, 0},
+{   "q9",        nullptr, 16, FPU_OFFSET(36), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9,            LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q9        }, g_q9_contains,  nullptr, nullptr, 0},
+{   "q10",       nullptr, 16, FPU_OFFSET(40), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q10       }, g_q10_contains, nullptr, nullptr, 0},
+{   "q11",       nullptr, 16, FPU_OFFSET(44), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q11       }, g_q11_contains, nullptr, nullptr, 0},
+{   "q12",       nullptr, 16, FPU_OFFSET(48), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q12       }, g_q12_contains, nullptr, nullptr, 0},
+{   "q13",       nullptr, 16, FPU_OFFSET(52), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q13       }, g_q13_contains, nullptr, nullptr, 0},
+{   "q14",       nullptr, 16, FPU_OFFSET(56), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q14       }, g_q14_contains, nullptr, nullptr, 0},
+{   "q15",       nullptr, 16, FPU_OFFSET(60), eEncodingVector,  eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, fpu_q15       }, g_q15_contains, nullptr, nullptr, 0},
+
+{   "exception", nullptr, 4,  EXC_OFFSET(0),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_exception }, nullptr,           nullptr, nullptr, 0},
+{   "fsr",       nullptr, 4,  EXC_OFFSET(1),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_fsr       }, nullptr,           nullptr, nullptr, 0},
+{   "far",       nullptr, 4,  EXC_OFFSET(2),  eEncodingUint,    eFormatHex,           { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM, exc_far       }, nullptr,           nullptr, nullptr, 0},
 
 {   DEFINE_DBG (bvr, 0) },
 {   DEFINE_DBG (bvr, 1) },
diff --git a/source/Plugins/Process/Utility/RegisterInfos_arm64.h b/source/Plugins/Process/Utility/RegisterInfos_arm64.h
index 715321149a73..f360f25501e7 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_arm64.h
@@ -202,82 +202,82 @@ static lldb_private::RegisterInfo g_register_infos_arm64[] = {
 // General purpose registers
 //  NAME        ALT     SZ  OFFSET              ENCODING                FORMAT                 EH_FRAME                     DWARF                      GENERIC                     PROCESS PLUGIN          LLDB NATIVE   VALUE REGS    INVALIDATE REGS
 //  ======      ======= ==  =============       =============         ============            ===============              ===============            =========================   =====================   ============= ==========    ===============
-{   "x0",       nullptr,  8,  GPR_OFFSET(0),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x0,           arm64_dwarf::x0,           LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM,       gpr_x0      },      nullptr,        nullptr},
-{   "x1",       nullptr,  8,  GPR_OFFSET(1),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x1,           arm64_dwarf::x1,           LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM,       gpr_x1      },      nullptr,        nullptr},
-{   "x2",       nullptr,  8,  GPR_OFFSET(2),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x2,           arm64_dwarf::x2,           LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM,       gpr_x2      },      nullptr,        nullptr},
-{   "x3",       nullptr,  8,  GPR_OFFSET(3),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x3,           arm64_dwarf::x3,           LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM,       gpr_x3      },      nullptr,        nullptr},
-{   "x4",       nullptr,  8,  GPR_OFFSET(4),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x4,           arm64_dwarf::x4,           LLDB_REGNUM_GENERIC_ARG5,   LLDB_INVALID_REGNUM,       gpr_x4      },      nullptr,        nullptr},
-{   "x5",       nullptr,  8,  GPR_OFFSET(5),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x5,           arm64_dwarf::x5,           LLDB_REGNUM_GENERIC_ARG6,   LLDB_INVALID_REGNUM,       gpr_x5      },      nullptr,        nullptr},
-{   "x6",       nullptr,  8,  GPR_OFFSET(6),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x6,           arm64_dwarf::x6,           LLDB_REGNUM_GENERIC_ARG7,   LLDB_INVALID_REGNUM,       gpr_x6      },      nullptr,        nullptr},
-{   "x7",       nullptr,  8,  GPR_OFFSET(7),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x7,           arm64_dwarf::x7,           LLDB_REGNUM_GENERIC_ARG8,   LLDB_INVALID_REGNUM,       gpr_x7      },      nullptr,        nullptr},
-{   "x8",       nullptr,  8,  GPR_OFFSET(8),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x8,           arm64_dwarf::x8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x8      },      nullptr,        nullptr},
-{   "x9",       nullptr,  8,  GPR_OFFSET(9),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x9,           arm64_dwarf::x9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x9      },      nullptr,        nullptr},
-{   "x10",      nullptr,  8,  GPR_OFFSET(10),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x10,          arm64_dwarf::x10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x10     },      nullptr,        nullptr},
-{   "x11",      nullptr,  8,  GPR_OFFSET(11),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x11,          arm64_dwarf::x11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x11     },      nullptr,        nullptr},
-{   "x12",      nullptr,  8,  GPR_OFFSET(12),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x12,          arm64_dwarf::x12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x12     },      nullptr,        nullptr},
-{   "x13",      nullptr,  8,  GPR_OFFSET(13),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x13,          arm64_dwarf::x13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x13     },      nullptr,        nullptr},
-{   "x14",      nullptr,  8,  GPR_OFFSET(14),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x14,          arm64_dwarf::x14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x14     },      nullptr,        nullptr},
-{   "x15",      nullptr,  8,  GPR_OFFSET(15),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x15,          arm64_dwarf::x15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x15     },      nullptr,        nullptr},
-{   "x16",      nullptr,  8,  GPR_OFFSET(16),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x16,          arm64_dwarf::x16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x16     },      nullptr,        nullptr},
-{   "x17",      nullptr,  8,  GPR_OFFSET(17),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x17,          arm64_dwarf::x17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x17     },      nullptr,        nullptr},
-{   "x18",      nullptr,  8,  GPR_OFFSET(18),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x18,          arm64_dwarf::x18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x18     },      nullptr,        nullptr},
-{   "x19",      nullptr,  8,  GPR_OFFSET(19),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x19,          arm64_dwarf::x19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x19     },      nullptr,        nullptr},
-{   "x20",      nullptr,  8,  GPR_OFFSET(20),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x20,          arm64_dwarf::x20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x20     },      nullptr,        nullptr},
-{   "x21",      nullptr,  8,  GPR_OFFSET(21),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x21,          arm64_dwarf::x21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x21     },      nullptr,        nullptr},
-{   "x22",      nullptr,  8,  GPR_OFFSET(22),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x22,          arm64_dwarf::x22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x22     },      nullptr,        nullptr},
-{   "x23",      nullptr,  8,  GPR_OFFSET(23),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x23,          arm64_dwarf::x23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x23     },      nullptr,        nullptr},
-{   "x24",      nullptr,  8,  GPR_OFFSET(24),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x24,          arm64_dwarf::x24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x24     },      nullptr,        nullptr},
-{   "x25",      nullptr,  8,  GPR_OFFSET(25),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x25,          arm64_dwarf::x25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x25     },      nullptr,        nullptr},
-{   "x26",      nullptr,  8,  GPR_OFFSET(26),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x26,          arm64_dwarf::x26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x26     },      nullptr,        nullptr},
-{   "x27",      nullptr,  8,  GPR_OFFSET(27),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x27,          arm64_dwarf::x27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x27     },      nullptr,        nullptr},
-{   "x28",      nullptr,  8,  GPR_OFFSET(28),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x28,          arm64_dwarf::x28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x28     },      nullptr,        nullptr},
+{   "x0",       nullptr,  8,  GPR_OFFSET(0),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x0,           arm64_dwarf::x0,           LLDB_REGNUM_GENERIC_ARG1,   LLDB_INVALID_REGNUM,       gpr_x0      },      nullptr,        nullptr, nullptr, 0},
+{   "x1",       nullptr,  8,  GPR_OFFSET(1),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x1,           arm64_dwarf::x1,           LLDB_REGNUM_GENERIC_ARG2,   LLDB_INVALID_REGNUM,       gpr_x1      },      nullptr,        nullptr, nullptr, 0},
+{   "x2",       nullptr,  8,  GPR_OFFSET(2),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x2,           arm64_dwarf::x2,           LLDB_REGNUM_GENERIC_ARG3,   LLDB_INVALID_REGNUM,       gpr_x2      },      nullptr,        nullptr, nullptr, 0},
+{   "x3",       nullptr,  8,  GPR_OFFSET(3),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x3,           arm64_dwarf::x3,           LLDB_REGNUM_GENERIC_ARG4,   LLDB_INVALID_REGNUM,       gpr_x3      },      nullptr,        nullptr, nullptr, 0},
+{   "x4",       nullptr,  8,  GPR_OFFSET(4),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x4,           arm64_dwarf::x4,           LLDB_REGNUM_GENERIC_ARG5,   LLDB_INVALID_REGNUM,       gpr_x4      },      nullptr,        nullptr, nullptr, 0},
+{   "x5",       nullptr,  8,  GPR_OFFSET(5),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x5,           arm64_dwarf::x5,           LLDB_REGNUM_GENERIC_ARG6,   LLDB_INVALID_REGNUM,       gpr_x5      },      nullptr,        nullptr, nullptr, 0},
+{   "x6",       nullptr,  8,  GPR_OFFSET(6),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x6,           arm64_dwarf::x6,           LLDB_REGNUM_GENERIC_ARG7,   LLDB_INVALID_REGNUM,       gpr_x6      },      nullptr,        nullptr, nullptr, 0},
+{   "x7",       nullptr,  8,  GPR_OFFSET(7),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x7,           arm64_dwarf::x7,           LLDB_REGNUM_GENERIC_ARG8,   LLDB_INVALID_REGNUM,       gpr_x7      },      nullptr,        nullptr, nullptr, 0},
+{   "x8",       nullptr,  8,  GPR_OFFSET(8),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x8,           arm64_dwarf::x8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x8      },      nullptr,        nullptr, nullptr, 0},
+{   "x9",       nullptr,  8,  GPR_OFFSET(9),      lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x9,           arm64_dwarf::x9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x9      },      nullptr,        nullptr, nullptr, 0},
+{   "x10",      nullptr,  8,  GPR_OFFSET(10),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x10,          arm64_dwarf::x10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x10     },      nullptr,        nullptr, nullptr, 0},
+{   "x11",      nullptr,  8,  GPR_OFFSET(11),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x11,          arm64_dwarf::x11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x11     },      nullptr,        nullptr, nullptr, 0},
+{   "x12",      nullptr,  8,  GPR_OFFSET(12),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x12,          arm64_dwarf::x12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x12     },      nullptr,        nullptr, nullptr, 0},
+{   "x13",      nullptr,  8,  GPR_OFFSET(13),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x13,          arm64_dwarf::x13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x13     },      nullptr,        nullptr, nullptr, 0},
+{   "x14",      nullptr,  8,  GPR_OFFSET(14),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x14,          arm64_dwarf::x14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x14     },      nullptr,        nullptr, nullptr, 0},
+{   "x15",      nullptr,  8,  GPR_OFFSET(15),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x15,          arm64_dwarf::x15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x15     },      nullptr,        nullptr, nullptr, 0},
+{   "x16",      nullptr,  8,  GPR_OFFSET(16),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x16,          arm64_dwarf::x16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x16     },      nullptr,        nullptr, nullptr, 0},
+{   "x17",      nullptr,  8,  GPR_OFFSET(17),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x17,          arm64_dwarf::x17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x17     },      nullptr,        nullptr, nullptr, 0},
+{   "x18",      nullptr,  8,  GPR_OFFSET(18),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x18,          arm64_dwarf::x18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x18     },      nullptr,        nullptr, nullptr, 0},
+{   "x19",      nullptr,  8,  GPR_OFFSET(19),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x19,          arm64_dwarf::x19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x19     },      nullptr,        nullptr, nullptr, 0},
+{   "x20",      nullptr,  8,  GPR_OFFSET(20),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x20,          arm64_dwarf::x20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x20     },      nullptr,        nullptr, nullptr, 0},
+{   "x21",      nullptr,  8,  GPR_OFFSET(21),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x21,          arm64_dwarf::x21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x21     },      nullptr,        nullptr, nullptr, 0},
+{   "x22",      nullptr,  8,  GPR_OFFSET(22),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x22,          arm64_dwarf::x22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x22     },      nullptr,        nullptr, nullptr, 0},
+{   "x23",      nullptr,  8,  GPR_OFFSET(23),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x23,          arm64_dwarf::x23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x23     },      nullptr,        nullptr, nullptr, 0},
+{   "x24",      nullptr,  8,  GPR_OFFSET(24),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x24,          arm64_dwarf::x24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x24     },      nullptr,        nullptr, nullptr, 0},
+{   "x25",      nullptr,  8,  GPR_OFFSET(25),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x25,          arm64_dwarf::x25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x25     },      nullptr,        nullptr, nullptr, 0},
+{   "x26",      nullptr,  8,  GPR_OFFSET(26),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x26,          arm64_dwarf::x26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x26     },      nullptr,        nullptr, nullptr, 0},
+{   "x27",      nullptr,  8,  GPR_OFFSET(27),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x27,          arm64_dwarf::x27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x27     },      nullptr,        nullptr, nullptr, 0},
+{   "x28",      nullptr,  8,  GPR_OFFSET(28),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::x28,          arm64_dwarf::x28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       gpr_x28     },      nullptr,        nullptr, nullptr, 0},
 
-{   "fp",       "x29",    8,  GPR_OFFSET(29),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::fp,           arm64_dwarf::fp,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM,       gpr_fp      },      nullptr,        nullptr},
-{   "lr",       "x30",    8,  GPR_OFFSET(30),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::lr,           arm64_dwarf::lr,           LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM,       gpr_lr      },      nullptr,        nullptr},
-{   "sp",       "x31",    8,  GPR_OFFSET(31),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::sp,           arm64_dwarf::sp,           LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM,       gpr_sp      },      nullptr,        nullptr},
-{   "pc",       nullptr,  8,  GPR_OFFSET(32),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::pc,           arm64_dwarf::pc,           LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM,       gpr_pc      },      nullptr,        nullptr},
+{   "fp",       "x29",    8,  GPR_OFFSET(29),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::fp,           arm64_dwarf::fp,           LLDB_REGNUM_GENERIC_FP,     LLDB_INVALID_REGNUM,       gpr_fp      },      nullptr,        nullptr, nullptr, 0},
+{   "lr",       "x30",    8,  GPR_OFFSET(30),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::lr,           arm64_dwarf::lr,           LLDB_REGNUM_GENERIC_RA,     LLDB_INVALID_REGNUM,       gpr_lr      },      nullptr,        nullptr, nullptr, 0},
+{   "sp",       "x31",    8,  GPR_OFFSET(31),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::sp,           arm64_dwarf::sp,           LLDB_REGNUM_GENERIC_SP,     LLDB_INVALID_REGNUM,       gpr_sp      },      nullptr,        nullptr, nullptr, 0},
+{   "pc",       nullptr,  8,  GPR_OFFSET(32),     lldb::eEncodingUint,  lldb::eFormatHex,     { arm64_ehframe::pc,           arm64_dwarf::pc,           LLDB_REGNUM_GENERIC_PC,     LLDB_INVALID_REGNUM,       gpr_pc      },      nullptr,        nullptr, nullptr, 0},
 
-{   "cpsr",     nullptr,  4,  GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint,  lldb::eFormatHex,  { arm64_ehframe::cpsr,         arm64_dwarf::cpsr,         LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM,       gpr_cpsr    },      nullptr,        nullptr},
+{   "cpsr",     nullptr,  4,  GPR_OFFSET_NAME(cpsr), lldb::eEncodingUint,  lldb::eFormatHex,  { arm64_ehframe::cpsr,         arm64_dwarf::cpsr,         LLDB_REGNUM_GENERIC_FLAGS,  LLDB_INVALID_REGNUM,       gpr_cpsr    },      nullptr,        nullptr, nullptr, 0},
 
-{   "v0",       nullptr, 16,  FPU_OFFSET(0),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v0,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v0      },      nullptr,        nullptr},
-{   "v1",       nullptr, 16,  FPU_OFFSET(1),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v1,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v1      },      nullptr,        nullptr},
-{   "v2",       nullptr, 16,  FPU_OFFSET(2),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v2,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v2      },      nullptr,        nullptr},
-{   "v3",       nullptr, 16,  FPU_OFFSET(3),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v3,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v3      },      nullptr,        nullptr},
-{   "v4",       nullptr, 16,  FPU_OFFSET(4),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v4,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v4      },      nullptr,        nullptr},
-{   "v5",       nullptr, 16,  FPU_OFFSET(5),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v5,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v5      },      nullptr,        nullptr},
-{   "v6",       nullptr, 16,  FPU_OFFSET(6),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v6,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v6      },      nullptr,        nullptr},
-{   "v7",       nullptr, 16,  FPU_OFFSET(7),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v7,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v7      },      nullptr,        nullptr},
-{   "v8",       nullptr, 16,  FPU_OFFSET(8),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v8      },      nullptr,        nullptr},
-{   "v9",       nullptr, 16,  FPU_OFFSET(9),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v9      },      nullptr,        nullptr},
-{   "v10",      nullptr, 16,  FPU_OFFSET(10),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v10     },      nullptr,        nullptr},
-{   "v11",      nullptr, 16,  FPU_OFFSET(11),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v11     },      nullptr,        nullptr},
-{   "v12",      nullptr, 16,  FPU_OFFSET(12),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v12     },      nullptr,        nullptr},
-{   "v13",      nullptr, 16,  FPU_OFFSET(13),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v13     },      nullptr,        nullptr},
-{   "v14",      nullptr, 16,  FPU_OFFSET(14),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v14     },      nullptr,        nullptr},
-{   "v15",      nullptr, 16,  FPU_OFFSET(15),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v15     },      nullptr,        nullptr},
-{   "v16",      nullptr, 16,  FPU_OFFSET(16),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v16     },      nullptr,        nullptr},
-{   "v17",      nullptr, 16,  FPU_OFFSET(17),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v17     },      nullptr,        nullptr},
-{   "v18",      nullptr, 16,  FPU_OFFSET(18),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v18     },      nullptr,        nullptr},
-{   "v19",      nullptr, 16,  FPU_OFFSET(19),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v19     },      nullptr,        nullptr},
-{   "v20",      nullptr, 16,  FPU_OFFSET(20),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v20     },      nullptr,        nullptr},
-{   "v21",      nullptr, 16,  FPU_OFFSET(21),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v21     },      nullptr,        nullptr},
-{   "v22",      nullptr, 16,  FPU_OFFSET(22),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v22     },      nullptr,        nullptr},
-{   "v23",      nullptr, 16,  FPU_OFFSET(23),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v23     },      nullptr,        nullptr},
-{   "v24",      nullptr, 16,  FPU_OFFSET(24),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v24     },      nullptr,        nullptr},
-{   "v25",      nullptr, 16,  FPU_OFFSET(25),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v25     },      nullptr,        nullptr},
-{   "v26",      nullptr, 16,  FPU_OFFSET(26),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v26     },      nullptr,        nullptr},
-{   "v27",      nullptr, 16,  FPU_OFFSET(27),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v27     },      nullptr,        nullptr},
-{   "v28",      nullptr, 16,  FPU_OFFSET(28),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v28     },      nullptr,        nullptr},
-{   "v29",      nullptr, 16,  FPU_OFFSET(29),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v29,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v29     },      nullptr,        nullptr},
-{   "v30",      nullptr, 16,  FPU_OFFSET(30),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v30,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v30     },      nullptr,        nullptr},
-{   "v31",      nullptr, 16,  FPU_OFFSET(31),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v31,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v31     },      nullptr,        nullptr},
+{   "v0",       nullptr, 16,  FPU_OFFSET(0),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v0,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v0      },      nullptr,        nullptr, nullptr, 0},
+{   "v1",       nullptr, 16,  FPU_OFFSET(1),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v1,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v1      },      nullptr,        nullptr, nullptr, 0},
+{   "v2",       nullptr, 16,  FPU_OFFSET(2),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v2,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v2      },      nullptr,        nullptr, nullptr, 0},
+{   "v3",       nullptr, 16,  FPU_OFFSET(3),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v3,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v3      },      nullptr,        nullptr, nullptr, 0},
+{   "v4",       nullptr, 16,  FPU_OFFSET(4),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v4,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v4      },      nullptr,        nullptr, nullptr, 0},
+{   "v5",       nullptr, 16,  FPU_OFFSET(5),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v5,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v5      },      nullptr,        nullptr, nullptr, 0},
+{   "v6",       nullptr, 16,  FPU_OFFSET(6),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v6,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v6      },      nullptr,        nullptr, nullptr, 0},
+{   "v7",       nullptr, 16,  FPU_OFFSET(7),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v7,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v7      },      nullptr,        nullptr, nullptr, 0},
+{   "v8",       nullptr, 16,  FPU_OFFSET(8),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v8,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v8      },      nullptr,        nullptr, nullptr, 0},
+{   "v9",       nullptr, 16,  FPU_OFFSET(9),      lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v9,           LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v9      },      nullptr,        nullptr, nullptr, 0},
+{   "v10",      nullptr, 16,  FPU_OFFSET(10),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v10,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v10     },      nullptr,        nullptr, nullptr, 0},
+{   "v11",      nullptr, 16,  FPU_OFFSET(11),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v11,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v11     },      nullptr,        nullptr, nullptr, 0},
+{   "v12",      nullptr, 16,  FPU_OFFSET(12),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v12,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v12     },      nullptr,        nullptr, nullptr, 0},
+{   "v13",      nullptr, 16,  FPU_OFFSET(13),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v13,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v13     },      nullptr,        nullptr, nullptr, 0},
+{   "v14",      nullptr, 16,  FPU_OFFSET(14),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v14,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v14     },      nullptr,        nullptr, nullptr, 0},
+{   "v15",      nullptr, 16,  FPU_OFFSET(15),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v15,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v15     },      nullptr,        nullptr, nullptr, 0},
+{   "v16",      nullptr, 16,  FPU_OFFSET(16),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v16,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v16     },      nullptr,        nullptr, nullptr, 0},
+{   "v17",      nullptr, 16,  FPU_OFFSET(17),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v17,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v17     },      nullptr,        nullptr, nullptr, 0},
+{   "v18",      nullptr, 16,  FPU_OFFSET(18),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v18,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v18     },      nullptr,        nullptr, nullptr, 0},
+{   "v19",      nullptr, 16,  FPU_OFFSET(19),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v19,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v19     },      nullptr,        nullptr, nullptr, 0},
+{   "v20",      nullptr, 16,  FPU_OFFSET(20),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v20,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v20     },      nullptr,        nullptr, nullptr, 0},
+{   "v21",      nullptr, 16,  FPU_OFFSET(21),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v21,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v21     },      nullptr,        nullptr, nullptr, 0},
+{   "v22",      nullptr, 16,  FPU_OFFSET(22),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v22,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v22     },      nullptr,        nullptr, nullptr, 0},
+{   "v23",      nullptr, 16,  FPU_OFFSET(23),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v23,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v23     },      nullptr,        nullptr, nullptr, 0},
+{   "v24",      nullptr, 16,  FPU_OFFSET(24),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v24,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v24     },      nullptr,        nullptr, nullptr, 0},
+{   "v25",      nullptr, 16,  FPU_OFFSET(25),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v25,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v25     },      nullptr,        nullptr, nullptr, 0},
+{   "v26",      nullptr, 16,  FPU_OFFSET(26),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v26,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v26     },      nullptr,        nullptr, nullptr, 0},
+{   "v27",      nullptr, 16,  FPU_OFFSET(27),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v27,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v27     },      nullptr,        nullptr, nullptr, 0},
+{   "v28",      nullptr, 16,  FPU_OFFSET(28),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v28,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v28     },      nullptr,        nullptr, nullptr, 0},
+{   "v29",      nullptr, 16,  FPU_OFFSET(29),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v29,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v29     },      nullptr,        nullptr, nullptr, 0},
+{   "v30",      nullptr, 16,  FPU_OFFSET(30),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v30,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v30     },      nullptr,        nullptr, nullptr, 0},
+{   "v31",      nullptr, 16,  FPU_OFFSET(31),     lldb::eEncodingVector, lldb::eFormatVectorOfUInt8,  { LLDB_INVALID_REGNUM,  arm64_dwarf::v31,          LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,       fpu_v31     },      nullptr,        nullptr, nullptr, 0},
 
-{   "fpsr",     nullptr,  4,  FPU_OFFSET_NAME(fpsr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpsr   },      nullptr,        nullptr},
-{   "fpcr",     nullptr,  4,  FPU_OFFSET_NAME(fpcr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpcr   },      nullptr,        nullptr},
+{   "fpsr",     nullptr,  4,  FPU_OFFSET_NAME(fpsr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpsr   },      nullptr,        nullptr, nullptr, 0},
+{   "fpcr",     nullptr,  4,  FPU_OFFSET_NAME(fpcr),     lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,  fpu_fpcr   },      nullptr,        nullptr, nullptr, 0},
 
-{   "far",      nullptr,  8,  EXC_OFFSET_NAME(far),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_far       },    nullptr,        nullptr},
-{   "esr",      nullptr,  4,  EXC_OFFSET_NAME(esr),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_esr       },    nullptr,        nullptr},
-{   "exception",nullptr,  4,  EXC_OFFSET_NAME(exception), lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_exception },    nullptr,        nullptr},
+{   "far",      nullptr,  8,  EXC_OFFSET_NAME(far),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_far       },    nullptr,        nullptr, nullptr, 0},
+{   "esr",      nullptr,  4,  EXC_OFFSET_NAME(esr),       lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_esr       },    nullptr,        nullptr, nullptr, 0},
+{   "exception",nullptr,  4,  EXC_OFFSET_NAME(exception), lldb::eEncodingUint,  lldb::eFormatHex,     { LLDB_INVALID_REGNUM,  LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,        LLDB_INVALID_REGNUM,    exc_exception },    nullptr,        nullptr, nullptr, 0},
 
 {   DEFINE_DBG (bvr, 0) },
 {   DEFINE_DBG (bvr, 1) },
diff --git a/source/Plugins/Process/Utility/RegisterInfos_i386.h b/source/Plugins/Process/Utility/RegisterInfos_i386.h
index 904ec4d1f0bd..a94b790b680f 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_i386.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_i386.h
@@ -52,11 +52,11 @@
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)            \
     { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint,  \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_i386 }, NULL, NULL, NULL, 0}
 
 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)           \
     { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_i386 }, NULL, NULL, NULL, 0}
 
 // RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB
 
@@ -64,41 +64,41 @@
     { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),    \
       eEncodingVector, eFormatVectorOfUInt8,                       \
       { ehframe_st##i##_i386, dwarf_st##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_i386 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_FP_MM(reg, i)                                                \
     { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
       eEncodingUint, eFormatHex,                                            \
       { ehframe_mm##i##_i386, dwarf_mm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_i386 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_XMM(reg, i)                                         \
     { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
       eEncodingVector, eFormatVectorOfUInt8,                       \
       { ehframe_##reg##i##_i386, dwarf_##reg##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386}, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 // I believe the YMM registers use dwarf_xmm_%_i386 register numbers and then differentiate based on register size.
 #define DEFINE_YMM(reg, i)                                         \
     { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i),        \
       eEncodingVector, eFormatVectorOfUInt8,                       \
       { LLDB_INVALID_REGNUM, dwarf_xmm##i##_i386, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_i386 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_DR(reg, i)                                               \
     { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex,   \
       { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
-        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL }
+        LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0}
 
 #define DEFINE_GPR_PSEUDO_16(reg16, reg32)                  \
     { #reg16, NULL, 2, GPR_OFFSET(reg32), eEncodingUint,    \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
 #define DEFINE_GPR_PSEUDO_8H(reg8, reg32)                   \
     { #reg8, NULL, 1, GPR_OFFSET(reg32)+1, eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
 #define DEFINE_GPR_PSEUDO_8L(reg8, reg32)                   \
     { #reg8, NULL, 1, GPR_OFFSET(reg32), eEncodingUint,     \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_i386 }, RegisterContextPOSIX_x86::g_contained_##reg32, RegisterContextPOSIX_x86::g_invalidate_##reg32, NULL, 0}
  
 static RegisterInfo
 g_register_infos_i386[] =
diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips.h b/source/Plugins/Process/Utility/RegisterInfos_mips.h
index 3b81acf26146..5852d799aa9b 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_mips.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_mips.h
@@ -13,6 +13,7 @@
 // C++ Includes
 // Other libraries and framework includes
 #include "llvm/Support/Compiler.h"
+#include "lldb/Core/dwarf.h"
 
 // Project includes
 
@@ -36,23 +37,29 @@
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)            \
     { #reg, alt, sizeof(((GPR_linux_mips*)NULL)->reg) / 2, GPR_OFFSET(reg), eEncodingUint,  \
-      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL, NULL, 0}
+
+const uint8_t dwarf_opcode_mips [] = {
+                                        llvm::dwarf::DW_OP_regx, dwarf_sr_mips, llvm::dwarf::DW_OP_lit1,
+                                        llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and,
+                                        llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
+                                     };
 
 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4)           \
     { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingIEEE754,   \
-      eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
+      eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, dwarf_opcode_mips, sizeof(dwarf_opcode_mips)}
 
 #define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4)      \
    { #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint,   \
-     eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
+     eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL, NULL, 0}
 
 #define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector,   \
-      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL }
+      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL, NULL, 0}
 
 #define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL, NULL, 0}
 
 // RegisterKind: EH_Frame, DWARF, Generic, Procss Plugin, LLDB
 
diff --git a/source/Plugins/Process/Utility/RegisterInfos_mips64.h b/source/Plugins/Process/Utility/RegisterInfos_mips64.h
index 8dbfa6da94a2..c0691b754103 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_mips64.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_mips64.h
@@ -13,6 +13,7 @@
 // C++ Includes
 // Other libraries and framework includes
 #include "llvm/Support/Compiler.h"
+#include "lldb/Core/dwarf.h"
 
 // Project includes
 
@@ -44,32 +45,39 @@
 #ifdef LINUX_MIPS64
     #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
          { #reg, alt, sizeof(((GPR_linux_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
-          eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
+          eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
 #else
     #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)    \
          { #reg, alt, sizeof(((GPR_freebsd_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
-          eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
+          eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
 #endif
 
 #define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((GPR_linux_mips*)0)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
+
+const uint8_t dwarf_opcode_mips64 [] = {
+                                           llvm::dwarf::DW_OP_regx, dwarf_sr_mips64, llvm::dwarf::DW_OP_lit1,
+                                           llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shl, llvm::dwarf::DW_OP_and, 
+                                           llvm::dwarf::DW_OP_lit26, llvm::dwarf::DW_OP_shr
+                                       };
+
 
 #define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingIEEE754,  \
-      eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL }
+      eFormatFloat, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL, dwarf_opcode_mips64, sizeof(dwarf_opcode_mips64)}
 
 #define DEFINE_FPR_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL, NULL, 0}
 
 #define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector,   \
-      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL }
+      eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL, NULL, 0}
 
 #define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL, NULL, 0}
 
 static RegisterInfo
 g_register_infos_mips64[] =
diff --git a/source/Plugins/Process/Utility/RegisterInfos_powerpc.h b/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
index 95347ae51592..927c73a5551d 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
@@ -24,13 +24,13 @@
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, lldb_kind)           \
     { #reg, alt, GPR_SIZE(reg), GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, gpr_##reg##_powerpc }, NULL, NULL }
+      eFormatHex, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, gpr_##reg##_powerpc }, NULL, NULL, NULL, 0}
 #define DEFINE_FPR(reg, lldb_kind)           \
     { #reg, NULL, 8, FPR_OFFSET(reg), eEncodingIEEE754, \
-      eFormatFloat, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, fpr_##reg##_powerpc }, NULL, NULL }
+      eFormatFloat, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, fpr_##reg##_powerpc }, NULL, NULL, NULL, 0}
 #define DEFINE_VMX(reg, lldb_kind)           \
     { #reg, NULL, 16, VMX_OFFSET(reg), eEncodingVector, \
-      eFormatVectorOfUInt32, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, vmx_##reg##_powerpc }, NULL, NULL }
+      eFormatVectorOfUInt32, { dwarf_##reg##_powerpc, dwarf_##reg##_powerpc, lldb_kind, LLDB_INVALID_REGNUM, vmx_##reg##_powerpc }, NULL, NULL, NULL, 0}
 
     // General purpose registers.            EH_Frame,                  DWARF,              Generic,                Process Plugin
 #define POWERPC_REGS \
@@ -136,8 +136,8 @@
     DEFINE_VMX(v29,      LLDB_INVALID_REGNUM), \
     DEFINE_VMX(v30,      LLDB_INVALID_REGNUM), \
     DEFINE_VMX(v31,      LLDB_INVALID_REGNUM), \
-    { "vrsave", NULL, 4, VMX_OFFSET(vrsave), eEncodingUint, eFormatHex, { dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vrsave_powerpc }, NULL, NULL }, \
-    { "vscr", NULL, 4, VMX_OFFSET(vscr), eEncodingUint, eFormatHex, { dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_powerpc }, NULL, NULL },
+    { "vrsave", NULL, 4, VMX_OFFSET(vrsave), eEncodingUint, eFormatHex, { dwarf_vrsave_powerpc, dwarf_vrsave_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vrsave_powerpc }, NULL, NULL, NULL, 0}, \
+    { "vscr", NULL, 4, VMX_OFFSET(vscr), eEncodingUint, eFormatHex, { dwarf_vscr_powerpc, dwarf_vscr_powerpc, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_powerpc }, NULL, NULL, NULL, 0},
 
 static RegisterInfo
 g_register_infos_powerpc64[] =
diff --git a/source/Plugins/Process/Utility/RegisterInfos_s390x.h b/source/Plugins/Process/Utility/RegisterInfos_s390x.h
index 43152640297e..0710174c0a85 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_s390x.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_s390x.h
@@ -31,28 +31,28 @@
     {                                                                                                                  \
         #name, alt, size, offset, eEncodingUint, eFormatHex,                                                           \
         { dwarf_##name##_s390x, dwarf_##name##_s390x, generic, LLDB_INVALID_REGNUM, lldb_##name##_s390x },             \
-        NULL, NULL,                                                                                                    \
+        NULL, NULL, NULL, 0                                                                                            \
     }
 
 #define DEFINE_GPR_NODWARF(name, size, offset, alt, generic)                                                           \
     {                                                                                                                  \
         #name, alt, size, offset, eEncodingUint, eFormatHex,                                                           \
         { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, generic, LLDB_INVALID_REGNUM, lldb_##name##_s390x },               \
-        NULL, NULL,                                                                                                    \
+        NULL, NULL, NULL, 0                                                                                            \
     }
 
 #define DEFINE_FPR(name, size, offset)                                                                                 \
     {                                                                                                                  \
         #name, NULL, size, offset, eEncodingUint, eFormatHex,                                                          \
         { dwarf_##name##_s390x, dwarf_##name##_s390x, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##name##_s390x }, \
-        NULL, NULL,                                                                                                    \
+        NULL, NULL, NULL, 0                                                                                            \
     }
 
 #define DEFINE_FPR_NODWARF(name, size, offset)                                                                         \
     {                                                                                                                  \
         #name, NULL, size, offset, eEncodingUint, eFormatHex,                                                          \
         { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##name##_s390x },   \
-        NULL, NULL,                                                                                                    \
+        NULL, NULL, NULL, 0                                                                                            \
     }
 
 static RegisterInfo g_register_infos_s390x[] =
diff --git a/source/Plugins/Process/Utility/RegisterInfos_x86_64.h b/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
index a393089dd129..aeb6672ec943 100644
--- a/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
+++ b/source/Plugins/Process/Utility/RegisterInfos_x86_64.h
@@ -55,53 +55,53 @@
 // Note that the size and offset will be updated by platform-specific classes.
 #define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4)    \
     { #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##reg##_x86_64 }, NULL, NULL, NULL, 0}
 
 #define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4)    \
     { #name, NULL, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint,   \
-      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL }
+      eFormatHex, { kind1, kind2, kind3, kind4, lldb_##name##_x86_64 }, NULL, NULL, NULL, 0}
 
 #define DEFINE_FP_ST(reg, i)                                       \
     { #reg#i, NULL, FP_SIZE, LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
       eEncodingVector, eFormatVectorOfUInt8,                       \
       { dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_FP_MM(reg, i)                                                \
     { #reg#i, NULL, sizeof(uint64_t), LLVM_EXTENSION FPR_OFFSET(stmm[i]),   \
       eEncodingUint, eFormatHex,                                            \
       { dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_mm##i##_x86_64 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_XMM(reg, i)                                         \
     { #reg#i, NULL, XMM_SIZE, LLVM_EXTENSION FPR_OFFSET(reg[i]),   \
       eEncodingVector, eFormatVectorOfUInt8,                       \
       { dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64}, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_YMM(reg, i)                                                          \
     { #reg#i, NULL, YMM_SIZE, LLVM_EXTENSION YMM_OFFSET(i),                         \
       eEncodingVector, eFormatVectorOfUInt8,                                        \
       { dwarf_##reg##i##h_x86_64, dwarf_##reg##i##h_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg##i##_x86_64 }, \
-      NULL, NULL }
+      NULL, NULL, NULL, 0}
 
 #define DEFINE_DR(reg, i)                                               \
     { #reg#i, NULL, DR_SIZE, DR_OFFSET(i), eEncodingUint, eFormatHex,   \
       { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,  \
-      LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL }
+      LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL, NULL, 0}
 
 #define DEFINE_GPR_PSEUDO_32(reg32, reg64)          \
     { #reg32, NULL, 4, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg32##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
 #define DEFINE_GPR_PSEUDO_16(reg16, reg64)          \
     { #reg16, NULL, 2, GPR_OFFSET(reg64), eEncodingUint,   \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg16##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
 #define DEFINE_GPR_PSEUDO_8H(reg8, reg64)           \
     { #reg8, NULL, 1, GPR_OFFSET(reg64)+1, eEncodingUint,  \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
 #define DEFINE_GPR_PSEUDO_8L(reg8, reg64)           \
     { #reg8, NULL, 1, GPR_OFFSET(reg64), eEncodingUint,    \
-      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64 }
+      eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, lldb_##reg8##_x86_64 }, RegisterContextPOSIX_x86::g_contained_##reg64, RegisterContextPOSIX_x86::g_invalidate_##reg64, NULL, 0}
 
 static RegisterInfo
 g_register_infos_x86_64[] =
diff --git a/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp b/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
index fc6b31ec088e..c468ba33e858 100644
--- a/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+++ b/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
@@ -1630,6 +1630,14 @@ GDBRemoteCommunicationServerLLGS::Handle_qRegisterInfo (StringExtractorGDBRemote
         response.PutChar (';');
     }
 
+    if (reg_info->dynamic_size_dwarf_expr_bytes)
+    {
+       const size_t dwarf_opcode_len = reg_info->dynamic_size_dwarf_len;
+       response.PutCString("dynamic_size_dwarf_expr_bytes:");
+       for(uint32_t i = 0; i < dwarf_opcode_len; ++i)
+           response.PutHex8 (reg_info->dynamic_size_dwarf_expr_bytes[i]);
+       response.PutChar(';');
+    }
     return SendPacketNoLock(response.GetData(), response.GetSize());
 }
 
@@ -1825,7 +1833,10 @@ GDBRemoteCommunicationServerLLGS::Handle_P (StringExtractorGDBRemote &packet)
         return SendErrorResponse (0x47);
     }
 
-    if (reg_size != reg_info->byte_size)
+    // The dwarf expression are evaluate on host site
+    // which may cause register size to change
+    // Hence the reg_size may not be same as reg_info->bytes_size
+    if ((reg_size != reg_info->byte_size) && !(reg_info->dynamic_size_dwarf_expr_bytes))
     {
         return SendIllFormedResponse (packet, "P packet register size is incorrect");
     }
diff --git a/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp b/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
index e5b347c9f72d..57983c4979a6 100644
--- a/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
+++ b/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp
@@ -89,7 +89,15 @@ GDBRemoteRegisterContext::GetRegisterCount ()
 const RegisterInfo *
 GDBRemoteRegisterContext::GetRegisterInfoAtIndex (size_t reg)
 {
-    return m_reg_info.GetRegisterInfoAtIndex (reg);
+    RegisterInfo* reg_info = m_reg_info.GetRegisterInfoAtIndex (reg);
+
+    if (reg_info && reg_info->dynamic_size_dwarf_expr_bytes)
+    {
+        const ArchSpec &arch = m_thread.GetProcess ()->GetTarget ().GetArchitecture ();
+        uint8_t reg_size = UpdateDynamicRegisterSize (arch, reg_info);
+        reg_info->byte_size = reg_size;
+    }
+    return reg_info;
 }
 
 size_t
diff --git a/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp b/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
index 4d56f6ea3ba1..f501e43b00d7 100644
--- a/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+++ b/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
@@ -539,6 +539,7 @@ ProcessGDBRemote::BuildDynamicRegisterInfo (bool force)
                 ConstString set_name;
                 std::vector<uint32_t> value_regs;
                 std::vector<uint32_t> invalidate_regs;
+                std::vector<uint8_t> dwarf_opcode_bytes;
                 RegisterInfo reg_info = { NULL,                 // Name
                     NULL,                 // Alt name
                     0,                    // byte size
@@ -553,7 +554,9 @@ ProcessGDBRemote::BuildDynamicRegisterInfo (bool force)
                         reg_num           // native register number
                     },
                     NULL,
-                    NULL
+                    NULL,
+                    NULL, // Dwarf expression opcode bytes pointer
+                    0     // Dwarf expression opcode bytes length
                 };
 
                 while (response.GetNameColonValue(name, value))
@@ -638,6 +641,23 @@ ProcessGDBRemote::BuildDynamicRegisterInfo (bool force)
                     {
                         SplitCommaSeparatedRegisterNumberString(value, invalidate_regs, 16);
                     }
+                    else if (name.compare("dynamic_size_dwarf_expr_bytes") == 0)
+                    {
+                       size_t dwarf_opcode_len = value.length () / 2;
+                       assert (dwarf_opcode_len > 0);
+
+                       dwarf_opcode_bytes.resize (dwarf_opcode_len);
+                       StringExtractor opcode_extractor;
+                       reg_info.dynamic_size_dwarf_len = dwarf_opcode_len; 
+
+                       // Swap "value" over into "opcode_extractor"
+                       opcode_extractor.GetStringRef ().swap (value);
+                       uint32_t ret_val = opcode_extractor.GetHexBytesAvail (dwarf_opcode_bytes.data (),
+                                                                           dwarf_opcode_len);
+                       assert (dwarf_opcode_len == ret_val);
+
+                       reg_info.dynamic_size_dwarf_expr_bytes = dwarf_opcode_bytes.data ();
+                    }
                 }
 
                 reg_info.byte_offset = reg_offset;
@@ -4373,6 +4393,7 @@ ParseRegisters (XMLNode feature_node, GdbServerTargetInfo &target_info, GDBRemot
         ConstString set_name;
         std::vector<uint32_t> value_regs;
         std::vector<uint32_t> invalidate_regs;
+        std::vector<uint8_t> dwarf_opcode_bytes;
         bool encoding_set = false;
         bool format_set = false;
         RegisterInfo reg_info = { NULL,                 // Name
@@ -4389,10 +4410,12 @@ ParseRegisters (XMLNode feature_node, GdbServerTargetInfo &target_info, GDBRemot
                 cur_reg_num         // native register number
             },
             NULL,
-            NULL
+            NULL,
+            NULL,  // Dwarf Expression opcode bytes pointer
+            0      // Dwarf Expression opcode bytes length 
         };
 
-        reg_node.ForEachAttribute([&target_info, &gdb_group, &gdb_type, &reg_name, &alt_name, &set_name, &value_regs, &invalidate_regs, &encoding_set, &format_set, &reg_info, &cur_reg_num, &reg_offset](const llvm::StringRef &name, const llvm::StringRef &value) -> bool {
+        reg_node.ForEachAttribute([&target_info, &gdb_group, &gdb_type, &reg_name, &alt_name, &set_name, &value_regs, &invalidate_regs, &encoding_set, &format_set, &reg_info, &cur_reg_num, &reg_offset, &dwarf_opcode_bytes](const llvm::StringRef &name, const llvm::StringRef &value) -> bool {
             if (name == "name")
             {
                 reg_name.SetString(value);
@@ -4480,6 +4503,22 @@ ParseRegisters (XMLNode feature_node, GdbServerTargetInfo &target_info, GDBRemot
             {
                 SplitCommaSeparatedRegisterNumberString(value, invalidate_regs, 0);
             }
+            else if (name == "dynamic_size_dwarf_expr_bytes")
+            {
+                StringExtractor opcode_extractor;
+                std::string opcode_string = value.str ();
+                size_t dwarf_opcode_len = opcode_string.length () / 2;
+                assert (dwarf_opcode_len > 0);
+
+                dwarf_opcode_bytes.resize (dwarf_opcode_len);
+                reg_info.dynamic_size_dwarf_len = dwarf_opcode_len;
+                opcode_extractor.GetStringRef ().swap (opcode_string);
+                uint32_t ret_val = opcode_extractor.GetHexBytesAvail (dwarf_opcode_bytes.data (),
+                                                                    dwarf_opcode_len);
+                assert (dwarf_opcode_len == ret_val);
+
+                reg_info.dynamic_size_dwarf_expr_bytes = dwarf_opcode_bytes.data ();
+            }
             else
             {
                 printf("unhandled attribute %s = %s\n", name.data(), value.data());
diff --git a/source/Target/RegisterContext.cpp b/source/Target/RegisterContext.cpp
index 483c932719d6..ae3c43def275 100644
--- a/source/Target/RegisterContext.cpp
+++ b/source/Target/RegisterContext.cpp
@@ -21,6 +21,9 @@
 #include "lldb/Target/Process.h"
 #include "lldb/Target/Thread.h"
 #include "lldb/Target/Target.h"
+#include "lldb/Core/Module.h"
+#include "lldb/Expression/DWARFExpression.h"
+#include "lldb/Core/Value.h"
 
 using namespace lldb;
 using namespace lldb_private;
@@ -76,6 +79,46 @@ RegisterContext::GetRegisterInfoByName (const char *reg_name, uint32_t start_idx
     return nullptr;
 }
 
+uint32_t
+RegisterContext::UpdateDynamicRegisterSize (const lldb_private::ArchSpec &arch,
+                                            RegisterInfo* reg_info)
+{
+    ExecutionContext exe_ctx (CalculateThread());
+
+    // In MIPS, the floating point registers size is depends on FR bit of SR register.
+    // if SR.FR  == 1 then all floating point registers are 64 bits.
+    // else they are all 32 bits.
+    
+    int expr_result;
+    uint32_t addr_size =  arch.GetAddressByteSize ();
+    const uint8_t* dwarf_opcode_ptr = reg_info->dynamic_size_dwarf_expr_bytes;
+    const size_t dwarf_opcode_len = reg_info->dynamic_size_dwarf_len;
+
+    DataExtractor dwarf_data (dwarf_opcode_ptr, dwarf_opcode_len, 
+                              arch.GetByteOrder (), addr_size);
+    ModuleSP opcode_ctx;
+    DWARFExpression dwarf_expr (opcode_ctx, dwarf_data, nullptr, 0, dwarf_opcode_len);
+    Value result;
+    Error error;
+    const lldb::offset_t offset = 0;
+    if (dwarf_expr.Evaluate (&exe_ctx, nullptr, nullptr, this, opcode_ctx, dwarf_data, nullptr,
+                             offset, dwarf_opcode_len, eRegisterKindDWARF, nullptr, nullptr, result, &error))
+    {
+        expr_result = result.GetScalar ().SInt (-1);
+        switch (expr_result)
+        {
+            case 0: return 4;
+            case 1: return 8;
+            default: return reg_info->byte_size;
+        }
+    }
+    else
+    {
+        printf ("Error executing DwarfExpression::Evaluate %s\n", error.AsCString());
+        return reg_info->byte_size;
+    }
+}
+
 const RegisterInfo *
 RegisterContext::GetRegisterInfo (lldb::RegisterKind kind, uint32_t num)
 {