arm64: Move creating the ID register views earlier

These are needed when enabling CPU features so should be processed
earlier in the boot.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D55103

1 files changed, 26 insertions, 13 deletions

diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index e37c9813582b..7f89098cc840 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2826,6 +2826,26 @@ identify_cpu_sysinit(void *dummy __unused)
 		prev_desc = desc;
 	}
 
+	if (dic && idc) {
+		arm64_icache_sync_range = &arm64_dic_idc_icache_sync_range;
+		if (bootverbose)
+			printf("Enabling DIC & IDC ICache sync\n");
+	} else if (idc) {
+		arm64_icache_sync_range = &arm64_idc_aliasing_icache_sync_range;
+		if (bootverbose)
+			printf("Enabling IDC ICache sync\n");
+	}
+}
+/*
+ * This needs to run early to ensure the kernel ID registers have been
+ * updated for all CPUs before they are used by ifunc resolvers, etc.
+ */
+SYSINIT(identify_cpu, SI_SUB_CPU, SI_ORDER_MIDDLE,
+    identify_cpu_sysinit, NULL);
+
+static void
+identify_hwcaps_sysinit(void *dummy __unused)
+{
 #ifdef INVARIANTS
 	/* Check we dont update the special registers after this point */
 	hwcaps_set = true;
@@ -2848,16 +2868,6 @@ identify_cpu_sysinit(void *dummy __unused)
 	elf32_hwcap |= parse_cpu_features_hwcap32();
 #endif
 
-	if (dic && idc) {
-		arm64_icache_sync_range = &arm64_dic_idc_icache_sync_range;
-		if (bootverbose)
-			printf("Enabling DIC & IDC ICache sync\n");
-	} else if (idc) {
-		arm64_icache_sync_range = &arm64_idc_aliasing_icache_sync_range;
-		if (bootverbose)
-			printf("Enabling IDC ICache sync\n");
-	}
-
 	if ((elf_hwcap & HWCAP_ATOMICS) != 0) {
 		lse_supported = true;
 		if (bootverbose)
@@ -2872,11 +2882,14 @@ identify_cpu_sysinit(void *dummy __unused)
 	install_sys_handler(user_idreg_handler);
 }
 /*
- * This needs to be after the APs have stareted as they may have errata that
+ * This needs to be after the APs have started as they may have errata that
  * means we need to mask out ID registers & that could affect hwcaps, etc.
+ *
+ * The errata handling runs at SI_SUB_CONFIGURE, SI_ORDER_MIDDLE + 1, so this
+ * needs to be later than that.
  */
-SYSINIT(identify_cpu, SI_SUB_CONFIGURE, SI_ORDER_ANY, identify_cpu_sysinit,
-    NULL);
+SYSINIT(identify_hwcaps, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE + 2,
+    identify_hwcaps_sysinit, NULL);
 
 static void
 cpu_features_sysinit(void *dummy __unused)