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authorKonstantin Belousov <konstantinb@nvidia.com>2021-04-26 11:39:11 +0000
committerKonstantin Belousov <kib@FreeBSD.org>2021-07-12 09:34:40 +0000
commit0fc0b62b0f7be49bcf4c5670a6c81386e333fb02 (patch)
treec85019d0098212cc2ec0ca358a5171806e8a2f8d
parent06a3fd0e5c86ae4f00075c1571cf4e183e28b4c4 (diff)
downloadsrc-0fc0b62b0f7be49bcf4c5670a6c81386e333fb02.tar.gz
src-0fc0b62b0f7be49bcf4c5670a6c81386e333fb02.zip
mlx5: Fix PBMC register mapping
Import Linux commit 534b1204ca4694db1093b15cf3e79a99fcb6a6da Add reserved mapping to cover all the register in order to avoid setting arbitrary values to newer FW which implements the reserved fields. Reviewed by: hselasky Sponsored by: Mellanox Technologies // NVIDIA Networking MFC after: 1 week
-rw-r--r--sys/dev/mlx5/mlx5_ifc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h
index 81e91e180b8c..494180630500 100644
--- a/sys/dev/mlx5/mlx5_ifc.h
+++ b/sys/dev/mlx5/mlx5_ifc.h
@@ -8839,7 +8839,7 @@ struct mlx5_ifc_pbmc_reg_bits {
struct mlx5_ifc_bufferx_reg_bits buffer[10];
- u8 reserved_at_2e0[0x40];
+ u8 reserved_at_2e0[0x80];
};
struct mlx5_ifc_paos_reg_bits {