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authorKevin Bowling <kbowling@FreeBSD.org>2026-08-11 19:34:29 +0000
committerKevin Bowling <kbowling@FreeBSD.org>2026-08-11 20:59:33 +0000
commit1121aaa0758baf04bed6f16d4157116b49c25000 (patch)
tree3b4da416d17826958d6ca3153d626697a91a71b9
parent3fc1786aa2a3f590453abb6ea2351a12e19f6b45 (diff)
igc: Check PHY control register reads
Do not modify a zero-initialized PHY control value when its preceding read failed. Leave the PHY unchanged when the void power helpers cannot read its current state. This follows the defensive checks added to the corresponding e1000 helpers. MFC after: 2 weeks
-rw-r--r--sys/dev/igc/igc_phy.c14
1 files changed, 12 insertions, 2 deletions
diff --git a/sys/dev/igc/igc_phy.c b/sys/dev/igc/igc_phy.c
index 13dac1066f27..24ecefb2c625 100644
--- a/sys/dev/igc/igc_phy.c
+++ b/sys/dev/igc/igc_phy.c
@@ -906,10 +906,15 @@ s32 igc_phy_hw_reset_generic(struct igc_hw *hw)
**/
void igc_power_up_phy_copper(struct igc_hw *hw)
{
+ s32 ret_val;
u16 mii_reg = 0;
/* The PHY will retain its settings across a power down/up cycle */
- hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+ ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+ if (ret_val) {
+ DEBUGOUT("Error reading PHY control register\n");
+ return;
+ }
mii_reg &= ~MII_CR_POWER_DOWN;
hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
usec_delay(300);
@@ -925,10 +930,15 @@ void igc_power_up_phy_copper(struct igc_hw *hw)
**/
void igc_power_down_phy_copper(struct igc_hw *hw)
{
+ s32 ret_val;
u16 mii_reg = 0;
/* The PHY will retain its settings across a power down/up cycle */
- hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+ ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
+ if (ret_val) {
+ DEBUGOUT("Error reading PHY control register\n");
+ return;
+ }
mii_reg |= MII_CR_POWER_DOWN;
hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
msec_delay(1);