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author | Konstantin Belousov <kib@FreeBSD.org> | 2021-04-16 18:28:08 +0000 |
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committer | Konstantin Belousov <kib@FreeBSD.org> | 2021-04-30 14:43:45 +0000 |
commit | 21fc6a2a10cf6fbd294decbb0001473693ec1618 (patch) | |
tree | 0fcd19ee3242605c47e67bb0537d1590aa4f809b | |
parent | 7b88cd8bbf37e8c9c1d76e250ab263cabbb12391 (diff) | |
download | src-21fc6a2a10cf6fbd294decbb0001473693ec1618.tar.gz src-21fc6a2a10cf6fbd294decbb0001473693ec1618.zip |
amd64: invalidate TLB between page table update and access
When setting up trampoline mapping for LA57 switcher, it is possible
that TLB still has some random mapping at that address.
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
-rw-r--r-- | sys/amd64/amd64/pmap.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 66617bffa8df..5a6a1cee8b8c 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -2168,6 +2168,7 @@ pmap_bootstrap_la57(void *arg __unused) *(u_long *)(v_code + 2 + (la57_trampoline_gdt_desc - la57_trampoline)) = la57_trampoline_gdt - la57_trampoline + VM_PAGE_TO_PHYS(m_code); la57_tramp = (void (*)(uint64_t))VM_PAGE_TO_PHYS(m_code); + invlpg((vm_offset_t)la57_tramp); la57_tramp(KPML5phys); /* |