diff options
| author | Mark Johnston <markj@FreeBSD.org> | 2022-08-05 20:21:09 +0000 |
|---|---|---|
| committer | Mark Johnston <markj@FreeBSD.org> | 2022-08-19 11:54:14 +0000 |
| commit | 363d4b3b42c1d5ec9a2543a0d1f8068cd7f8b87f (patch) | |
| tree | 7bbd4b3e8d9ba302c12e6c21a5791b6362bdb7a0 | |
| parent | 057b43b262350c60409fc1eaa34a61259b64f57f (diff) | |
| download | src-363d4b3b42c1d5ec9a2543a0d1f8068cd7f8b87f.tar.gz src-363d4b3b42c1d5ec9a2543a0d1f8068cd7f8b87f.zip | |
arm: Clear TTBCR before enabling the MMU
Upon reset, this register is supposed to have a value of zero. But when
booting certain v7 CPUs in QEMU, we enter the kernel with several bits
set, including the EAE bit, which enables ARM's PAE extension. I'm not
sure if QEMU is setting it or if it's the uboot loader. Because FreeBSD
doesn't implement that extension and uses regular 32-bit page tables,
the kernel hangs immediately after enabling the MMU.
Just clear everything in TTBCR before enabling the MMU, to match the
reset value. FreeBSD doesn't toggle anything in that register.
PR: 251187
Reviewed by: imp
Sponsored by: The FreeBSD Foundation
(cherry picked from commit e9552d8b45d67ca44d91b3ec09c91253e7e99b28)
| -rw-r--r-- | sys/arm/arm/locore-v6.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sys/arm/arm/locore-v6.S b/sys/arm/arm/locore-v6.S index d796e6267cdc..ad96b0b9d638 100644 --- a/sys/arm/arm/locore-v6.S +++ b/sys/arm/arm/locore-v6.S @@ -295,6 +295,13 @@ ASENTRY_NP(init_mmu) mcr CP15_DACR(r0) /* + * Ensure that LPAE is disabled and that TTBR0 is used for translation, + * use a 16KB translation table + */ + mov r0, #0 + mcr CP15_TTBCR(r0) + + /* * Set TEX remap registers * - All is set to uncacheable memory */ |