diff options
| author | Olivier Certner <olce@FreeBSD.org> | 2026-06-25 00:17:58 +0000 |
|---|---|---|
| committer | Olivier Certner <olce@FreeBSD.org> | 2026-06-25 00:27:30 +0000 |
| commit | 39975c7778fd6ac56571ec64a2003b06a1ca8a52 (patch) | |
| tree | b87165b00c349a614aa0c9fccb079785c96e1fd5 | |
| parent | 0143a40f5712de0938c34e88b352b85399f88b19 (diff) | |
hwpstate_intel(4): sysctl_epp_select(): Cache again new EPP value
This caching was removed inadvertently in the commit mentioned below.
Fixes: 8452afeb5682 ("hwpstate_intel: Use 8bit scale instead of percentage scale")
Event: Halifax Hackathon 202606
Location: jrm@'s living room
Sponsored by: The FreeBSD Foundation
| -rw-r--r-- | sys/x86/cpufreq/hwpstate_intel.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/sys/x86/cpufreq/hwpstate_intel.c b/sys/x86/cpufreq/hwpstate_intel.c index 81edff278de8..352e44f84c4e 100644 --- a/sys/x86/cpufreq/hwpstate_intel.c +++ b/sys/x86/cpufreq/hwpstate_intel.c @@ -314,16 +314,16 @@ sysctl_epp_select(SYSCTL_HANDLER_ARGS) } if (sc->hwp_pref_ctrl) { - sc->req = - ((sc->req & ~IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) - | (val << 24u)); + const uint64_t req_cached = sc->req = (sc->req & + ~IA32_HWP_REQUEST_ENERGY_PERFORMANCE_PREFERENCE) | + (val << 24u); if (sc->hwp_pkg_ctrl_en) ret = WRMSR_ON_CPU(dev, MSR_IA32_HWP_REQUEST_PKG, - sc->req); + req_cached); else ret = WRMSR_ON_CPU(dev, MSR_IA32_HWP_REQUEST, - sc->req); + req_cached); } else { val = EPP_TO_EPB(val); MPASS((val & ~IA32_ENERGY_PERF_BIAS_POLICY_HINT_MASK) == 0); |