aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSean Bruno <sbruno@FreeBSD.org>2012-10-18 22:22:01 +0000
committerSean Bruno <sbruno@FreeBSD.org>2012-10-18 22:22:01 +0000
commit48f219c0da6130689b15635f7c601479595e1962 (patch)
treec96f3e1151f46068b233870f3d3f750a06edebc5
parentf2118deb8c4518f349b9a1fa570bdd418cd9c9e0 (diff)
downloadsrc-48f219c0da6130689b15635f7c601479595e1962.tar.gz
src-48f219c0da6130689b15635f7c601479595e1962.zip
est(4) man page update to document the exposed sysctl r/o variables
available to the user. Should be applicable to all branches and versions where est(4) exists. thanks to gjb for reviewing and suggesting nits Reviewed by: gjb@ MFC after: 2 weeks
Notes
Notes: svn path=/head/; revision=241710
-rw-r--r--share/man/man4/est.427
1 files changed, 25 insertions, 2 deletions
diff --git a/share/man/man4/est.4 b/share/man/man4/est.4
index f1b5832af734..98c05048145c 100644
--- a/share/man/man4/est.4
+++ b/share/man/man4/est.4
@@ -25,7 +25,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd June 12, 2012
+.Dd October 18 , 2012
.Dt EST 4
.Os
.Sh NAME
@@ -63,13 +63,36 @@ behavior.
.Bl -tag -width indent
.It hw.est.msr_info
Attempt to infer information from direct probing of the msr.
-Should only be used in diagnostic cases
+Should only be used in diagnostic cases.
.Pq default 0
.It hw.est.strict
Validate frequency requested is accepted by the cpu when set.
It appears that this will only work on single core cpus.
.Pq default 0
.El
+.Sh SYSCTL VARIABLES
+The following
+.Xr sysctl 8
+values are available
+.Bl -tag -width indent
+.It Va dev.est.%d.\%desc
+Description of support, almost always Enhanced SpeedStep Frequency Control.
+.It dev.est.0.%desc: Enhanced SpeedStep Frequency Control
+.It Va dev.est.%d.\%driver
+Driver in use, always est.
+.It dev.est.0.%driver: est
+.It Va dev.est.%d.\%parent
+.It dev.est.0.%parent: cpu0
+The cpu that is exposing these frequencies.
+For example
+.Va cpu0 .
+.It Va dev.est.%d.freq_settings .
+The valid frequencies that are allowed by this CPU and their step values.
+.It dev.est.0.freq_settings: 2201/45000 2200/45000 2000/39581 1900/37387
+1800/34806 1700/32703 1600/30227 1500/28212 1400/25828 1300/23900 1200/21613
+1100/19775 1000/17582 900/15437 800/13723
+.Pp
+.El
.Sh DIAGNOSTICS
.Bl -diag
.It "est%d: <Enhanced SpeedStep Frequency Control> on cpu%d"