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| author | Alexander Motin <mav@FreeBSD.org> | 2021-07-28 20:15:43 +0000 |
|---|---|---|
| committer | Alexander Motin <mav@FreeBSD.org> | 2021-08-11 00:49:22 +0000 |
| commit | 50c21bf3390556920ba8d73c50292776ce58bdaf (patch) | |
| tree | 7a741675e9d40213c5ba1dcd2774db17d4198f65 | |
| parent | 6f2898503a927a44104e4ceae8ff9c765abf7ece (diff) | |
| download | src-50c21bf3390556920ba8d73c50292776ce58bdaf.tar.gz src-50c21bf3390556920ba8d73c50292776ce58bdaf.zip | |
Do not expose to scheduler caches of single CPU.
Before this change my dual-Xeon(R) Gold 6242R always reported 3 levels
or topology (root, package/L3 and core/L2). But with SMT disabled
core/L2 matches thread, so additional topology level only causes more
traversal work. With this change SMT case is reported same as before,
while non-SMT is reported with only 2 much more simple levels.
MFC after: 2 weeks
(cherry picked from commit 5a49f1914178c5275105f2ab0d23a98118cd585f)
| -rw-r--r-- | sys/x86/x86/mp_x86.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c index 2dcdf923c467..f1c1e45e79b8 100644 --- a/sys/x86/x86/mp_x86.c +++ b/sys/x86/x86/mp_x86.c @@ -828,6 +828,12 @@ x86topo_add_sched_group(struct topo_node *root, struct cpu_group *cg_root) node = topo_next_nonchild_node(root, node); } + /* + * We are not interested in nodes including only one CPU each. + */ + if (nchildren == root->cpu_count) + return; + cg_root->cg_child = smp_topo_alloc(nchildren); cg_root->cg_children = nchildren; |