aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSean Bruno <sbruno@FreeBSD.org>2018-05-08 21:14:29 +0000
committerSean Bruno <sbruno@FreeBSD.org>2018-05-08 21:14:29 +0000
commit57b493651403c93009b81f8a4d1df5592f6573f5 (patch)
tree28cd4cdebec128e20b4b6da8cc11a75836319aec
parent2b7d5b92d776f1121a2ef69d3bf999f58a5e4bb5 (diff)
downloadsrc-57b493651403c93009b81f8a4d1df5592f6573f5.tar.gz
src-57b493651403c93009b81f8a4d1df5592f6573f5.zip
nxge(4):
Remove nxge(4) and associated man page and tools in FreeBSD 12.0. Submitted by: kbowling Reviewed by: brooks Relnotes: yes Sponsored by: Limelight Networks Differential Revision: https://reviews.freebsd.org/D1529
Notes
Notes: svn path=/head/; revision=333388
-rw-r--r--ObsoleteFiles.inc3
-rw-r--r--UPDATING6
-rw-r--r--share/man/man4/Makefile4
-rw-r--r--share/man/man4/nxge.4102
-rw-r--r--share/man/man4/vlan.43
-rw-r--r--sys/conf/NOTES1
-rw-r--r--sys/conf/files19
-rw-r--r--sys/dev/nxge/if_nxge.c3533
-rw-r--r--sys/dev/nxge/if_nxge.h415
-rw-r--r--sys/dev/nxge/include/build-version.h6
-rw-r--r--sys/dev/nxge/include/version.h47
-rw-r--r--sys/dev/nxge/include/xge-debug.h417
-rw-r--r--sys/dev/nxge/include/xge-defs.h143
-rw-r--r--sys/dev/nxge/include/xge-list.h197
-rw-r--r--sys/dev/nxge/include/xge-os-pal.h127
-rw-r--r--sys/dev/nxge/include/xge-queue.h179
-rw-r--r--sys/dev/nxge/include/xgehal-channel.h492
-rw-r--r--sys/dev/nxge/include/xgehal-config.h914
-rw-r--r--sys/dev/nxge/include/xgehal-device.h1012
-rw-r--r--sys/dev/nxge/include/xgehal-driver.h316
-rw-r--r--sys/dev/nxge/include/xgehal-event.h79
-rw-r--r--sys/dev/nxge/include/xgehal-fifo.h361
-rw-r--r--sys/dev/nxge/include/xgehal-mgmt.h222
-rw-r--r--sys/dev/nxge/include/xgehal-mgmtaux.h89
-rw-r--r--sys/dev/nxge/include/xgehal-mm.h168
-rw-r--r--sys/dev/nxge/include/xgehal-regs.h1375
-rw-r--r--sys/dev/nxge/include/xgehal-ring.h467
-rw-r--r--sys/dev/nxge/include/xgehal-stats.h1566
-rw-r--r--sys/dev/nxge/include/xgehal-types.h609
-rw-r--r--sys/dev/nxge/include/xgehal.h46
-rw-r--r--sys/dev/nxge/xge-osdep.h790
-rw-r--r--sys/dev/nxge/xgehal/xge-queue.c454
-rw-r--r--sys/dev/nxge/xgehal/xgehal-channel-fp.c296
-rw-r--r--sys/dev/nxge/xgehal/xgehal-channel.c586
-rw-r--r--sys/dev/nxge/xgehal/xgehal-config.c755
-rw-r--r--sys/dev/nxge/xgehal/xgehal-device-fp.c1426
-rw-r--r--sys/dev/nxge/xgehal/xgehal-device.c7268
-rw-r--r--sys/dev/nxge/xgehal/xgehal-driver.c294
-rw-r--r--sys/dev/nxge/xgehal/xgehal-fifo-fp.c1169
-rw-r--r--sys/dev/nxge/xgehal/xgehal-fifo.c562
-rw-r--r--sys/dev/nxge/xgehal/xgehal-mgmt.c1766
-rw-r--r--sys/dev/nxge/xgehal/xgehal-mgmtaux.c1725
-rw-r--r--sys/dev/nxge/xgehal/xgehal-mm.c430
-rw-r--r--sys/dev/nxge/xgehal/xgehal-ring-fp.c846
-rw-r--r--sys/dev/nxge/xgehal/xgehal-ring.c663
-rw-r--r--sys/dev/nxge/xgehal/xgehal-stats.c1013
-rw-r--r--sys/dev/nxge/xgell-version.h42
-rw-r--r--sys/modules/Makefile2
-rw-r--r--sys/modules/nxge/Makefile50
-rw-r--r--tools/kerneldoc/subsys/Doxyfile-dev_nxge21
-rw-r--r--tools/tools/README1
-rw-r--r--tools/tools/nxge/Makefile7
-rw-r--r--tools/tools/nxge/xge_cmn.h150
-rw-r--r--tools/tools/nxge/xge_info.c606
-rw-r--r--tools/tools/nxge/xge_info.h79
-rw-r--r--tools/tools/nxge/xge_log.c321
-rw-r--r--tools/tools/nxge/xge_log.h2592
-rw-r--r--usr.sbin/bsdconfig/share/device.subr1
58 files changed, 10 insertions, 36823 deletions
diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc
index 2e28bba873e0..06aeb118ce9b 100644
--- a/ObsoleteFiles.inc
+++ b/ObsoleteFiles.inc
@@ -38,6 +38,9 @@
# xargs -n1 | sort | uniq -d;
# done
+# 20180508: retire nxge
+OLD_FILES+=usr/share/man/man4/if_nxge.4.gz
+OLD_FILES+=usr/share/man/man4/nxge.4.gz
# 20180505: rhosts
OLD_FILES+=usr/share/skel/dot.rhosts
# 20180502: retire ixgb
diff --git a/UPDATING b/UPDATING
index 3eeef66dcac7..a5939c0e06e2 100644
--- a/UPDATING
+++ b/UPDATING
@@ -51,6 +51,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 12.x IS SLOW:
****************************** SPECIAL WARNING: ******************************
+20180508:
+ The nxge(4) driver has been removed. This driver was for PCI-X 10g
+ cards made by s2io/Neterion. The company was aquired by Exar and
+ no longer sells or supports Ethernet products. If you have device
+ nxge in your kernel config file it must be removed.
+
20180504:
The tz database (tzdb) has been updated to 2018e. This version more
correctly models time stamps in time zones with negative DST such as
diff --git a/share/man/man4/Makefile b/share/man/man4/Makefile
index 36de44df7c4e..a9deb0bc1c0a 100644
--- a/share/man/man4/Makefile
+++ b/share/man/man4/Makefile
@@ -397,7 +397,6 @@ MAN= aac.4 \
${_nvme.4} \
${_nvram.4} \
${_nvram2env.4} \
- ${_nxge.4} \
oce.4 \
ocs_fc.4\
ohci.4 \
@@ -706,7 +705,6 @@ MLINKS+=netintro.4 net.4 \
netintro.4 networking.4
MLINKS+=${_nfe.4} ${_if_nfe.4}
MLINKS+=nge.4 if_nge.4
-MLINKS+=${_nxge.4} ${_if_nxge.4}
MLINKS+=ow.4 onewire.4
MLINKS+=pccbb.4 cbb.4
MLINKS+=pcm.4 snd.4 \
@@ -823,7 +821,6 @@ _ichwd.4= ichwd.4
_if_bxe.4= if_bxe.4
_if_ndis.4= if_ndis.4
_if_nfe.4= if_nfe.4
-_if_nxge.4= if_nxge.4
_if_urtw.4= if_urtw.4
_if_vmx.4= if_vmx.4
_if_vtnet.4= if_vtnet.4
@@ -840,7 +837,6 @@ _nfsmb.4= nfsmb.4
_nvd.4= nvd.4
_nvme.4= nvme.4
_nvram.4= nvram.4
-_nxge.4= nxge.4
_virtio.4= virtio.4
_virtio_balloon.4=virtio_balloon.4
_virtio_blk.4= virtio_blk.4
diff --git a/share/man/man4/nxge.4 b/share/man/man4/nxge.4
deleted file mode 100644
index f88a828a0990..000000000000
--- a/share/man/man4/nxge.4
+++ /dev/null
@@ -1,102 +0,0 @@
-.\" Copyright (c) 2007, Neterion Inc
-.\" All rights reserved.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\" notice, this list of conditions and the following disclaimer as
-.\" the first lines of this file unmodified.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\" notice, this list of conditions and the following disclaimer in the
-.\" documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
-.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
-.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
-.\" IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
-.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
-.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
-.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-.\"
-.\" $FreeBSD$
-.\"
-.Dd May 3, 2018
-.Dt NXGE 4
-.Os
-.Sh NAME
-.Nm nxge
-.Nd "Neterion Xframe 10GbE Server/Storage adapter driver"
-.Sh SYNOPSIS
-To compile this driver into the kernel,
-place the following line in your
-kernel configuration file:
-.Bd -ragged -offset indent
-.Cd "device nxge"
-.Ed
-.Pp
-Alternatively, to load the driver as a
-module at boot time, place the following line in
-.Xr loader.conf 5 :
-.Bd -literal -offset indent
-if_nxge_load="YES"
-.Ed
-.Sh DEPRECATION NOTICE
-The
-.Nm
-driver is not present in
-.Fx 12.0
-and later.
-.Sh DESCRIPTION
-The
-.Nm
-driver provides support for Neterion Xframe-I and Xframe-II adapters.
-The driver supports TCP Segmentation Offload (TSO/LSO),
-Large Receive Offload (LRO), Jumbo Frames (5 buffer mode),
-Header Separation (Rx 2 buffer mode), VLAN, and Promiscuous mode.
-.Pp
-For general information and support, please visit the Neterion support page
-.Pa http://www.neterion.com/support/support.html .
-.Pp
-Support for Jumbo Frames is provided via the interface MTU setting.
-Selecting an MTU larger than 1500 bytes with the
-.Xr ifconfig 8
-utility configures the adapter to transmit and receive Jumbo Frames.
-Xframe adapters support Jumbo Frames up to 9600 bytes.
-.Pp
-For Jumbo Frames, the driver will try to allocate physically contiguous buffers.
-Failures to do so may degrade the performance.
-To resolve such problems, please visit
-.Pa http://www.neterion.com
-where additional information and a kernel patch can be found.
-.Pp
-For more information on configuring this device, see
-.Xr ifconfig 8 .
-.Sh HARDWARE
-The
-.Nm
-driver supports Neterion Xframe 10 Gigabit Ethernet adapters listed in
-.Pa http://www.neterion.com/how/pricing.html .
-.Sh SUPPORT
-For troubleshooting tips and FAQs, please visit
-.Pa http://trac.neterion.com/cgi-bin/trac.cgi/wiki/TitleIndex?anonymous .
-.Pp
-For any issues please send an email to
-.Aq Mt support@neterion.com .
-.Sh SEE ALSO
-.Xr arp 4 ,
-.Xr netintro 4 ,
-.Xr ifconfig 8
-.Sh HISTORY
-The
-.Nm
-device driver first appeared in
-.Fx 7.0 .
-.Sh AUTHORS
-The
-.Nm
-driver was written by
-.An Neterion Aq Mt support@neterion.com .
diff --git a/share/man/man4/vlan.4 b/share/man/man4/vlan.4
index a9e440cb3707..b2f826b3227c 100644
--- a/share/man/man4/vlan.4
+++ b/share/man/man4/vlan.4
@@ -25,7 +25,7 @@
.\"
.\" $FreeBSD$
.\"
-.Dd August 28, 2017
+.Dd May 8, 2018
.Dt VLAN 4
.Os
.Sh NAME
@@ -137,7 +137,6 @@ in hardware:
.Xr liquidio 4 ,
.Xr msk 4 ,
.Xr mxge 4 ,
-.Xr nxge 4 ,
.Xr nge 4 ,
.Xr re 4 ,
.Xr sge 4 ,
diff --git a/sys/conf/NOTES b/sys/conf/NOTES
index a5a039b8b389..84992147098b 100644
--- a/sys/conf/NOTES
+++ b/sys/conf/NOTES
@@ -2131,7 +2131,6 @@ device ix # Intel Pro/10Gbe PCIE Ethernet
device ixv # Intel Pro/10Gbe PCIE Ethernet VF
device le # AMD Am7900 LANCE and Am79C9xx PCnet
device mxge # Myricom Myri-10G 10GbE NIC
-device nxge # Neterion Xframe 10GbE Server/Storage Adapter
device oce # Emulex 10 GbE (OneConnect Ethernet)
device ti # Alteon Networks Tigon I/II gigabit Ethernet
device txp # 3Com 3cR990 (``Typhoon'')
diff --git a/sys/conf/files b/sys/conf/files
index 8fae502d0d79..3b4336f65d41 100644
--- a/sys/conf/files
+++ b/sys/conf/files
@@ -2541,25 +2541,6 @@ dev/netmap/netmap_legacy.c optional netmap
# compile-with "${NORMAL_C} -Wconversion -Wextra"
dev/nfsmb/nfsmb.c optional nfsmb pci
dev/nge/if_nge.c optional nge
-dev/nxge/if_nxge.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-device.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-mm.c optional nxge
-dev/nxge/xgehal/xge-queue.c optional nxge
-dev/nxge/xgehal/xgehal-driver.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-ring.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-channel.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-fifo.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-stats.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
-dev/nxge/xgehal/xgehal-config.c optional nxge
-dev/nxge/xgehal/xgehal-mgmt.c optional nxge \
- compile-with "${NORMAL_C} ${NO_WSELF_ASSIGN}"
dev/nmdm/nmdm.c optional nmdm
dev/nsp/nsp.c optional nsp
dev/nsp/nsp_pccard.c optional nsp pccard
diff --git a/sys/dev/nxge/if_nxge.c b/sys/dev/nxge/if_nxge.c
deleted file mode 100644
index 1fbac753f5f9..000000000000
--- a/sys/dev/nxge/if_nxge.c
+++ /dev/null
@@ -1,3533 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <dev/nxge/if_nxge.h>
-#include <dev/nxge/xge-osdep.h>
-#include <net/if_arp.h>
-#include <sys/types.h>
-#include <net/if.h>
-#include <net/if_var.h>
-#include <net/if_vlan_var.h>
-
-int copyright_print = 0;
-int hal_driver_init_count = 0;
-size_t size = sizeof(int);
-
-static void inline xge_flush_txds(xge_hal_channel_h);
-
-/**
- * xge_probe
- * Probes for Xframe devices
- *
- * @dev Device handle
- *
- * Returns
- * BUS_PROBE_DEFAULT if device is supported
- * ENXIO if device is not supported
- */
-int
-xge_probe(device_t dev)
-{
- int devid = pci_get_device(dev);
- int vendorid = pci_get_vendor(dev);
- int retValue = ENXIO;
-
- if(vendorid == XGE_PCI_VENDOR_ID) {
- if((devid == XGE_PCI_DEVICE_ID_XENA_2) ||
- (devid == XGE_PCI_DEVICE_ID_HERC_2)) {
- if(!copyright_print) {
- xge_os_printf(XGE_COPYRIGHT);
- copyright_print = 1;
- }
- device_set_desc_copy(dev,
- "Neterion Xframe 10 Gigabit Ethernet Adapter");
- retValue = BUS_PROBE_DEFAULT;
- }
- }
-
- return retValue;
-}
-
-/**
- * xge_init_params
- * Sets HAL parameter values (from kenv).
- *
- * @dconfig Device Configuration
- * @dev Device Handle
- */
-void
-xge_init_params(xge_hal_device_config_t *dconfig, device_t dev)
-{
- int qindex, tindex, revision;
- device_t checkdev;
- xge_lldev_t *lldev = (xge_lldev_t *)device_get_softc(dev);
-
- dconfig->mtu = XGE_DEFAULT_INITIAL_MTU;
- dconfig->pci_freq_mherz = XGE_DEFAULT_USER_HARDCODED;
- dconfig->device_poll_millis = XGE_HAL_DEFAULT_DEVICE_POLL_MILLIS;
- dconfig->link_stability_period = XGE_HAL_DEFAULT_LINK_STABILITY_PERIOD;
- dconfig->mac.rmac_bcast_en = XGE_DEFAULT_MAC_RMAC_BCAST_EN;
- dconfig->fifo.alignment_size = XGE_DEFAULT_FIFO_ALIGNMENT_SIZE;
-
- XGE_GET_PARAM("hw.xge.enable_tso", (*lldev), enabled_tso,
- XGE_DEFAULT_ENABLED_TSO);
- XGE_GET_PARAM("hw.xge.enable_lro", (*lldev), enabled_lro,
- XGE_DEFAULT_ENABLED_LRO);
- XGE_GET_PARAM("hw.xge.enable_msi", (*lldev), enabled_msi,
- XGE_DEFAULT_ENABLED_MSI);
-
- XGE_GET_PARAM("hw.xge.latency_timer", (*dconfig), latency_timer,
- XGE_DEFAULT_LATENCY_TIMER);
- XGE_GET_PARAM("hw.xge.max_splits_trans", (*dconfig), max_splits_trans,
- XGE_DEFAULT_MAX_SPLITS_TRANS);
- XGE_GET_PARAM("hw.xge.mmrb_count", (*dconfig), mmrb_count,
- XGE_DEFAULT_MMRB_COUNT);
- XGE_GET_PARAM("hw.xge.shared_splits", (*dconfig), shared_splits,
- XGE_DEFAULT_SHARED_SPLITS);
- XGE_GET_PARAM("hw.xge.isr_polling_cnt", (*dconfig), isr_polling_cnt,
- XGE_DEFAULT_ISR_POLLING_CNT);
- XGE_GET_PARAM("hw.xge.stats_refresh_time_sec", (*dconfig),
- stats_refresh_time_sec, XGE_DEFAULT_STATS_REFRESH_TIME_SEC);
-
- XGE_GET_PARAM_MAC("hw.xge.mac_tmac_util_period", tmac_util_period,
- XGE_DEFAULT_MAC_TMAC_UTIL_PERIOD);
- XGE_GET_PARAM_MAC("hw.xge.mac_rmac_util_period", rmac_util_period,
- XGE_DEFAULT_MAC_RMAC_UTIL_PERIOD);
- XGE_GET_PARAM_MAC("hw.xge.mac_rmac_pause_gen_en", rmac_pause_gen_en,
- XGE_DEFAULT_MAC_RMAC_PAUSE_GEN_EN);
- XGE_GET_PARAM_MAC("hw.xge.mac_rmac_pause_rcv_en", rmac_pause_rcv_en,
- XGE_DEFAULT_MAC_RMAC_PAUSE_RCV_EN);
- XGE_GET_PARAM_MAC("hw.xge.mac_rmac_pause_time", rmac_pause_time,
- XGE_DEFAULT_MAC_RMAC_PAUSE_TIME);
- XGE_GET_PARAM_MAC("hw.xge.mac_mc_pause_threshold_q0q3",
- mc_pause_threshold_q0q3, XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q0Q3);
- XGE_GET_PARAM_MAC("hw.xge.mac_mc_pause_threshold_q4q7",
- mc_pause_threshold_q4q7, XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q4Q7);
-
- XGE_GET_PARAM_FIFO("hw.xge.fifo_memblock_size", memblock_size,
- XGE_DEFAULT_FIFO_MEMBLOCK_SIZE);
- XGE_GET_PARAM_FIFO("hw.xge.fifo_reserve_threshold", reserve_threshold,
- XGE_DEFAULT_FIFO_RESERVE_THRESHOLD);
- XGE_GET_PARAM_FIFO("hw.xge.fifo_max_frags", max_frags,
- XGE_DEFAULT_FIFO_MAX_FRAGS);
-
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++) {
- XGE_GET_PARAM_FIFO_QUEUE("hw.xge.fifo_queue_intr", intr, qindex,
- XGE_DEFAULT_FIFO_QUEUE_INTR);
- XGE_GET_PARAM_FIFO_QUEUE("hw.xge.fifo_queue_max", max, qindex,
- XGE_DEFAULT_FIFO_QUEUE_MAX);
- XGE_GET_PARAM_FIFO_QUEUE("hw.xge.fifo_queue_initial", initial,
- qindex, XGE_DEFAULT_FIFO_QUEUE_INITIAL);
-
- for (tindex = 0; tindex < XGE_HAL_MAX_FIFO_TTI_NUM; tindex++) {
- dconfig->fifo.queue[qindex].tti[tindex].enabled = 1;
- dconfig->fifo.queue[qindex].configured = 1;
-
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_urange_a",
- urange_a, qindex, tindex,
- XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_A);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_urange_b",
- urange_b, qindex, tindex,
- XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_B);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_urange_c",
- urange_c, qindex, tindex,
- XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_C);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_ufc_a",
- ufc_a, qindex, tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_A);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_ufc_b",
- ufc_b, qindex, tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_B);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_ufc_c",
- ufc_c, qindex, tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_C);
- XGE_GET_PARAM_FIFO_QUEUE_TTI("hw.xge.fifo_queue_tti_ufc_d",
- ufc_d, qindex, tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_D);
- XGE_GET_PARAM_FIFO_QUEUE_TTI(
- "hw.xge.fifo_queue_tti_timer_ci_en", timer_ci_en, qindex,
- tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_CI_EN);
- XGE_GET_PARAM_FIFO_QUEUE_TTI(
- "hw.xge.fifo_queue_tti_timer_ac_en", timer_ac_en, qindex,
- tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_AC_EN);
- XGE_GET_PARAM_FIFO_QUEUE_TTI(
- "hw.xge.fifo_queue_tti_timer_val_us", timer_val_us, qindex,
- tindex, XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_VAL_US);
- }
- }
-
- XGE_GET_PARAM_RING("hw.xge.ring_memblock_size", memblock_size,
- XGE_DEFAULT_RING_MEMBLOCK_SIZE);
-
- XGE_GET_PARAM_RING("hw.xge.ring_strip_vlan_tag", strip_vlan_tag,
- XGE_DEFAULT_RING_STRIP_VLAN_TAG);
-
- XGE_GET_PARAM("hw.xge.buffer_mode", (*lldev), buffer_mode,
- XGE_DEFAULT_BUFFER_MODE);
- if((lldev->buffer_mode < XGE_HAL_RING_QUEUE_BUFFER_MODE_1) ||
- (lldev->buffer_mode > XGE_HAL_RING_QUEUE_BUFFER_MODE_2)) {
- xge_trace(XGE_ERR, "Supported buffer modes are 1 and 2");
- lldev->buffer_mode = XGE_HAL_RING_QUEUE_BUFFER_MODE_1;
- }
-
- for (qindex = 0; qindex < XGE_RING_COUNT; qindex++) {
- dconfig->ring.queue[qindex].max_frm_len = XGE_HAL_RING_USE_MTU;
- dconfig->ring.queue[qindex].priority = 0;
- dconfig->ring.queue[qindex].configured = 1;
- dconfig->ring.queue[qindex].buffer_mode =
- (lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_2) ?
- XGE_HAL_RING_QUEUE_BUFFER_MODE_3 : lldev->buffer_mode;
-
- XGE_GET_PARAM_RING_QUEUE("hw.xge.ring_queue_max", max, qindex,
- XGE_DEFAULT_RING_QUEUE_MAX);
- XGE_GET_PARAM_RING_QUEUE("hw.xge.ring_queue_initial", initial,
- qindex, XGE_DEFAULT_RING_QUEUE_INITIAL);
- XGE_GET_PARAM_RING_QUEUE("hw.xge.ring_queue_dram_size_mb",
- dram_size_mb, qindex, XGE_DEFAULT_RING_QUEUE_DRAM_SIZE_MB);
- XGE_GET_PARAM_RING_QUEUE("hw.xge.ring_queue_indicate_max_pkts",
- indicate_max_pkts, qindex,
- XGE_DEFAULT_RING_QUEUE_INDICATE_MAX_PKTS);
- XGE_GET_PARAM_RING_QUEUE("hw.xge.ring_queue_backoff_interval_us",
- backoff_interval_us, qindex,
- XGE_DEFAULT_RING_QUEUE_BACKOFF_INTERVAL_US);
-
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_ufc_a", ufc_a,
- qindex, XGE_DEFAULT_RING_QUEUE_RTI_UFC_A);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_ufc_b", ufc_b,
- qindex, XGE_DEFAULT_RING_QUEUE_RTI_UFC_B);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_ufc_c", ufc_c,
- qindex, XGE_DEFAULT_RING_QUEUE_RTI_UFC_C);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_ufc_d", ufc_d,
- qindex, XGE_DEFAULT_RING_QUEUE_RTI_UFC_D);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_timer_ac_en",
- timer_ac_en, qindex, XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_timer_val_us",
- timer_val_us, qindex, XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_urange_a",
- urange_a, qindex, XGE_DEFAULT_RING_QUEUE_RTI_URANGE_A);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_urange_b",
- urange_b, qindex, XGE_DEFAULT_RING_QUEUE_RTI_URANGE_B);
- XGE_GET_PARAM_RING_QUEUE_RTI("hw.xge.ring_queue_rti_urange_c",
- urange_c, qindex, XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C);
- }
-
- if(dconfig->fifo.max_frags > (PAGE_SIZE/32)) {
- xge_os_printf("fifo_max_frags = %d", dconfig->fifo.max_frags)
- xge_os_printf("fifo_max_frags should be <= (PAGE_SIZE / 32) = %d",
- (int)(PAGE_SIZE / 32))
- xge_os_printf("Using fifo_max_frags = %d", (int)(PAGE_SIZE / 32))
- dconfig->fifo.max_frags = (PAGE_SIZE / 32);
- }
-
- checkdev = pci_find_device(VENDOR_ID_AMD, DEVICE_ID_8131_PCI_BRIDGE);
- if(checkdev != NULL) {
- /* Check Revision for 0x12 */
- revision = pci_read_config(checkdev,
- xge_offsetof(xge_hal_pci_config_t, revision), 1);
- if(revision <= 0x12) {
- /* Set mmrb_count to 1k and max splits = 2 */
- dconfig->mmrb_count = 1;
- dconfig->max_splits_trans = XGE_HAL_THREE_SPLIT_TRANSACTION;
- }
- }
-}
-
-/**
- * xge_buffer_sizes_set
- * Set buffer sizes based on Rx buffer mode
- *
- * @lldev Per-adapter Data
- * @buffer_mode Rx Buffer Mode
- */
-void
-xge_rx_buffer_sizes_set(xge_lldev_t *lldev, int buffer_mode, int mtu)
-{
- int index = 0;
- int frame_header = XGE_HAL_MAC_HEADER_MAX_SIZE;
- int buffer_size = mtu + frame_header;
-
- xge_os_memzero(lldev->rxd_mbuf_len, sizeof(lldev->rxd_mbuf_len));
-
- if(buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_5)
- lldev->rxd_mbuf_len[buffer_mode - 1] = mtu;
-
- lldev->rxd_mbuf_len[0] = (buffer_mode == 1) ? buffer_size:frame_header;
-
- if(buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_5)
- lldev->rxd_mbuf_len[1] = XGE_HAL_TCPIP_HEADER_MAX_SIZE;
-
- if(buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_5) {
- index = 2;
- buffer_size -= XGE_HAL_TCPIP_HEADER_MAX_SIZE;
- while(buffer_size > MJUMPAGESIZE) {
- lldev->rxd_mbuf_len[index++] = MJUMPAGESIZE;
- buffer_size -= MJUMPAGESIZE;
- }
- XGE_ALIGN_TO(buffer_size, 128);
- lldev->rxd_mbuf_len[index] = buffer_size;
- lldev->rxd_mbuf_cnt = index + 1;
- }
-
- for(index = 0; index < buffer_mode; index++)
- xge_trace(XGE_TRACE, "Buffer[%d] %d\n", index,
- lldev->rxd_mbuf_len[index]);
-}
-
-/**
- * xge_buffer_mode_init
- * Init Rx buffer mode
- *
- * @lldev Per-adapter Data
- * @mtu Interface MTU
- */
-void
-xge_buffer_mode_init(xge_lldev_t *lldev, int mtu)
-{
- int index = 0, buffer_size = 0;
- xge_hal_ring_config_t *ring_config = &((lldev->devh)->config.ring);
-
- buffer_size = mtu + XGE_HAL_MAC_HEADER_MAX_SIZE;
-
- if(lldev->enabled_lro)
- (lldev->ifnetp)->if_capenable |= IFCAP_LRO;
- else
- (lldev->ifnetp)->if_capenable &= ~IFCAP_LRO;
-
- lldev->rxd_mbuf_cnt = lldev->buffer_mode;
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_2) {
- XGE_SET_BUFFER_MODE_IN_RINGS(XGE_HAL_RING_QUEUE_BUFFER_MODE_3);
- ring_config->scatter_mode = XGE_HAL_RING_QUEUE_SCATTER_MODE_B;
- }
- else {
- XGE_SET_BUFFER_MODE_IN_RINGS(lldev->buffer_mode);
- ring_config->scatter_mode = XGE_HAL_RING_QUEUE_SCATTER_MODE_A;
- }
- xge_rx_buffer_sizes_set(lldev, lldev->buffer_mode, mtu);
-
- xge_os_printf("%s: TSO %s", device_get_nameunit(lldev->device),
- ((lldev->enabled_tso) ? "Enabled":"Disabled"));
- xge_os_printf("%s: LRO %s", device_get_nameunit(lldev->device),
- ((lldev->ifnetp)->if_capenable & IFCAP_LRO) ? "Enabled":"Disabled");
- xge_os_printf("%s: Rx %d Buffer Mode Enabled",
- device_get_nameunit(lldev->device), lldev->buffer_mode);
-}
-
-/**
- * xge_driver_initialize
- * Initializes HAL driver (common for all devices)
- *
- * Returns
- * XGE_HAL_OK if success
- * XGE_HAL_ERR_BAD_DRIVER_CONFIG if driver configuration parameters are invalid
- */
-int
-xge_driver_initialize(void)
-{
- xge_hal_uld_cbs_t uld_callbacks;
- xge_hal_driver_config_t driver_config;
- xge_hal_status_e status = XGE_HAL_OK;
-
- /* Initialize HAL driver */
- if(!hal_driver_init_count) {
- xge_os_memzero(&uld_callbacks, sizeof(xge_hal_uld_cbs_t));
- xge_os_memzero(&driver_config, sizeof(xge_hal_driver_config_t));
-
- /*
- * Initial and maximum size of the queue used to store the events
- * like Link up/down (xge_hal_event_e)
- */
- driver_config.queue_size_initial = XGE_HAL_MIN_QUEUE_SIZE_INITIAL;
- driver_config.queue_size_max = XGE_HAL_MAX_QUEUE_SIZE_MAX;
-
- uld_callbacks.link_up = xge_callback_link_up;
- uld_callbacks.link_down = xge_callback_link_down;
- uld_callbacks.crit_err = xge_callback_crit_err;
- uld_callbacks.event = xge_callback_event;
-
- status = xge_hal_driver_initialize(&driver_config, &uld_callbacks);
- if(status != XGE_HAL_OK) {
- XGE_EXIT_ON_ERR("xgeX: Initialization of HAL driver failed",
- xdi_out, status);
- }
- }
- hal_driver_init_count = hal_driver_init_count + 1;
-
- xge_hal_driver_debug_module_mask_set(0xffffffff);
- xge_hal_driver_debug_level_set(XGE_TRACE);
-
-xdi_out:
- return status;
-}
-
-/**
- * xge_media_init
- * Initializes, adds and sets media
- *
- * @devc Device Handle
- */
-void
-xge_media_init(device_t devc)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)device_get_softc(devc);
-
- /* Initialize Media */
- ifmedia_init(&lldev->media, IFM_IMASK, xge_ifmedia_change,
- xge_ifmedia_status);
-
- /* Add supported media */
- ifmedia_add(&lldev->media, IFM_ETHER | IFM_1000_SX | IFM_FDX, 0, NULL);
- ifmedia_add(&lldev->media, IFM_ETHER | IFM_1000_SX, 0, NULL);
- ifmedia_add(&lldev->media, IFM_ETHER | IFM_AUTO, 0, NULL);
- ifmedia_add(&lldev->media, IFM_ETHER | IFM_10G_SR, 0, NULL);
- ifmedia_add(&lldev->media, IFM_ETHER | IFM_10G_LR, 0, NULL);
-
- /* Set media */
- ifmedia_set(&lldev->media, IFM_ETHER | IFM_AUTO);
-}
-
-/**
- * xge_pci_space_save
- * Save PCI configuration space
- *
- * @dev Device Handle
- */
-void
-xge_pci_space_save(device_t dev)
-{
- struct pci_devinfo *dinfo = NULL;
-
- dinfo = device_get_ivars(dev);
- xge_trace(XGE_TRACE, "Saving PCI configuration space");
- pci_cfg_save(dev, dinfo, 0);
-}
-
-/**
- * xge_pci_space_restore
- * Restore saved PCI configuration space
- *
- * @dev Device Handle
- */
-void
-xge_pci_space_restore(device_t dev)
-{
- struct pci_devinfo *dinfo = NULL;
-
- dinfo = device_get_ivars(dev);
- xge_trace(XGE_TRACE, "Restoring PCI configuration space");
- pci_cfg_restore(dev, dinfo);
-}
-
-/**
- * xge_msi_info_save
- * Save MSI info
- *
- * @lldev Per-adapter Data
- */
-void
-xge_msi_info_save(xge_lldev_t * lldev)
-{
- xge_os_pci_read16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_control),
- &lldev->msi_info.msi_control);
- xge_os_pci_read32(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_lower_address),
- &lldev->msi_info.msi_lower_address);
- xge_os_pci_read32(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_higher_address),
- &lldev->msi_info.msi_higher_address);
- xge_os_pci_read16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_data),
- &lldev->msi_info.msi_data);
-}
-
-/**
- * xge_msi_info_restore
- * Restore saved MSI info
- *
- * @dev Device Handle
- */
-void
-xge_msi_info_restore(xge_lldev_t *lldev)
-{
- /*
- * If interface is made down and up, traffic fails. It was observed that
- * MSI information were getting reset on down. Restoring them.
- */
- xge_os_pci_write16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_control),
- lldev->msi_info.msi_control);
-
- xge_os_pci_write32(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_lower_address),
- lldev->msi_info.msi_lower_address);
-
- xge_os_pci_write32(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_higher_address),
- lldev->msi_info.msi_higher_address);
-
- xge_os_pci_write16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_data),
- lldev->msi_info.msi_data);
-}
-
-/**
- * xge_init_mutex
- * Initializes mutexes used in driver
- *
- * @lldev Per-adapter Data
- */
-void
-xge_mutex_init(xge_lldev_t *lldev)
-{
- int qindex;
-
- sprintf(lldev->mtx_name_drv, "%s_drv",
- device_get_nameunit(lldev->device));
- mtx_init(&lldev->mtx_drv, lldev->mtx_name_drv, MTX_NETWORK_LOCK,
- MTX_DEF);
-
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++) {
- sprintf(lldev->mtx_name_tx[qindex], "%s_tx_%d",
- device_get_nameunit(lldev->device), qindex);
- mtx_init(&lldev->mtx_tx[qindex], lldev->mtx_name_tx[qindex], NULL,
- MTX_DEF);
- }
-}
-
-/**
- * xge_mutex_destroy
- * Destroys mutexes used in driver
- *
- * @lldev Per-adapter Data
- */
-void
-xge_mutex_destroy(xge_lldev_t *lldev)
-{
- int qindex;
-
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++)
- mtx_destroy(&lldev->mtx_tx[qindex]);
- mtx_destroy(&lldev->mtx_drv);
-}
-
-/**
- * xge_print_info
- * Print device and driver information
- *
- * @lldev Per-adapter Data
- */
-void
-xge_print_info(xge_lldev_t *lldev)
-{
- device_t dev = lldev->device;
- xge_hal_device_t *hldev = lldev->devh;
- xge_hal_status_e status = XGE_HAL_OK;
- u64 val64 = 0;
- const char *xge_pci_bus_speeds[17] = {
- "PCI 33MHz Bus",
- "PCI 66MHz Bus",
- "PCIX(M1) 66MHz Bus",
- "PCIX(M1) 100MHz Bus",
- "PCIX(M1) 133MHz Bus",
- "PCIX(M2) 133MHz Bus",
- "PCIX(M2) 200MHz Bus",
- "PCIX(M2) 266MHz Bus",
- "PCIX(M1) Reserved",
- "PCIX(M1) 66MHz Bus (Not Supported)",
- "PCIX(M1) 100MHz Bus (Not Supported)",
- "PCIX(M1) 133MHz Bus (Not Supported)",
- "PCIX(M2) Reserved",
- "PCIX 533 Reserved",
- "PCI Basic Mode",
- "PCIX Basic Mode",
- "PCI Invalid Mode"
- };
-
- xge_os_printf("%s: Xframe%s %s Revision %d Driver v%s",
- device_get_nameunit(dev),
- ((hldev->device_id == XGE_PCI_DEVICE_ID_XENA_2) ? "I" : "II"),
- hldev->vpd_data.product_name, hldev->revision, XGE_DRIVER_VERSION);
- xge_os_printf("%s: Serial Number %s",
- device_get_nameunit(dev), hldev->vpd_data.serial_num);
-
- if(pci_get_device(dev) == XGE_PCI_DEVICE_ID_HERC_2) {
- status = xge_hal_mgmt_reg_read(hldev, 0,
- xge_offsetof(xge_hal_pci_bar0_t, pci_info), &val64);
- if(status != XGE_HAL_OK)
- xge_trace(XGE_ERR, "Error for getting bus speed");
-
- xge_os_printf("%s: Adapter is on %s bit %s",
- device_get_nameunit(dev), ((val64 & BIT(8)) ? "32":"64"),
- (xge_pci_bus_speeds[((val64 & XGE_HAL_PCI_INFO) >> 60)]));
- }
-
- xge_os_printf("%s: Using %s Interrupts",
- device_get_nameunit(dev),
- (lldev->enabled_msi == XGE_HAL_INTR_MODE_MSI) ? "MSI":"Line");
-}
-
-/**
- * xge_create_dma_tags
- * Creates DMA tags for both Tx and Rx
- *
- * @dev Device Handle
- *
- * Returns XGE_HAL_OK or XGE_HAL_FAIL (if errors)
- */
-xge_hal_status_e
-xge_create_dma_tags(device_t dev)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)device_get_softc(dev);
- xge_hal_status_e status = XGE_HAL_FAIL;
- int mtu = (lldev->ifnetp)->if_mtu, maxsize;
-
- /* DMA tag for Tx */
- status = bus_dma_tag_create(
- bus_get_dma_tag(dev), /* Parent */
- PAGE_SIZE, /* Alignment */
- 0, /* Bounds */
- BUS_SPACE_MAXADDR, /* Low Address */
- BUS_SPACE_MAXADDR, /* High Address */
- NULL, /* Filter Function */
- NULL, /* Filter Function Arguments */
- MCLBYTES * XGE_MAX_SEGS, /* Maximum Size */
- XGE_MAX_SEGS, /* Number of Segments */
- MCLBYTES, /* Maximum Segment Size */
- BUS_DMA_ALLOCNOW, /* Flags */
- NULL, /* Lock Function */
- NULL, /* Lock Function Arguments */
- (&lldev->dma_tag_tx)); /* DMA Tag */
- if(status != 0)
- goto _exit;
-
- maxsize = mtu + XGE_HAL_MAC_HEADER_MAX_SIZE;
- if(maxsize <= MCLBYTES) {
- maxsize = MCLBYTES;
- }
- else {
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_5)
- maxsize = MJUMPAGESIZE;
- else
- maxsize = (maxsize <= MJUMPAGESIZE) ? MJUMPAGESIZE : MJUM9BYTES;
- }
-
- /* DMA tag for Rx */
- status = bus_dma_tag_create(
- bus_get_dma_tag(dev), /* Parent */
- PAGE_SIZE, /* Alignment */
- 0, /* Bounds */
- BUS_SPACE_MAXADDR, /* Low Address */
- BUS_SPACE_MAXADDR, /* High Address */
- NULL, /* Filter Function */
- NULL, /* Filter Function Arguments */
- maxsize, /* Maximum Size */
- 1, /* Number of Segments */
- maxsize, /* Maximum Segment Size */
- BUS_DMA_ALLOCNOW, /* Flags */
- NULL, /* Lock Function */
- NULL, /* Lock Function Arguments */
- (&lldev->dma_tag_rx)); /* DMA Tag */
- if(status != 0)
- goto _exit1;
-
- status = bus_dmamap_create(lldev->dma_tag_rx, BUS_DMA_NOWAIT,
- &lldev->extra_dma_map);
- if(status != 0)
- goto _exit2;
-
- status = XGE_HAL_OK;
- goto _exit;
-
-_exit2:
- status = bus_dma_tag_destroy(lldev->dma_tag_rx);
- if(status != 0)
- xge_trace(XGE_ERR, "Rx DMA tag destroy failed");
-_exit1:
- status = bus_dma_tag_destroy(lldev->dma_tag_tx);
- if(status != 0)
- xge_trace(XGE_ERR, "Tx DMA tag destroy failed");
- status = XGE_HAL_FAIL;
-_exit:
- return status;
-}
-
-/**
- * xge_confirm_changes
- * Disables and Enables interface to apply requested change
- *
- * @lldev Per-adapter Data
- * @mtu_set Is it called for changing MTU? (Yes: 1, No: 0)
- *
- * Returns 0 or Error Number
- */
-void
-xge_confirm_changes(xge_lldev_t *lldev, xge_option_e option)
-{
- if(lldev->initialized == 0) goto _exit1;
-
- mtx_lock(&lldev->mtx_drv);
- if_down(lldev->ifnetp);
- xge_device_stop(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
-
- if(option == XGE_SET_MTU)
- (lldev->ifnetp)->if_mtu = lldev->mtu;
- else
- xge_buffer_mode_init(lldev, lldev->mtu);
-
- xge_device_init(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
- if_up(lldev->ifnetp);
- mtx_unlock(&lldev->mtx_drv);
- goto _exit;
-
-_exit1:
- /* Request was to change MTU and device not initialized */
- if(option == XGE_SET_MTU) {
- (lldev->ifnetp)->if_mtu = lldev->mtu;
- xge_buffer_mode_init(lldev, lldev->mtu);
- }
-_exit:
- return;
-}
-
-/**
- * xge_change_lro_status
- * Enable/Disable LRO feature
- *
- * @SYSCTL_HANDLER_ARGS sysctl_oid structure with arguments
- *
- * Returns 0 or error number.
- */
-static int
-xge_change_lro_status(SYSCTL_HANDLER_ARGS)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)arg1;
- int request = lldev->enabled_lro, status = XGE_HAL_OK;
-
- status = sysctl_handle_int(oidp, &request, arg2, req);
- if((status != XGE_HAL_OK) || (!req->newptr))
- goto _exit;
-
- if((request < 0) || (request > 1)) {
- status = EINVAL;
- goto _exit;
- }
-
- /* Return if current and requested states are same */
- if(request == lldev->enabled_lro){
- xge_trace(XGE_ERR, "LRO is already %s",
- ((request) ? "enabled" : "disabled"));
- goto _exit;
- }
-
- lldev->enabled_lro = request;
- xge_confirm_changes(lldev, XGE_CHANGE_LRO);
- arg2 = lldev->enabled_lro;
-
-_exit:
- return status;
-}
-
-/**
- * xge_add_sysctl_handlers
- * Registers sysctl parameter value update handlers
- *
- * @lldev Per-adapter data
- */
-void
-xge_add_sysctl_handlers(xge_lldev_t *lldev)
-{
- struct sysctl_ctx_list *context_list =
- device_get_sysctl_ctx(lldev->device);
- struct sysctl_oid *oid = device_get_sysctl_tree(lldev->device);
-
- SYSCTL_ADD_PROC(context_list, SYSCTL_CHILDREN(oid), OID_AUTO,
- "enable_lro", CTLTYPE_INT | CTLFLAG_RW, lldev, 0,
- xge_change_lro_status, "I", "Enable or disable LRO feature");
-}
-
-/**
- * xge_attach
- * Connects driver to the system if probe was success
- *
- * @dev Device Handle
- */
-int
-xge_attach(device_t dev)
-{
- xge_hal_device_config_t *device_config;
- xge_hal_device_attr_t attr;
- xge_lldev_t *lldev;
- xge_hal_device_t *hldev;
- xge_pci_info_t *pci_info;
- struct ifnet *ifnetp;
- int rid, rid0, rid1, error;
- int msi_count = 0, status = XGE_HAL_OK;
- int enable_msi = XGE_HAL_INTR_MODE_IRQLINE;
-
- device_config = xge_os_malloc(NULL, sizeof(xge_hal_device_config_t));
- if(!device_config) {
- XGE_EXIT_ON_ERR("Memory allocation for device configuration failed",
- attach_out_config, ENOMEM);
- }
-
- lldev = (xge_lldev_t *) device_get_softc(dev);
- if(!lldev) {
- XGE_EXIT_ON_ERR("Adapter softc is NULL", attach_out, ENOMEM);
- }
- lldev->device = dev;
-
- xge_mutex_init(lldev);
-
- error = xge_driver_initialize();
- if(error != XGE_HAL_OK) {
- xge_resources_free(dev, xge_free_mutex);
- XGE_EXIT_ON_ERR("Initializing driver failed", attach_out, ENXIO);
- }
-
- /* HAL device */
- hldev =
- (xge_hal_device_t *)xge_os_malloc(NULL, sizeof(xge_hal_device_t));
- if(!hldev) {
- xge_resources_free(dev, xge_free_terminate_hal_driver);
- XGE_EXIT_ON_ERR("Memory allocation for HAL device failed",
- attach_out, ENOMEM);
- }
- lldev->devh = hldev;
-
- /* Our private structure */
- pci_info =
- (xge_pci_info_t*) xge_os_malloc(NULL, sizeof(xge_pci_info_t));
- if(!pci_info) {
- xge_resources_free(dev, xge_free_hal_device);
- XGE_EXIT_ON_ERR("Memory allocation for PCI info. failed",
- attach_out, ENOMEM);
- }
- lldev->pdev = pci_info;
- pci_info->device = dev;
-
- /* Set bus master */
- pci_enable_busmaster(dev);
-
- /* Get virtual address for BAR0 */
- rid0 = PCIR_BAR(0);
- pci_info->regmap0 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid0,
- RF_ACTIVE);
- if(pci_info->regmap0 == NULL) {
- xge_resources_free(dev, xge_free_pci_info);
- XGE_EXIT_ON_ERR("Bus resource allocation for BAR0 failed",
- attach_out, ENOMEM);
- }
- attr.bar0 = (char *)pci_info->regmap0;
-
- pci_info->bar0resource = (xge_bus_resource_t*)
- xge_os_malloc(NULL, sizeof(xge_bus_resource_t));
- if(pci_info->bar0resource == NULL) {
- xge_resources_free(dev, xge_free_bar0);
- XGE_EXIT_ON_ERR("Memory allocation for BAR0 Resources failed",
- attach_out, ENOMEM);
- }
- ((xge_bus_resource_t *)(pci_info->bar0resource))->bus_tag =
- rman_get_bustag(pci_info->regmap0);
- ((xge_bus_resource_t *)(pci_info->bar0resource))->bus_handle =
- rman_get_bushandle(pci_info->regmap0);
- ((xge_bus_resource_t *)(pci_info->bar0resource))->bar_start_addr =
- pci_info->regmap0;
-
- /* Get virtual address for BAR1 */
- rid1 = PCIR_BAR(2);
- pci_info->regmap1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid1,
- RF_ACTIVE);
- if(pci_info->regmap1 == NULL) {
- xge_resources_free(dev, xge_free_bar0_resource);
- XGE_EXIT_ON_ERR("Bus resource allocation for BAR1 failed",
- attach_out, ENOMEM);
- }
- attr.bar1 = (char *)pci_info->regmap1;
-
- pci_info->bar1resource = (xge_bus_resource_t*)
- xge_os_malloc(NULL, sizeof(xge_bus_resource_t));
- if(pci_info->bar1resource == NULL) {
- xge_resources_free(dev, xge_free_bar1);
- XGE_EXIT_ON_ERR("Memory allocation for BAR1 Resources failed",
- attach_out, ENOMEM);
- }
- ((xge_bus_resource_t *)(pci_info->bar1resource))->bus_tag =
- rman_get_bustag(pci_info->regmap1);
- ((xge_bus_resource_t *)(pci_info->bar1resource))->bus_handle =
- rman_get_bushandle(pci_info->regmap1);
- ((xge_bus_resource_t *)(pci_info->bar1resource))->bar_start_addr =
- pci_info->regmap1;
-
- /* Save PCI config space */
- xge_pci_space_save(dev);
-
- attr.regh0 = (xge_bus_resource_t *) pci_info->bar0resource;
- attr.regh1 = (xge_bus_resource_t *) pci_info->bar1resource;
- attr.irqh = lldev->irqhandle;
- attr.cfgh = pci_info;
- attr.pdev = pci_info;
-
- /* Initialize device configuration parameters */
- xge_init_params(device_config, dev);
-
- rid = 0;
- if(lldev->enabled_msi) {
- /* Number of MSI messages supported by device */
- msi_count = pci_msi_count(dev);
- if(msi_count > 1) {
- /* Device supports MSI */
- if(bootverbose) {
- xge_trace(XGE_ERR, "MSI count: %d", msi_count);
- xge_trace(XGE_ERR, "Now, driver supporting 1 message");
- }
- msi_count = 1;
- error = pci_alloc_msi(dev, &msi_count);
- if(error == 0) {
- if(bootverbose)
- xge_trace(XGE_ERR, "Allocated messages: %d", msi_count);
- enable_msi = XGE_HAL_INTR_MODE_MSI;
- rid = 1;
- }
- else {
- if(bootverbose)
- xge_trace(XGE_ERR, "pci_alloc_msi failed, %d", error);
- }
- }
- }
- lldev->enabled_msi = enable_msi;
-
- /* Allocate resource for irq */
- lldev->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
- (RF_SHAREABLE | RF_ACTIVE));
- if(lldev->irq == NULL) {
- xge_trace(XGE_ERR, "Allocating irq resource for %s failed",
- ((rid == 0) ? "line interrupt" : "MSI"));
- if(rid == 1) {
- error = pci_release_msi(dev);
- if(error != 0) {
- xge_trace(XGE_ERR, "Releasing MSI resources failed %d",
- error);
- xge_trace(XGE_ERR, "Requires reboot to use MSI again");
- }
- xge_trace(XGE_ERR, "Trying line interrupts");
- rid = 0;
- lldev->enabled_msi = XGE_HAL_INTR_MODE_IRQLINE;
- lldev->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
- (RF_SHAREABLE | RF_ACTIVE));
- }
- if(lldev->irq == NULL) {
- xge_trace(XGE_ERR, "Allocating irq resource failed");
- xge_resources_free(dev, xge_free_bar1_resource);
- status = ENOMEM;
- goto attach_out;
- }
- }
-
- device_config->intr_mode = lldev->enabled_msi;
- if(bootverbose) {
- xge_trace(XGE_TRACE, "rid: %d, Mode: %d, MSI count: %d", rid,
- lldev->enabled_msi, msi_count);
- }
-
- /* Initialize HAL device */
- error = xge_hal_device_initialize(hldev, &attr, device_config);
- if(error != XGE_HAL_OK) {
- xge_resources_free(dev, xge_free_irq_resource);
- XGE_EXIT_ON_ERR("Initializing HAL device failed", attach_out,
- ENXIO);
- }
-
- xge_hal_device_private_set(hldev, lldev);
-
- error = xge_interface_setup(dev);
- if(error != 0) {
- status = error;
- goto attach_out;
- }
-
- ifnetp = lldev->ifnetp;
- ifnetp->if_mtu = device_config->mtu;
-
- xge_media_init(dev);
-
- /* Associate interrupt handler with the device */
- if(lldev->enabled_msi == XGE_HAL_INTR_MODE_MSI) {
- error = bus_setup_intr(dev, lldev->irq,
- (INTR_TYPE_NET | INTR_MPSAFE),
-#if __FreeBSD_version > 700030
- NULL,
-#endif
- xge_isr_msi, lldev, &lldev->irqhandle);
- xge_msi_info_save(lldev);
- }
- else {
- error = bus_setup_intr(dev, lldev->irq,
- (INTR_TYPE_NET | INTR_MPSAFE),
-#if __FreeBSD_version > 700030
- xge_isr_filter,
-#endif
- xge_isr_line, lldev, &lldev->irqhandle);
- }
- if(error != 0) {
- xge_resources_free(dev, xge_free_media_interface);
- XGE_EXIT_ON_ERR("Associating interrupt handler with device failed",
- attach_out, ENXIO);
- }
-
- xge_print_info(lldev);
-
- xge_add_sysctl_handlers(lldev);
-
- xge_buffer_mode_init(lldev, device_config->mtu);
-
-attach_out:
- xge_os_free(NULL, device_config, sizeof(xge_hal_device_config_t));
-attach_out_config:
- gone_in_dev(dev, 12, "nxge(4) driver");
- return status;
-}
-
-/**
- * xge_resources_free
- * Undo what-all we did during load/attach
- *
- * @dev Device Handle
- * @error Identifies what-all to undo
- */
-void
-xge_resources_free(device_t dev, xge_lables_e error)
-{
- xge_lldev_t *lldev;
- xge_pci_info_t *pci_info;
- xge_hal_device_t *hldev;
- int rid, status;
-
- /* LL Device */
- lldev = (xge_lldev_t *) device_get_softc(dev);
- pci_info = lldev->pdev;
-
- /* HAL Device */
- hldev = lldev->devh;
-
- switch(error) {
- case xge_free_all:
- /* Teardown interrupt handler - device association */
- bus_teardown_intr(dev, lldev->irq, lldev->irqhandle);
-
- case xge_free_media_interface:
- /* Media */
- ifmedia_removeall(&lldev->media);
-
- /* Detach Ether */
- ether_ifdetach(lldev->ifnetp);
- if_free(lldev->ifnetp);
-
- xge_hal_device_private_set(hldev, NULL);
- xge_hal_device_disable(hldev);
-
- case xge_free_terminate_hal_device:
- /* HAL Device */
- xge_hal_device_terminate(hldev);
-
- case xge_free_irq_resource:
- /* Release IRQ resource */
- bus_release_resource(dev, SYS_RES_IRQ,
- ((lldev->enabled_msi == XGE_HAL_INTR_MODE_IRQLINE) ? 0:1),
- lldev->irq);
-
- if(lldev->enabled_msi == XGE_HAL_INTR_MODE_MSI) {
- status = pci_release_msi(dev);
- if(status != 0) {
- if(bootverbose) {
- xge_trace(XGE_ERR,
- "pci_release_msi returned %d", status);
- }
- }
- }
-
- case xge_free_bar1_resource:
- /* Restore PCI configuration space */
- xge_pci_space_restore(dev);
-
- /* Free bar1resource */
- xge_os_free(NULL, pci_info->bar1resource,
- sizeof(xge_bus_resource_t));
-
- case xge_free_bar1:
- /* Release BAR1 */
- rid = PCIR_BAR(2);
- bus_release_resource(dev, SYS_RES_MEMORY, rid,
- pci_info->regmap1);
-
- case xge_free_bar0_resource:
- /* Free bar0resource */
- xge_os_free(NULL, pci_info->bar0resource,
- sizeof(xge_bus_resource_t));
-
- case xge_free_bar0:
- /* Release BAR0 */
- rid = PCIR_BAR(0);
- bus_release_resource(dev, SYS_RES_MEMORY, rid,
- pci_info->regmap0);
-
- case xge_free_pci_info:
- /* Disable Bus Master */
- pci_disable_busmaster(dev);
-
- /* Free pci_info_t */
- lldev->pdev = NULL;
- xge_os_free(NULL, pci_info, sizeof(xge_pci_info_t));
-
- case xge_free_hal_device:
- /* Free device configuration struct and HAL device */
- xge_os_free(NULL, hldev, sizeof(xge_hal_device_t));
-
- case xge_free_terminate_hal_driver:
- /* Terminate HAL driver */
- hal_driver_init_count = hal_driver_init_count - 1;
- if(!hal_driver_init_count) {
- xge_hal_driver_terminate();
- }
-
- case xge_free_mutex:
- xge_mutex_destroy(lldev);
- }
-}
-
-/**
- * xge_detach
- * Detaches driver from the Kernel subsystem
- *
- * @dev Device Handle
- */
-int
-xge_detach(device_t dev)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)device_get_softc(dev);
-
- if(lldev->in_detach == 0) {
- lldev->in_detach = 1;
- xge_stop(lldev);
- xge_resources_free(dev, xge_free_all);
- }
-
- return 0;
-}
-
-/**
- * xge_shutdown
- * To shutdown device before system shutdown
- *
- * @dev Device Handle
- */
-int
-xge_shutdown(device_t dev)
-{
- xge_lldev_t *lldev = (xge_lldev_t *) device_get_softc(dev);
- xge_stop(lldev);
-
- return 0;
-}
-
-/**
- * xge_interface_setup
- * Setup interface
- *
- * @dev Device Handle
- *
- * Returns 0 on success, ENXIO/ENOMEM on failure
- */
-int
-xge_interface_setup(device_t dev)
-{
- u8 mcaddr[ETHER_ADDR_LEN];
- xge_hal_status_e status;
- xge_lldev_t *lldev = (xge_lldev_t *)device_get_softc(dev);
- struct ifnet *ifnetp;
- xge_hal_device_t *hldev = lldev->devh;
-
- /* Get the MAC address of the device */
- status = xge_hal_device_macaddr_get(hldev, 0, &mcaddr);
- if(status != XGE_HAL_OK) {
- xge_resources_free(dev, xge_free_terminate_hal_device);
- XGE_EXIT_ON_ERR("Getting MAC address failed", ifsetup_out, ENXIO);
- }
-
- /* Get interface ifnet structure for this Ether device */
- ifnetp = lldev->ifnetp = if_alloc(IFT_ETHER);
- if(ifnetp == NULL) {
- xge_resources_free(dev, xge_free_terminate_hal_device);
- XGE_EXIT_ON_ERR("Allocation ifnet failed", ifsetup_out, ENOMEM);
- }
-
- /* Initialize interface ifnet structure */
- if_initname(ifnetp, device_get_name(dev), device_get_unit(dev));
- ifnetp->if_mtu = XGE_HAL_DEFAULT_MTU;
- ifnetp->if_baudrate = XGE_BAUDRATE;
- ifnetp->if_init = xge_init;
- ifnetp->if_softc = lldev;
- ifnetp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
- ifnetp->if_ioctl = xge_ioctl;
- ifnetp->if_start = xge_send;
-
- /* TODO: Check and assign optimal value */
- ifnetp->if_snd.ifq_maxlen = ifqmaxlen;
-
- ifnetp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU |
- IFCAP_HWCSUM;
- if(lldev->enabled_tso)
- ifnetp->if_capabilities |= IFCAP_TSO4;
- if(lldev->enabled_lro)
- ifnetp->if_capabilities |= IFCAP_LRO;
-
- ifnetp->if_capenable = ifnetp->if_capabilities;
-
- /* Attach the interface */
- ether_ifattach(ifnetp, mcaddr);
-
-ifsetup_out:
- return status;
-}
-
-/**
- * xge_callback_link_up
- * Callback for Link-up indication from HAL
- *
- * @userdata Per-adapter data
- */
-void
-xge_callback_link_up(void *userdata)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)userdata;
- struct ifnet *ifnetp = lldev->ifnetp;
-
- ifnetp->if_flags &= ~IFF_DRV_OACTIVE;
- if_link_state_change(ifnetp, LINK_STATE_UP);
-}
-
-/**
- * xge_callback_link_down
- * Callback for Link-down indication from HAL
- *
- * @userdata Per-adapter data
- */
-void
-xge_callback_link_down(void *userdata)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)userdata;
- struct ifnet *ifnetp = lldev->ifnetp;
-
- ifnetp->if_flags |= IFF_DRV_OACTIVE;
- if_link_state_change(ifnetp, LINK_STATE_DOWN);
-}
-
-/**
- * xge_callback_crit_err
- * Callback for Critical error indication from HAL
- *
- * @userdata Per-adapter data
- * @type Event type (Enumerated hardware error)
- * @serr_data Hardware status
- */
-void
-xge_callback_crit_err(void *userdata, xge_hal_event_e type, u64 serr_data)
-{
- xge_trace(XGE_ERR, "Critical Error");
- xge_reset(userdata);
-}
-
-/**
- * xge_callback_event
- * Callback from HAL indicating that some event has been queued
- *
- * @item Queued event item
- */
-void
-xge_callback_event(xge_queue_item_t *item)
-{
- xge_lldev_t *lldev = NULL;
- xge_hal_device_t *hldev = NULL;
- struct ifnet *ifnetp = NULL;
-
- hldev = item->context;
- lldev = xge_hal_device_private(hldev);
- ifnetp = lldev->ifnetp;
-
- switch((int)item->event_type) {
- case XGE_LL_EVENT_TRY_XMIT_AGAIN:
- if(lldev->initialized) {
- if(xge_hal_channel_dtr_count(lldev->fifo_channel[0]) > 0) {
- ifnetp->if_flags &= ~IFF_DRV_OACTIVE;
- }
- else {
- xge_queue_produce_context(
- xge_hal_device_queue(lldev->devh),
- XGE_LL_EVENT_TRY_XMIT_AGAIN, lldev->devh);
- }
- }
- break;
-
- case XGE_LL_EVENT_DEVICE_RESETTING:
- xge_reset(item->context);
- break;
-
- default:
- break;
- }
-}
-
-/**
- * xge_ifmedia_change
- * Media change driver callback
- *
- * @ifnetp Interface Handle
- *
- * Returns 0 if media is Ether else EINVAL
- */
-int
-xge_ifmedia_change(struct ifnet *ifnetp)
-{
- xge_lldev_t *lldev = ifnetp->if_softc;
- struct ifmedia *ifmediap = &lldev->media;
-
- return (IFM_TYPE(ifmediap->ifm_media) != IFM_ETHER) ? EINVAL:0;
-}
-
-/**
- * xge_ifmedia_status
- * Media status driver callback
- *
- * @ifnetp Interface Handle
- * @ifmr Interface Media Settings
- */
-void
-xge_ifmedia_status(struct ifnet *ifnetp, struct ifmediareq *ifmr)
-{
- xge_hal_status_e status;
- u64 regvalue;
- xge_lldev_t *lldev = ifnetp->if_softc;
- xge_hal_device_t *hldev = lldev->devh;
-
- ifmr->ifm_status = IFM_AVALID;
- ifmr->ifm_active = IFM_ETHER;
-
- status = xge_hal_mgmt_reg_read(hldev, 0,
- xge_offsetof(xge_hal_pci_bar0_t, adapter_status), &regvalue);
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_TRACE, "Getting adapter status failed");
- goto _exit;
- }
-
- if((regvalue & (XGE_HAL_ADAPTER_STATUS_RMAC_REMOTE_FAULT |
- XGE_HAL_ADAPTER_STATUS_RMAC_LOCAL_FAULT)) == 0) {
- ifmr->ifm_status |= IFM_ACTIVE;
- ifmr->ifm_active |= IFM_10G_SR | IFM_FDX;
- if_link_state_change(ifnetp, LINK_STATE_UP);
- }
- else {
- if_link_state_change(ifnetp, LINK_STATE_DOWN);
- }
-_exit:
- return;
-}
-
-/**
- * xge_ioctl_stats
- * IOCTL to get statistics
- *
- * @lldev Per-adapter data
- * @ifreqp Interface request
- */
-int
-xge_ioctl_stats(xge_lldev_t *lldev, struct ifreq *ifreqp)
-{
- xge_hal_status_e status = XGE_HAL_OK;
- char cmd, mode;
- void *info = NULL;
- int retValue;
-
- cmd = retValue = fubyte(ifr_data_get_ptr(ifreqp));
- if (retValue == -1)
- return (EFAULT);
-
- retValue = EINVAL;
- switch(cmd) {
- case XGE_QUERY_STATS:
- mtx_lock(&lldev->mtx_drv);
- status = xge_hal_stats_hw(lldev->devh,
- (xge_hal_stats_hw_info_t **)&info);
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_stats_hw_info_t)) == 0)
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR, "Getting statistics failed (Status: %d)",
- status);
- }
- break;
-
- case XGE_QUERY_PCICONF:
- info = xge_os_malloc(NULL, sizeof(xge_hal_pci_config_t));
- if(info != NULL) {
- mtx_lock(&lldev->mtx_drv);
- status = xge_hal_mgmt_pci_config(lldev->devh, info,
- sizeof(xge_hal_pci_config_t));
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_pci_config_t)) == 0)
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR,
- "Getting PCI configuration failed (%d)", status);
- }
- xge_os_free(NULL, info, sizeof(xge_hal_pci_config_t));
- }
- break;
-
- case XGE_QUERY_DEVSTATS:
- info = xge_os_malloc(NULL, sizeof(xge_hal_stats_device_info_t));
- if(info != NULL) {
- mtx_lock(&lldev->mtx_drv);
- status =xge_hal_mgmt_device_stats(lldev->devh, info,
- sizeof(xge_hal_stats_device_info_t));
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_stats_device_info_t)) == 0)
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR, "Getting device info failed (%d)",
- status);
- }
- xge_os_free(NULL, info,
- sizeof(xge_hal_stats_device_info_t));
- }
- break;
-
- case XGE_QUERY_SWSTATS:
- info = xge_os_malloc(NULL, sizeof(xge_hal_stats_sw_err_t));
- if(info != NULL) {
- mtx_lock(&lldev->mtx_drv);
- status =xge_hal_mgmt_sw_stats(lldev->devh, info,
- sizeof(xge_hal_stats_sw_err_t));
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_stats_sw_err_t)) == 0)
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR,
- "Getting tcode statistics failed (%d)", status);
- }
- xge_os_free(NULL, info, sizeof(xge_hal_stats_sw_err_t));
- }
- break;
-
- case XGE_QUERY_DRIVERSTATS:
- if(copyout(&lldev->driver_stats, ifr_data_get_ptr(ifreqp),
- sizeof(xge_driver_stats_t)) == 0) {
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR,
- "Copyout of driver statistics failed (%d)", status);
- }
- break;
-
- case XGE_READ_VERSION:
- info = xge_os_malloc(NULL, XGE_BUFFER_SIZE);
- if(info != NULL) {
- strcpy(info, XGE_DRIVER_VERSION);
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- XGE_BUFFER_SIZE) == 0)
- retValue = 0;
- xge_os_free(NULL, info, XGE_BUFFER_SIZE);
- }
- break;
-
- case XGE_QUERY_DEVCONF:
- info = xge_os_malloc(NULL, sizeof(xge_hal_device_config_t));
- if(info != NULL) {
- mtx_lock(&lldev->mtx_drv);
- status = xge_hal_mgmt_device_config(lldev->devh, info,
- sizeof(xge_hal_device_config_t));
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(info, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_device_config_t)) == 0)
- retValue = 0;
- }
- else {
- xge_trace(XGE_ERR, "Getting devconfig failed (%d)",
- status);
- }
- xge_os_free(NULL, info, sizeof(xge_hal_device_config_t));
- }
- break;
-
- case XGE_QUERY_BUFFER_MODE:
- if(copyout(&lldev->buffer_mode, ifr_data_get_ptr(ifreqp),
- sizeof(int)) == 0)
- retValue = 0;
- break;
-
- case XGE_SET_BUFFER_MODE_1:
- case XGE_SET_BUFFER_MODE_2:
- case XGE_SET_BUFFER_MODE_5:
- mode = (cmd == XGE_SET_BUFFER_MODE_1) ? 'Y':'N';
- if(copyout(&mode, ifr_data_get_ptr(ifreqp), sizeof(mode)) == 0)
- retValue = 0;
- break;
- default:
- xge_trace(XGE_TRACE, "Nothing is matching");
- retValue = ENOTTY;
- break;
- }
- return retValue;
-}
-
-/**
- * xge_ioctl_registers
- * IOCTL to get registers
- *
- * @lldev Per-adapter data
- * @ifreqp Interface request
- */
-int
-xge_ioctl_registers(xge_lldev_t *lldev, struct ifreq *ifreqp)
-{
- xge_register_t tmpdata;
- xge_register_t *data;
- xge_hal_status_e status = XGE_HAL_OK;
- int retValue = EINVAL, offset = 0, index = 0;
- int error;
- u64 val64 = 0;
-
- error = copyin(ifr_data_get_ptr(ifreqp), &tmpdata, sizeof(tmpdata));
- if (error != 0)
- return (error);
- data = &tmpdata;
-
- /* Reading a register */
- if(strcmp(data->option, "-r") == 0) {
- data->value = 0x0000;
- mtx_lock(&lldev->mtx_drv);
- status = xge_hal_mgmt_reg_read(lldev->devh, 0, data->offset,
- &data->value);
- mtx_unlock(&lldev->mtx_drv);
- if(status == XGE_HAL_OK) {
- if(copyout(data, ifr_data_get_ptr(ifreqp),
- sizeof(xge_register_t)) == 0)
- retValue = 0;
- }
- }
- /* Writing to a register */
- else if(strcmp(data->option, "-w") == 0) {
- mtx_lock(&lldev->mtx_drv);
- status = xge_hal_mgmt_reg_write(lldev->devh, 0, data->offset,
- data->value);
- if(status == XGE_HAL_OK) {
- val64 = 0x0000;
- status = xge_hal_mgmt_reg_read(lldev->devh, 0, data->offset,
- &val64);
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "Reading back updated register failed");
- }
- else {
- if(val64 != data->value) {
- xge_trace(XGE_ERR,
- "Read and written register values mismatched");
- }
- else retValue = 0;
- }
- }
- else {
- xge_trace(XGE_ERR, "Getting register value failed");
- }
- mtx_unlock(&lldev->mtx_drv);
- }
- else {
- mtx_lock(&lldev->mtx_drv);
- for(index = 0, offset = 0; offset <= XGE_OFFSET_OF_LAST_REG;
- index++, offset += 0x0008) {
- val64 = 0;
- status = xge_hal_mgmt_reg_read(lldev->devh, 0, offset, &val64);
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "Getting register value failed");
- break;
- }
- *((u64 *)((u64 *)data + index)) = val64;
- retValue = 0;
- }
- mtx_unlock(&lldev->mtx_drv);
-
- if(retValue == 0) {
- if(copyout(data, ifr_data_get_ptr(ifreqp),
- sizeof(xge_hal_pci_bar0_t)) != 0) {
- xge_trace(XGE_ERR, "Copyout of register values failed");
- retValue = EINVAL;
- }
- }
- else {
- xge_trace(XGE_ERR, "Getting register values failed");
- }
- }
- return retValue;
-}
-
-/**
- * xge_ioctl
- * Callback to control the device - Interface configuration
- *
- * @ifnetp Interface Handle
- * @command Device control command
- * @data Parameters associated with command (if any)
- */
-int
-xge_ioctl(struct ifnet *ifnetp, unsigned long command, caddr_t data)
-{
- struct ifreq *ifreqp = (struct ifreq *)data;
- xge_lldev_t *lldev = ifnetp->if_softc;
- struct ifmedia *ifmediap = &lldev->media;
- int retValue = 0, mask = 0;
-
- if(lldev->in_detach) {
- return retValue;
- }
-
- switch(command) {
- /* Set ifnet MTU */
- case SIOCSIFMTU:
- retValue = xge_change_mtu(lldev, ifreqp->ifr_mtu);
- break;
-
- /* Set ifnet flags */
- case SIOCSIFFLAGS:
- if(ifnetp->if_flags & IFF_UP) {
- /* Link status is UP */
- if(!(ifnetp->if_drv_flags & IFF_DRV_RUNNING)) {
- xge_init(lldev);
- }
- xge_disable_promisc(lldev);
- xge_enable_promisc(lldev);
- }
- else {
- /* Link status is DOWN */
- /* If device is in running, make it down */
- if(ifnetp->if_drv_flags & IFF_DRV_RUNNING) {
- xge_stop(lldev);
- }
- }
- break;
-
- /* Add/delete multicast address */
- case SIOCADDMULTI:
- case SIOCDELMULTI:
- if(ifnetp->if_drv_flags & IFF_DRV_RUNNING) {
- xge_setmulti(lldev);
- }
- break;
-
- /* Set/Get net media */
- case SIOCSIFMEDIA:
- case SIOCGIFMEDIA:
- retValue = ifmedia_ioctl(ifnetp, ifreqp, ifmediap, command);
- break;
-
- /* Set capabilities */
- case SIOCSIFCAP:
- mtx_lock(&lldev->mtx_drv);
- mask = ifreqp->ifr_reqcap ^ ifnetp->if_capenable;
- if(mask & IFCAP_TXCSUM) {
- if(ifnetp->if_capenable & IFCAP_TXCSUM) {
- ifnetp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TXCSUM);
- ifnetp->if_hwassist &=
- ~(CSUM_TCP | CSUM_UDP | CSUM_TSO);
- }
- else {
- ifnetp->if_capenable |= IFCAP_TXCSUM;
- ifnetp->if_hwassist |= (CSUM_TCP | CSUM_UDP);
- }
- }
- if(mask & IFCAP_TSO4) {
- if(ifnetp->if_capenable & IFCAP_TSO4) {
- ifnetp->if_capenable &= ~IFCAP_TSO4;
- ifnetp->if_hwassist &= ~CSUM_TSO;
-
- xge_os_printf("%s: TSO Disabled",
- device_get_nameunit(lldev->device));
- }
- else if(ifnetp->if_capenable & IFCAP_TXCSUM) {
- ifnetp->if_capenable |= IFCAP_TSO4;
- ifnetp->if_hwassist |= CSUM_TSO;
-
- xge_os_printf("%s: TSO Enabled",
- device_get_nameunit(lldev->device));
- }
- }
-
- mtx_unlock(&lldev->mtx_drv);
- break;
-
- /* Custom IOCTL 0 */
- case SIOCGPRIVATE_0:
- retValue = xge_ioctl_stats(lldev, ifreqp);
- break;
-
- /* Custom IOCTL 1 */
- case SIOCGPRIVATE_1:
- retValue = xge_ioctl_registers(lldev, ifreqp);
- break;
-
- default:
- retValue = ether_ioctl(ifnetp, command, data);
- break;
- }
- return retValue;
-}
-
-/**
- * xge_init
- * Initialize the interface
- *
- * @plldev Per-adapter Data
- */
-void
-xge_init(void *plldev)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)plldev;
-
- mtx_lock(&lldev->mtx_drv);
- xge_os_memzero(&lldev->driver_stats, sizeof(xge_driver_stats_t));
- xge_device_init(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
- mtx_unlock(&lldev->mtx_drv);
-}
-
-/**
- * xge_device_init
- * Initialize the interface (called by holding lock)
- *
- * @pdevin Per-adapter Data
- */
-void
-xge_device_init(xge_lldev_t *lldev, xge_hal_channel_reopen_e option)
-{
- struct ifnet *ifnetp = lldev->ifnetp;
- xge_hal_device_t *hldev = lldev->devh;
- struct ifaddr *ifaddrp;
- unsigned char *macaddr;
- struct sockaddr_dl *sockaddrp;
- int status = XGE_HAL_OK;
-
- mtx_assert((&lldev->mtx_drv), MA_OWNED);
-
- /* If device is in running state, initializing is not required */
- if(ifnetp->if_drv_flags & IFF_DRV_RUNNING)
- return;
-
- /* Initializing timer */
- callout_init(&lldev->timer, 1);
-
- xge_trace(XGE_TRACE, "Set MTU size");
- status = xge_hal_device_mtu_set(hldev, ifnetp->if_mtu);
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "Setting MTU in HAL device failed");
- goto _exit;
- }
-
- /* Enable HAL device */
- xge_hal_device_enable(hldev);
-
- /* Get MAC address and update in HAL */
- ifaddrp = ifnetp->if_addr;
- sockaddrp = (struct sockaddr_dl *)ifaddrp->ifa_addr;
- sockaddrp->sdl_type = IFT_ETHER;
- sockaddrp->sdl_alen = ifnetp->if_addrlen;
- macaddr = LLADDR(sockaddrp);
- xge_trace(XGE_TRACE,
- "Setting MAC address: %02x:%02x:%02x:%02x:%02x:%02x\n",
- *macaddr, *(macaddr + 1), *(macaddr + 2), *(macaddr + 3),
- *(macaddr + 4), *(macaddr + 5));
- status = xge_hal_device_macaddr_set(hldev, 0, macaddr);
- if(status != XGE_HAL_OK)
- xge_trace(XGE_ERR, "Setting MAC address failed (%d)", status);
-
- /* Opening channels */
- mtx_unlock(&lldev->mtx_drv);
- status = xge_channel_open(lldev, option);
- mtx_lock(&lldev->mtx_drv);
- if(status != XGE_HAL_OK)
- goto _exit;
-
- /* Set appropriate flags */
- ifnetp->if_drv_flags |= IFF_DRV_RUNNING;
- ifnetp->if_flags &= ~IFF_DRV_OACTIVE;
-
- /* Checksum capability */
- ifnetp->if_hwassist = (ifnetp->if_capenable & IFCAP_TXCSUM) ?
- (CSUM_TCP | CSUM_UDP) : 0;
-
- if((lldev->enabled_tso) && (ifnetp->if_capenable & IFCAP_TSO4))
- ifnetp->if_hwassist |= CSUM_TSO;
-
- /* Enable interrupts */
- xge_hal_device_intr_enable(hldev);
-
- callout_reset(&lldev->timer, 10*hz, xge_timer, lldev);
-
- /* Disable promiscuous mode */
- xge_trace(XGE_TRACE, "If opted, enable promiscuous mode");
- xge_enable_promisc(lldev);
-
- /* Device is initialized */
- lldev->initialized = 1;
- xge_os_mdelay(1000);
-
-_exit:
- return;
-}
-
-/**
- * xge_timer
- * Timer timeout function to handle link status
- *
- * @devp Per-adapter Data
- */
-void
-xge_timer(void *devp)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)devp;
- xge_hal_device_t *hldev = lldev->devh;
-
- /* Poll for changes */
- xge_hal_device_poll(hldev);
-
- /* Reset timer */
- callout_reset(&lldev->timer, hz, xge_timer, lldev);
-
- return;
-}
-
-/**
- * xge_stop
- * De-activate the interface
- *
- * @lldev Per-adater Data
- */
-void
-xge_stop(xge_lldev_t *lldev)
-{
- mtx_lock(&lldev->mtx_drv);
- xge_device_stop(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
- mtx_unlock(&lldev->mtx_drv);
-}
-
-/**
- * xge_isr_filter
- * ISR filter function - to filter interrupts from other devices (shared)
- *
- * @handle Per-adapter Data
- *
- * Returns
- * FILTER_STRAY if interrupt is from other device
- * FILTER_SCHEDULE_THREAD if interrupt is from Xframe device
- */
-int
-xge_isr_filter(void *handle)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)handle;
- xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)((lldev->devh)->bar0);
- u16 retValue = FILTER_STRAY;
- u64 val64 = 0;
-
- XGE_DRV_STATS(isr_filter);
-
- val64 = xge_os_pio_mem_read64(lldev->pdev, (lldev->devh)->regh0,
- &bar0->general_int_status);
- retValue = (!val64) ? FILTER_STRAY : FILTER_SCHEDULE_THREAD;
-
- return retValue;
-}
-
-/**
- * xge_isr_line
- * Interrupt service routine for Line interrupts
- *
- * @plldev Per-adapter Data
- */
-void
-xge_isr_line(void *plldev)
-{
- xge_hal_status_e status;
- xge_lldev_t *lldev = (xge_lldev_t *)plldev;
- xge_hal_device_t *hldev = (xge_hal_device_t *)lldev->devh;
- struct ifnet *ifnetp = lldev->ifnetp;
-
- XGE_DRV_STATS(isr_line);
-
- if(ifnetp->if_drv_flags & IFF_DRV_RUNNING) {
- status = xge_hal_device_handle_irq(hldev);
- if(!(IFQ_DRV_IS_EMPTY(&ifnetp->if_snd)))
- xge_send(ifnetp);
- }
-}
-
-/*
- * xge_isr_msi
- * ISR for Message signaled interrupts
- */
-void
-xge_isr_msi(void *plldev)
-{
- xge_lldev_t *lldev = (xge_lldev_t *)plldev;
- XGE_DRV_STATS(isr_msi);
- xge_hal_device_continue_irq(lldev->devh);
-}
-
-/**
- * xge_rx_open
- * Initiate and open all Rx channels
- *
- * @qid Ring Index
- * @lldev Per-adapter Data
- * @rflag Channel open/close/reopen flag
- *
- * Returns 0 or Error Number
- */
-int
-xge_rx_open(int qid, xge_lldev_t *lldev, xge_hal_channel_reopen_e rflag)
-{
- u64 adapter_status = 0x0;
- xge_hal_status_e status = XGE_HAL_FAIL;
-
- xge_hal_channel_attr_t attr = {
- .post_qid = qid,
- .compl_qid = 0,
- .callback = xge_rx_compl,
- .per_dtr_space = sizeof(xge_rx_priv_t),
- .flags = 0,
- .type = XGE_HAL_CHANNEL_TYPE_RING,
- .userdata = lldev,
- .dtr_init = xge_rx_initial_replenish,
- .dtr_term = xge_rx_term
- };
-
- /* If device is not ready, return */
- status = xge_hal_device_status(lldev->devh, &adapter_status);
- if(status != XGE_HAL_OK) {
- xge_os_printf("Adapter Status: 0x%llx", (long long) adapter_status);
- XGE_EXIT_ON_ERR("Device is not ready", _exit, XGE_HAL_FAIL);
- }
- else {
- status = xge_hal_channel_open(lldev->devh, &attr,
- &lldev->ring_channel[qid], rflag);
- }
-
-_exit:
- return status;
-}
-
-/**
- * xge_tx_open
- * Initialize and open all Tx channels
- *
- * @lldev Per-adapter Data
- * @tflag Channel open/close/reopen flag
- *
- * Returns 0 or Error Number
- */
-int
-xge_tx_open(xge_lldev_t *lldev, xge_hal_channel_reopen_e tflag)
-{
- xge_hal_status_e status = XGE_HAL_FAIL;
- u64 adapter_status = 0x0;
- int qindex, index;
-
- xge_hal_channel_attr_t attr = {
- .compl_qid = 0,
- .callback = xge_tx_compl,
- .per_dtr_space = sizeof(xge_tx_priv_t),
- .flags = 0,
- .type = XGE_HAL_CHANNEL_TYPE_FIFO,
- .userdata = lldev,
- .dtr_init = xge_tx_initial_replenish,
- .dtr_term = xge_tx_term
- };
-
- /* If device is not ready, return */
- status = xge_hal_device_status(lldev->devh, &adapter_status);
- if(status != XGE_HAL_OK) {
- xge_os_printf("Adapter Status: 0x%llx", (long long) adapter_status);
- XGE_EXIT_ON_ERR("Device is not ready", _exit, XGE_HAL_FAIL);
- }
-
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++) {
- attr.post_qid = qindex,
- status = xge_hal_channel_open(lldev->devh, &attr,
- &lldev->fifo_channel[qindex], tflag);
- if(status != XGE_HAL_OK) {
- for(index = 0; index < qindex; index++)
- xge_hal_channel_close(lldev->fifo_channel[index], tflag);
- }
- }
-
-_exit:
- return status;
-}
-
-/**
- * xge_enable_msi
- * Enables MSI
- *
- * @lldev Per-adapter Data
- */
-void
-xge_enable_msi(xge_lldev_t *lldev)
-{
- xge_list_t *item = NULL;
- xge_hal_device_t *hldev = lldev->devh;
- xge_hal_channel_t *channel = NULL;
- u16 offset = 0, val16 = 0;
-
- xge_os_pci_read16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_control), &val16);
-
- /* Update msi_data */
- offset = (val16 & 0x80) ? 0x4c : 0x48;
- xge_os_pci_read16(lldev->pdev, NULL, offset, &val16);
- if(val16 & 0x1)
- val16 &= 0xfffe;
- else
- val16 |= 0x1;
- xge_os_pci_write16(lldev->pdev, NULL, offset, val16);
-
- /* Update msi_control */
- xge_os_pci_read16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_control), &val16);
- val16 |= 0x10;
- xge_os_pci_write16(lldev->pdev, NULL,
- xge_offsetof(xge_hal_pci_config_le_t, msi_control), val16);
-
- /* Set TxMAT and RxMAT registers with MSI */
- xge_list_for_each(item, &hldev->free_channels) {
- channel = xge_container_of(item, xge_hal_channel_t, item);
- xge_hal_channel_msi_set(channel, 1, (u32)val16);
- }
-}
-
-/**
- * xge_channel_open
- * Open both Tx and Rx channels
- *
- * @lldev Per-adapter Data
- * @option Channel reopen option
- */
-int
-xge_channel_open(xge_lldev_t *lldev, xge_hal_channel_reopen_e option)
-{
- xge_lro_entry_t *lro_session = NULL;
- xge_hal_status_e status = XGE_HAL_OK;
- int index = 0, index2 = 0;
-
- if(lldev->enabled_msi == XGE_HAL_INTR_MODE_MSI) {
- xge_msi_info_restore(lldev);
- xge_enable_msi(lldev);
- }
-
-_exit2:
- status = xge_create_dma_tags(lldev->device);
- if(status != XGE_HAL_OK)
- XGE_EXIT_ON_ERR("DMA tag creation failed", _exit, status);
-
- /* Open ring (Rx) channel */
- for(index = 0; index < XGE_RING_COUNT; index++) {
- status = xge_rx_open(index, lldev, option);
- if(status != XGE_HAL_OK) {
- /*
- * DMA mapping fails in the unpatched Kernel which can't
- * allocate contiguous memory for Jumbo frames.
- * Try using 5 buffer mode.
- */
- if((lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1) &&
- (((lldev->ifnetp)->if_mtu + XGE_HAL_MAC_HEADER_MAX_SIZE) >
- MJUMPAGESIZE)) {
- /* Close so far opened channels */
- for(index2 = 0; index2 < index; index2++) {
- xge_hal_channel_close(lldev->ring_channel[index2],
- option);
- }
-
- /* Destroy DMA tags intended to use for 1 buffer mode */
- if(bus_dmamap_destroy(lldev->dma_tag_rx,
- lldev->extra_dma_map)) {
- xge_trace(XGE_ERR, "Rx extra DMA map destroy failed");
- }
- if(bus_dma_tag_destroy(lldev->dma_tag_rx))
- xge_trace(XGE_ERR, "Rx DMA tag destroy failed");
- if(bus_dma_tag_destroy(lldev->dma_tag_tx))
- xge_trace(XGE_ERR, "Tx DMA tag destroy failed");
-
- /* Switch to 5 buffer mode */
- lldev->buffer_mode = XGE_HAL_RING_QUEUE_BUFFER_MODE_5;
- xge_buffer_mode_init(lldev, (lldev->ifnetp)->if_mtu);
-
- /* Restart init */
- goto _exit2;
- }
- else {
- XGE_EXIT_ON_ERR("Opening Rx channel failed", _exit1,
- status);
- }
- }
- }
-
- if(lldev->enabled_lro) {
- SLIST_INIT(&lldev->lro_free);
- SLIST_INIT(&lldev->lro_active);
- lldev->lro_num = XGE_LRO_DEFAULT_ENTRIES;
-
- for(index = 0; index < lldev->lro_num; index++) {
- lro_session = (xge_lro_entry_t *)
- xge_os_malloc(NULL, sizeof(xge_lro_entry_t));
- if(lro_session == NULL) {
- lldev->lro_num = index;
- break;
- }
- SLIST_INSERT_HEAD(&lldev->lro_free, lro_session, next);
- }
- }
-
- /* Open FIFO (Tx) channel */
- status = xge_tx_open(lldev, option);
- if(status != XGE_HAL_OK)
- XGE_EXIT_ON_ERR("Opening Tx channel failed", _exit1, status);
-
- goto _exit;
-
-_exit1:
- /*
- * Opening Rx channel(s) failed (index is <last ring index - 1>) or
- * Initialization of LRO failed (index is XGE_RING_COUNT)
- * Opening Tx channel failed (index is XGE_RING_COUNT)
- */
- for(index2 = 0; index2 < index; index2++)
- xge_hal_channel_close(lldev->ring_channel[index2], option);
-
-_exit:
- return status;
-}
-
-/**
- * xge_channel_close
- * Close both Tx and Rx channels
- *
- * @lldev Per-adapter Data
- * @option Channel reopen option
- *
- */
-void
-xge_channel_close(xge_lldev_t *lldev, xge_hal_channel_reopen_e option)
-{
- int qindex = 0;
-
- DELAY(1000 * 1000);
-
- /* Close FIFO (Tx) channel */
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++)
- xge_hal_channel_close(lldev->fifo_channel[qindex], option);
-
- /* Close Ring (Rx) channels */
- for(qindex = 0; qindex < XGE_RING_COUNT; qindex++)
- xge_hal_channel_close(lldev->ring_channel[qindex], option);
-
- if(bus_dmamap_destroy(lldev->dma_tag_rx, lldev->extra_dma_map))
- xge_trace(XGE_ERR, "Rx extra map destroy failed");
- if(bus_dma_tag_destroy(lldev->dma_tag_rx))
- xge_trace(XGE_ERR, "Rx DMA tag destroy failed");
- if(bus_dma_tag_destroy(lldev->dma_tag_tx))
- xge_trace(XGE_ERR, "Tx DMA tag destroy failed");
-}
-
-/**
- * dmamap_cb
- * DMA map callback
- *
- * @arg Parameter passed from dmamap
- * @segs Segments
- * @nseg Number of segments
- * @error Error
- */
-void
-dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
-{
- if(!error) {
- *(bus_addr_t *) arg = segs->ds_addr;
- }
-}
-
-/**
- * xge_reset
- * Device Reset
- *
- * @lldev Per-adapter Data
- */
-void
-xge_reset(xge_lldev_t *lldev)
-{
- xge_trace(XGE_TRACE, "Reseting the chip");
-
- /* If the device is not initialized, return */
- if(lldev->initialized) {
- mtx_lock(&lldev->mtx_drv);
- xge_device_stop(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
- xge_device_init(lldev, XGE_HAL_CHANNEL_OC_NORMAL);
- mtx_unlock(&lldev->mtx_drv);
- }
-
- return;
-}
-
-/**
- * xge_setmulti
- * Set an address as a multicast address
- *
- * @lldev Per-adapter Data
- */
-void
-xge_setmulti(xge_lldev_t *lldev)
-{
- struct ifmultiaddr *ifma;
- u8 *lladdr;
- xge_hal_device_t *hldev = (xge_hal_device_t *)lldev->devh;
- struct ifnet *ifnetp = lldev->ifnetp;
- int index = 0;
- int offset = 1;
- int table_size = 47;
- xge_hal_status_e status = XGE_HAL_OK;
- u8 initial_addr[]= {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
-
- if((ifnetp->if_flags & IFF_MULTICAST) && (!lldev->all_multicast)) {
- status = xge_hal_device_mcast_enable(hldev);
- lldev->all_multicast = 1;
- }
- else if((ifnetp->if_flags & IFF_MULTICAST) && (lldev->all_multicast)) {
- status = xge_hal_device_mcast_disable(hldev);
- lldev->all_multicast = 0;
- }
-
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "Enabling/disabling multicast failed");
- goto _exit;
- }
-
- /* Updating address list */
- if_maddr_rlock(ifnetp);
- index = 0;
- TAILQ_FOREACH(ifma, &ifnetp->if_multiaddrs, ifma_link) {
- if(ifma->ifma_addr->sa_family != AF_LINK) {
- continue;
- }
- lladdr = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
- index += 1;
- }
- if_maddr_runlock(ifnetp);
-
- if((!lldev->all_multicast) && (index)) {
- lldev->macaddr_count = (index + 1);
- if(lldev->macaddr_count > table_size) {
- goto _exit;
- }
-
- /* Clear old addresses */
- for(index = 0; index < 48; index++) {
- xge_hal_device_macaddr_set(hldev, (offset + index),
- initial_addr);
- }
- }
-
- /* Add new addresses */
- if_maddr_rlock(ifnetp);
- index = 0;
- TAILQ_FOREACH(ifma, &ifnetp->if_multiaddrs, ifma_link) {
- if(ifma->ifma_addr->sa_family != AF_LINK) {
- continue;
- }
- lladdr = LLADDR((struct sockaddr_dl *)ifma->ifma_addr);
- xge_hal_device_macaddr_set(hldev, (offset + index), lladdr);
- index += 1;
- }
- if_maddr_runlock(ifnetp);
-
-_exit:
- return;
-}
-
-/**
- * xge_enable_promisc
- * Enable Promiscuous Mode
- *
- * @lldev Per-adapter Data
- */
-void
-xge_enable_promisc(xge_lldev_t *lldev)
-{
- struct ifnet *ifnetp = lldev->ifnetp;
- xge_hal_device_t *hldev = lldev->devh;
- xge_hal_pci_bar0_t *bar0 = NULL;
- u64 val64 = 0;
-
- bar0 = (xge_hal_pci_bar0_t *) hldev->bar0;
-
- if(ifnetp->if_flags & IFF_PROMISC) {
- xge_hal_device_promisc_enable(lldev->devh);
-
- /*
- * When operating in promiscuous mode, don't strip the VLAN tag
- */
- val64 = xge_os_pio_mem_read64(lldev->pdev, hldev->regh0,
- &bar0->rx_pa_cfg);
- val64 &= ~XGE_HAL_RX_PA_CFG_STRIP_VLAN_TAG_MODE(1);
- val64 |= XGE_HAL_RX_PA_CFG_STRIP_VLAN_TAG_MODE(0);
- xge_os_pio_mem_write64(lldev->pdev, hldev->regh0, val64,
- &bar0->rx_pa_cfg);
-
- xge_trace(XGE_TRACE, "Promiscuous mode ON");
- }
-}
-
-/**
- * xge_disable_promisc
- * Disable Promiscuous Mode
- *
- * @lldev Per-adapter Data
- */
-void
-xge_disable_promisc(xge_lldev_t *lldev)
-{
- xge_hal_device_t *hldev = lldev->devh;
- xge_hal_pci_bar0_t *bar0 = NULL;
- u64 val64 = 0;
-
- bar0 = (xge_hal_pci_bar0_t *) hldev->bar0;
-
- xge_hal_device_promisc_disable(lldev->devh);
-
- /*
- * Strip VLAN tag when operating in non-promiscuous mode
- */
- val64 = xge_os_pio_mem_read64(lldev->pdev, hldev->regh0,
- &bar0->rx_pa_cfg);
- val64 &= ~XGE_HAL_RX_PA_CFG_STRIP_VLAN_TAG_MODE(1);
- val64 |= XGE_HAL_RX_PA_CFG_STRIP_VLAN_TAG_MODE(1);
- xge_os_pio_mem_write64(lldev->pdev, hldev->regh0, val64,
- &bar0->rx_pa_cfg);
-
- xge_trace(XGE_TRACE, "Promiscuous mode OFF");
-}
-
-/**
- * xge_change_mtu
- * Change interface MTU to a requested valid size
- *
- * @lldev Per-adapter Data
- * @NewMtu Requested MTU
- *
- * Returns 0 or Error Number
- */
-int
-xge_change_mtu(xge_lldev_t *lldev, int new_mtu)
-{
- int status = XGE_HAL_OK;
-
- /* Check requested MTU size for boundary */
- if(xge_hal_device_mtu_check(lldev->devh, new_mtu) != XGE_HAL_OK) {
- XGE_EXIT_ON_ERR("Invalid MTU", _exit, EINVAL);
- }
-
- lldev->mtu = new_mtu;
- xge_confirm_changes(lldev, XGE_SET_MTU);
-
-_exit:
- return status;
-}
-
-/**
- * xge_device_stop
- *
- * Common code for both stop and part of reset. Disables device, interrupts and
- * closes channels
- *
- * @dev Device Handle
- * @option Channel normal/reset option
- */
-void
-xge_device_stop(xge_lldev_t *lldev, xge_hal_channel_reopen_e option)
-{
- xge_hal_device_t *hldev = lldev->devh;
- struct ifnet *ifnetp = lldev->ifnetp;
- u64 val64 = 0;
-
- mtx_assert((&lldev->mtx_drv), MA_OWNED);
-
- /* If device is not in "Running" state, return */
- if (!(ifnetp->if_drv_flags & IFF_DRV_RUNNING))
- goto _exit;
-
- /* Set appropriate flags */
- ifnetp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
-
- /* Stop timer */
- callout_stop(&lldev->timer);
-
- /* Disable interrupts */
- xge_hal_device_intr_disable(hldev);
-
- mtx_unlock(&lldev->mtx_drv);
- xge_queue_flush(xge_hal_device_queue(lldev->devh));
- mtx_lock(&lldev->mtx_drv);
-
- /* Disable HAL device */
- if(xge_hal_device_disable(hldev) != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "Disabling HAL device failed");
- xge_hal_device_status(hldev, &val64);
- xge_trace(XGE_ERR, "Adapter Status: 0x%llx", (long long)val64);
- }
-
- /* Close Tx and Rx channels */
- xge_channel_close(lldev, option);
-
- /* Reset HAL device */
- xge_hal_device_reset(hldev);
-
- xge_os_mdelay(1000);
- lldev->initialized = 0;
-
- if_link_state_change(ifnetp, LINK_STATE_DOWN);
-
-_exit:
- return;
-}
-
-/**
- * xge_set_mbuf_cflags
- * set checksum flag for the mbuf
- *
- * @pkt Packet
- */
-void
-xge_set_mbuf_cflags(mbuf_t pkt)
-{
- pkt->m_pkthdr.csum_flags = CSUM_IP_CHECKED;
- pkt->m_pkthdr.csum_flags |= CSUM_IP_VALID;
- pkt->m_pkthdr.csum_flags |= (CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
- pkt->m_pkthdr.csum_data = htons(0xffff);
-}
-
-/**
- * xge_lro_flush_sessions
- * Flush LRO session and send accumulated LRO packet to upper layer
- *
- * @lldev Per-adapter Data
- */
-void
-xge_lro_flush_sessions(xge_lldev_t *lldev)
-{
- xge_lro_entry_t *lro_session = NULL;
-
- while(!SLIST_EMPTY(&lldev->lro_active)) {
- lro_session = SLIST_FIRST(&lldev->lro_active);
- SLIST_REMOVE_HEAD(&lldev->lro_active, next);
- xge_lro_flush(lldev, lro_session);
- }
-}
-
-/**
- * xge_lro_flush
- * Flush LRO session. Send accumulated LRO packet to upper layer
- *
- * @lldev Per-adapter Data
- * @lro LRO session to be flushed
- */
-static void
-xge_lro_flush(xge_lldev_t *lldev, xge_lro_entry_t *lro_session)
-{
- struct ip *header_ip;
- struct tcphdr *header_tcp;
- u32 *ptr;
-
- if(lro_session->append_cnt) {
- header_ip = lro_session->lro_header_ip;
- header_ip->ip_len = htons(lro_session->len - ETHER_HDR_LEN);
- lro_session->m_head->m_pkthdr.len = lro_session->len;
- header_tcp = (struct tcphdr *)(header_ip + 1);
- header_tcp->th_ack = lro_session->ack_seq;
- header_tcp->th_win = lro_session->window;
- if(lro_session->timestamp) {
- ptr = (u32 *)(header_tcp + 1);
- ptr[1] = htonl(lro_session->tsval);
- ptr[2] = lro_session->tsecr;
- }
- }
-
- (*lldev->ifnetp->if_input)(lldev->ifnetp, lro_session->m_head);
- lro_session->m_head = NULL;
- lro_session->timestamp = 0;
- lro_session->append_cnt = 0;
- SLIST_INSERT_HEAD(&lldev->lro_free, lro_session, next);
-}
-
-/**
- * xge_lro_accumulate
- * Accumulate packets to form a large LRO packet based on various conditions
- *
- * @lldev Per-adapter Data
- * @m_head Current Packet
- *
- * Returns XGE_HAL_OK or XGE_HAL_FAIL (failure)
- */
-static int
-xge_lro_accumulate(xge_lldev_t *lldev, struct mbuf *m_head)
-{
- struct ether_header *header_ethernet;
- struct ip *header_ip;
- struct tcphdr *header_tcp;
- u32 seq, *ptr;
- struct mbuf *buffer_next, *buffer_tail;
- xge_lro_entry_t *lro_session;
- xge_hal_status_e status = XGE_HAL_FAIL;
- int hlen, ip_len, tcp_hdr_len, tcp_data_len, tot_len, tcp_options;
- int trim;
-
- /* Get Ethernet header */
- header_ethernet = mtod(m_head, struct ether_header *);
-
- /* Return if it is not IP packet */
- if(header_ethernet->ether_type != htons(ETHERTYPE_IP))
- goto _exit;
-
- /* Get IP header */
- header_ip = lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1 ?
- (struct ip *)(header_ethernet + 1) :
- mtod(m_head->m_next, struct ip *);
-
- /* Return if it is not TCP packet */
- if(header_ip->ip_p != IPPROTO_TCP)
- goto _exit;
-
- /* Return if packet has options */
- if((header_ip->ip_hl << 2) != sizeof(*header_ip))
- goto _exit;
-
- /* Return if packet is fragmented */
- if(header_ip->ip_off & htons(IP_MF | IP_OFFMASK))
- goto _exit;
-
- /* Get TCP header */
- header_tcp = (struct tcphdr *)(header_ip + 1);
-
- /* Return if not ACK or PUSH */
- if((header_tcp->th_flags & ~(TH_ACK | TH_PUSH)) != 0)
- goto _exit;
-
- /* Only timestamp option is handled */
- tcp_options = (header_tcp->th_off << 2) - sizeof(*header_tcp);
- tcp_hdr_len = sizeof(*header_tcp) + tcp_options;
- ptr = (u32 *)(header_tcp + 1);
- if(tcp_options != 0) {
- if(__predict_false(tcp_options != TCPOLEN_TSTAMP_APPA) ||
- (*ptr != ntohl(TCPOPT_NOP << 24 | TCPOPT_NOP << 16 |
- TCPOPT_TIMESTAMP << 8 | TCPOLEN_TIMESTAMP))) {
- goto _exit;
- }
- }
-
- /* Total length of packet (IP) */
- ip_len = ntohs(header_ip->ip_len);
-
- /* TCP data size */
- tcp_data_len = ip_len - (header_tcp->th_off << 2) - sizeof(*header_ip);
-
- /* If the frame is padded, trim it */
- tot_len = m_head->m_pkthdr.len;
- trim = tot_len - (ip_len + ETHER_HDR_LEN);
- if(trim != 0) {
- if(trim < 0)
- goto _exit;
- m_adj(m_head, -trim);
- tot_len = m_head->m_pkthdr.len;
- }
-
- buffer_next = m_head;
- buffer_tail = NULL;
- while(buffer_next != NULL) {
- buffer_tail = buffer_next;
- buffer_next = buffer_tail->m_next;
- }
-
- /* Total size of only headers */
- hlen = ip_len + ETHER_HDR_LEN - tcp_data_len;
-
- /* Get sequence number */
- seq = ntohl(header_tcp->th_seq);
-
- SLIST_FOREACH(lro_session, &lldev->lro_active, next) {
- if(lro_session->source_port == header_tcp->th_sport &&
- lro_session->dest_port == header_tcp->th_dport &&
- lro_session->source_ip == header_ip->ip_src.s_addr &&
- lro_session->dest_ip == header_ip->ip_dst.s_addr) {
-
- /* Unmatched sequence number, flush LRO session */
- if(__predict_false(seq != lro_session->next_seq)) {
- SLIST_REMOVE(&lldev->lro_active, lro_session,
- xge_lro_entry_t, next);
- xge_lro_flush(lldev, lro_session);
- goto _exit;
- }
-
- /* Handle timestamp option */
- if(tcp_options) {
- u32 tsval = ntohl(*(ptr + 1));
- if(__predict_false(lro_session->tsval > tsval ||
- *(ptr + 2) == 0)) {
- goto _exit;
- }
- lro_session->tsval = tsval;
- lro_session->tsecr = *(ptr + 2);
- }
-
- lro_session->next_seq += tcp_data_len;
- lro_session->ack_seq = header_tcp->th_ack;
- lro_session->window = header_tcp->th_win;
-
- /* If TCP data/payload is of 0 size, free mbuf */
- if(tcp_data_len == 0) {
- m_freem(m_head);
- status = XGE_HAL_OK;
- goto _exit;
- }
-
- lro_session->append_cnt++;
- lro_session->len += tcp_data_len;
-
- /* Adjust mbuf so that m_data points to payload than headers */
- m_adj(m_head, hlen);
-
- /* Append this packet to LRO accumulated packet */
- lro_session->m_tail->m_next = m_head;
- lro_session->m_tail = buffer_tail;
-
- /* Flush if LRO packet is exceeding maximum size */
- if(lro_session->len >
- (XGE_HAL_LRO_DEFAULT_FRM_LEN - lldev->ifnetp->if_mtu)) {
- SLIST_REMOVE(&lldev->lro_active, lro_session,
- xge_lro_entry_t, next);
- xge_lro_flush(lldev, lro_session);
- }
- status = XGE_HAL_OK;
- goto _exit;
- }
- }
-
- if(SLIST_EMPTY(&lldev->lro_free))
- goto _exit;
-
- /* Start a new LRO session */
- lro_session = SLIST_FIRST(&lldev->lro_free);
- SLIST_REMOVE_HEAD(&lldev->lro_free, next);
- SLIST_INSERT_HEAD(&lldev->lro_active, lro_session, next);
- lro_session->source_port = header_tcp->th_sport;
- lro_session->dest_port = header_tcp->th_dport;
- lro_session->source_ip = header_ip->ip_src.s_addr;
- lro_session->dest_ip = header_ip->ip_dst.s_addr;
- lro_session->next_seq = seq + tcp_data_len;
- lro_session->mss = tcp_data_len;
- lro_session->ack_seq = header_tcp->th_ack;
- lro_session->window = header_tcp->th_win;
-
- lro_session->lro_header_ip = header_ip;
-
- /* Handle timestamp option */
- if(tcp_options) {
- lro_session->timestamp = 1;
- lro_session->tsval = ntohl(*(ptr + 1));
- lro_session->tsecr = *(ptr + 2);
- }
-
- lro_session->len = tot_len;
- lro_session->m_head = m_head;
- lro_session->m_tail = buffer_tail;
- status = XGE_HAL_OK;
-
-_exit:
- return status;
-}
-
-/**
- * xge_accumulate_large_rx
- * Accumulate packets to form a large LRO packet based on various conditions
- *
- * @lldev Per-adapter Data
- * @pkt Current packet
- * @pkt_length Packet Length
- * @rxd_priv Rx Descriptor Private Data
- */
-void
-xge_accumulate_large_rx(xge_lldev_t *lldev, struct mbuf *pkt, int pkt_length,
- xge_rx_priv_t *rxd_priv)
-{
- if(xge_lro_accumulate(lldev, pkt) != XGE_HAL_OK) {
- bus_dmamap_sync(lldev->dma_tag_rx, rxd_priv->dmainfo[0].dma_map,
- BUS_DMASYNC_POSTREAD);
- (*lldev->ifnetp->if_input)(lldev->ifnetp, pkt);
- }
-}
-
-/**
- * xge_rx_compl
- * If the interrupt is due to received frame (Rx completion), send it up
- *
- * @channelh Ring Channel Handle
- * @dtr Current Descriptor
- * @t_code Transfer Code indicating success or error
- * @userdata Per-adapter Data
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-xge_hal_status_e
-xge_rx_compl(xge_hal_channel_h channelh, xge_hal_dtr_h dtr, u8 t_code,
- void *userdata)
-{
- struct ifnet *ifnetp;
- xge_rx_priv_t *rxd_priv = NULL;
- mbuf_t mbuf_up = NULL;
- xge_hal_status_e status = XGE_HAL_OK;
- xge_hal_dtr_info_t ext_info;
- int index;
- u16 vlan_tag;
-
- /*get the user data portion*/
- xge_lldev_t *lldev = xge_hal_channel_userdata(channelh);
- if(!lldev) {
- XGE_EXIT_ON_ERR("Failed to get user data", _exit, XGE_HAL_FAIL);
- }
-
- XGE_DRV_STATS(rx_completions);
-
- /* get the interface pointer */
- ifnetp = lldev->ifnetp;
-
- do {
- XGE_DRV_STATS(rx_desc_compl);
-
- if(!(ifnetp->if_drv_flags & IFF_DRV_RUNNING)) {
- status = XGE_HAL_FAIL;
- goto _exit;
- }
-
- if(t_code) {
- xge_trace(XGE_TRACE, "Packet dropped because of %d", t_code);
- XGE_DRV_STATS(rx_tcode);
- xge_hal_device_handle_tcode(channelh, dtr, t_code);
- xge_hal_ring_dtr_post(channelh,dtr);
- continue;
- }
-
- /* Get the private data for this descriptor*/
- rxd_priv = (xge_rx_priv_t *) xge_hal_ring_dtr_private(channelh,
- dtr);
- if(!rxd_priv) {
- XGE_EXIT_ON_ERR("Failed to get descriptor private data", _exit,
- XGE_HAL_FAIL);
- }
-
- /*
- * Prepare one buffer to send it to upper layer -- since the upper
- * layer frees the buffer do not use rxd_priv->buffer. Meanwhile
- * prepare a new buffer, do mapping, use it in the current
- * descriptor and post descriptor back to ring channel
- */
- mbuf_up = rxd_priv->bufferArray[0];
-
- /* Gets details of mbuf i.e., packet length */
- xge_ring_dtr_get(mbuf_up, channelh, dtr, lldev, rxd_priv);
-
- status =
- (lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1) ?
- xge_get_buf(dtr, rxd_priv, lldev, 0) :
- xge_get_buf_3b_5b(dtr, rxd_priv, lldev);
-
- if(status != XGE_HAL_OK) {
- xge_trace(XGE_ERR, "No memory");
- XGE_DRV_STATS(rx_no_buf);
-
- /*
- * Unable to allocate buffer. Instead of discarding, post
- * descriptor back to channel for future processing of same
- * packet.
- */
- xge_hal_ring_dtr_post(channelh, dtr);
- continue;
- }
-
- /* Get the extended information */
- xge_hal_ring_dtr_info_get(channelh, dtr, &ext_info);
-
- /*
- * As we have allocated a new mbuf for this descriptor, post this
- * descriptor with new mbuf back to ring channel
- */
- vlan_tag = ext_info.vlan;
- xge_hal_ring_dtr_post(channelh, dtr);
- if ((!(ext_info.proto & XGE_HAL_FRAME_PROTO_IP_FRAGMENTED) &&
- (ext_info.proto & XGE_HAL_FRAME_PROTO_TCP_OR_UDP) &&
- (ext_info.l3_cksum == XGE_HAL_L3_CKSUM_OK) &&
- (ext_info.l4_cksum == XGE_HAL_L4_CKSUM_OK))) {
-
- /* set Checksum Flag */
- xge_set_mbuf_cflags(mbuf_up);
-
- if(lldev->enabled_lro) {
- xge_accumulate_large_rx(lldev, mbuf_up, mbuf_up->m_len,
- rxd_priv);
- }
- else {
- /* Post-Read sync for buffers*/
- for(index = 0; index < lldev->rxd_mbuf_cnt; index++) {
- bus_dmamap_sync(lldev->dma_tag_rx,
- rxd_priv->dmainfo[0].dma_map, BUS_DMASYNC_POSTREAD);
- }
- (*ifnetp->if_input)(ifnetp, mbuf_up);
- }
- }
- else {
- /*
- * Packet with erroneous checksum , let the upper layer deal
- * with it
- */
-
- /* Post-Read sync for buffers*/
- for(index = 0; index < lldev->rxd_mbuf_cnt; index++) {
- bus_dmamap_sync(lldev->dma_tag_rx,
- rxd_priv->dmainfo[0].dma_map, BUS_DMASYNC_POSTREAD);
- }
-
- if(vlan_tag) {
- mbuf_up->m_pkthdr.ether_vtag = vlan_tag;
- mbuf_up->m_flags |= M_VLANTAG;
- }
-
- if(lldev->enabled_lro)
- xge_lro_flush_sessions(lldev);
-
- (*ifnetp->if_input)(ifnetp, mbuf_up);
- }
- } while(xge_hal_ring_dtr_next_completed(channelh, &dtr, &t_code)
- == XGE_HAL_OK);
-
- if(lldev->enabled_lro)
- xge_lro_flush_sessions(lldev);
-
-_exit:
- return status;
-}
-
-/**
- * xge_ring_dtr_get
- * Get descriptors
- *
- * @mbuf_up Packet to send up
- * @channelh Ring Channel Handle
- * @dtr Descriptor
- * @lldev Per-adapter Data
- * @rxd_priv Rx Descriptor Private Data
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-int
-xge_ring_dtr_get(mbuf_t mbuf_up, xge_hal_channel_h channelh, xge_hal_dtr_h dtr,
- xge_lldev_t *lldev, xge_rx_priv_t *rxd_priv)
-{
- mbuf_t m;
- int pkt_length[5]={0,0}, pkt_len=0;
- dma_addr_t dma_data[5];
- int index;
-
- m = mbuf_up;
- pkt_len = 0;
-
- if(lldev->buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_1) {
- xge_os_memzero(pkt_length, sizeof(pkt_length));
-
- /*
- * Retrieve data of interest from the completed descriptor -- This
- * returns the packet length
- */
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_5) {
- xge_hal_ring_dtr_5b_get(channelh, dtr, dma_data, pkt_length);
- }
- else {
- xge_hal_ring_dtr_3b_get(channelh, dtr, dma_data, pkt_length);
- }
-
- for(index = 0; index < lldev->rxd_mbuf_cnt; index++) {
- m->m_len = pkt_length[index];
-
- if(index < (lldev->rxd_mbuf_cnt-1)) {
- m->m_next = rxd_priv->bufferArray[index + 1];
- m = m->m_next;
- }
- else {
- m->m_next = NULL;
- }
- pkt_len+=pkt_length[index];
- }
-
- /*
- * Since 2 buffer mode is an exceptional case where data is in 3rd
- * buffer but not in 2nd buffer
- */
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_2) {
- m->m_len = pkt_length[2];
- pkt_len+=pkt_length[2];
- }
-
- /*
- * Update length of newly created buffer to be sent up with packet
- * length
- */
- mbuf_up->m_pkthdr.len = pkt_len;
- }
- else {
- /*
- * Retrieve data of interest from the completed descriptor -- This
- * returns the packet length
- */
- xge_hal_ring_dtr_1b_get(channelh, dtr,&dma_data[0], &pkt_length[0]);
-
- /*
- * Update length of newly created buffer to be sent up with packet
- * length
- */
- mbuf_up->m_len = mbuf_up->m_pkthdr.len = pkt_length[0];
- }
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_flush_txds
- * Flush Tx descriptors
- *
- * @channelh Channel handle
- */
-static void inline
-xge_flush_txds(xge_hal_channel_h channelh)
-{
- xge_lldev_t *lldev = xge_hal_channel_userdata(channelh);
- xge_hal_dtr_h tx_dtr;
- xge_tx_priv_t *tx_priv;
- u8 t_code;
-
- while(xge_hal_fifo_dtr_next_completed(channelh, &tx_dtr, &t_code)
- == XGE_HAL_OK) {
- XGE_DRV_STATS(tx_desc_compl);
- if(t_code) {
- xge_trace(XGE_TRACE, "Tx descriptor with t_code %d", t_code);
- XGE_DRV_STATS(tx_tcode);
- xge_hal_device_handle_tcode(channelh, tx_dtr, t_code);
- }
-
- tx_priv = xge_hal_fifo_dtr_private(tx_dtr);
- bus_dmamap_unload(lldev->dma_tag_tx, tx_priv->dma_map);
- m_freem(tx_priv->buffer);
- tx_priv->buffer = NULL;
- xge_hal_fifo_dtr_free(channelh, tx_dtr);
- }
-}
-
-/**
- * xge_send
- * Transmit function
- *
- * @ifnetp Interface Handle
- */
-void
-xge_send(struct ifnet *ifnetp)
-{
- int qindex = 0;
- xge_lldev_t *lldev = ifnetp->if_softc;
-
- for(qindex = 0; qindex < XGE_FIFO_COUNT; qindex++) {
- if(mtx_trylock(&lldev->mtx_tx[qindex]) == 0) {
- XGE_DRV_STATS(tx_lock_fail);
- break;
- }
- xge_send_locked(ifnetp, qindex);
- mtx_unlock(&lldev->mtx_tx[qindex]);
- }
-}
-
-static void inline
-xge_send_locked(struct ifnet *ifnetp, int qindex)
-{
- xge_hal_dtr_h dtr;
- static bus_dma_segment_t segs[XGE_MAX_SEGS];
- xge_hal_status_e status;
- unsigned int max_fragments;
- xge_lldev_t *lldev = ifnetp->if_softc;
- xge_hal_channel_h channelh = lldev->fifo_channel[qindex];
- mbuf_t m_head = NULL;
- mbuf_t m_buf = NULL;
- xge_tx_priv_t *ll_tx_priv = NULL;
- register unsigned int count = 0;
- unsigned int nsegs = 0;
- u16 vlan_tag;
-
- max_fragments = ((xge_hal_fifo_t *)channelh)->config->max_frags;
-
- /* If device is not initialized, return */
- if((!lldev->initialized) || (!(ifnetp->if_drv_flags & IFF_DRV_RUNNING)))
- return;
-
- XGE_DRV_STATS(tx_calls);
-
- /*
- * This loop will be executed for each packet in the kernel maintained
- * queue -- each packet can be with fragments as an mbuf chain
- */
- for(;;) {
- IF_DEQUEUE(&ifnetp->if_snd, m_head);
- if (m_head == NULL) {
- ifnetp->if_drv_flags &= ~(IFF_DRV_OACTIVE);
- return;
- }
-
- for(m_buf = m_head; m_buf != NULL; m_buf = m_buf->m_next) {
- if(m_buf->m_len) count += 1;
- }
-
- if(count >= max_fragments) {
- m_buf = m_defrag(m_head, M_NOWAIT);
- if(m_buf != NULL) m_head = m_buf;
- XGE_DRV_STATS(tx_defrag);
- }
-
- /* Reserve descriptors */
- status = xge_hal_fifo_dtr_reserve(channelh, &dtr);
- if(status != XGE_HAL_OK) {
- XGE_DRV_STATS(tx_no_txd);
- xge_flush_txds(channelh);
- break;
- }
-
- vlan_tag =
- (m_head->m_flags & M_VLANTAG) ? m_head->m_pkthdr.ether_vtag : 0;
- xge_hal_fifo_dtr_vlan_set(dtr, vlan_tag);
-
- /* Update Tx private structure for this descriptor */
- ll_tx_priv = xge_hal_fifo_dtr_private(dtr);
- ll_tx_priv->buffer = m_head;
-
- /*
- * Do mapping -- Required DMA tag has been created in xge_init
- * function and DMA maps have already been created in the
- * xgell_tx_replenish function.
- * Returns number of segments through nsegs
- */
- if(bus_dmamap_load_mbuf_sg(lldev->dma_tag_tx,
- ll_tx_priv->dma_map, m_head, segs, &nsegs, BUS_DMA_NOWAIT)) {
- xge_trace(XGE_TRACE, "DMA map load failed");
- XGE_DRV_STATS(tx_map_fail);
- break;
- }
-
- if(lldev->driver_stats.tx_max_frags < nsegs)
- lldev->driver_stats.tx_max_frags = nsegs;
-
- /* Set descriptor buffer for header and each fragment/segment */
- count = 0;
- do {
- xge_hal_fifo_dtr_buffer_set(channelh, dtr, count,
- (dma_addr_t)htole64(segs[count].ds_addr),
- segs[count].ds_len);
- count++;
- } while(count < nsegs);
-
- /* Pre-write Sync of mapping */
- bus_dmamap_sync(lldev->dma_tag_tx, ll_tx_priv->dma_map,
- BUS_DMASYNC_PREWRITE);
-
- if((lldev->enabled_tso) &&
- (m_head->m_pkthdr.csum_flags & CSUM_TSO)) {
- XGE_DRV_STATS(tx_tso);
- xge_hal_fifo_dtr_mss_set(dtr, m_head->m_pkthdr.tso_segsz);
- }
-
- /* Checksum */
- if(ifnetp->if_hwassist > 0) {
- xge_hal_fifo_dtr_cksum_set_bits(dtr, XGE_HAL_TXD_TX_CKO_IPV4_EN
- | XGE_HAL_TXD_TX_CKO_TCP_EN | XGE_HAL_TXD_TX_CKO_UDP_EN);
- }
-
- /* Post descriptor to FIFO channel */
- xge_hal_fifo_dtr_post(channelh, dtr);
- XGE_DRV_STATS(tx_posted);
-
- /* Send the same copy of mbuf packet to BPF (Berkely Packet Filter)
- * listener so that we can use tools like tcpdump */
- ETHER_BPF_MTAP(ifnetp, m_head);
- }
-
- /* Prepend the packet back to queue */
- IF_PREPEND(&ifnetp->if_snd, m_head);
- ifnetp->if_drv_flags |= IFF_DRV_OACTIVE;
-
- xge_queue_produce_context(xge_hal_device_queue(lldev->devh),
- XGE_LL_EVENT_TRY_XMIT_AGAIN, lldev->devh);
- XGE_DRV_STATS(tx_again);
-}
-
-/**
- * xge_get_buf
- * Allocates new mbufs to be placed into descriptors
- *
- * @dtrh Descriptor Handle
- * @rxd_priv Rx Descriptor Private Data
- * @lldev Per-adapter Data
- * @index Buffer Index (if multi-buffer mode)
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-int
-xge_get_buf(xge_hal_dtr_h dtrh, xge_rx_priv_t *rxd_priv,
- xge_lldev_t *lldev, int index)
-{
- register mbuf_t mp = NULL;
- struct ifnet *ifnetp = lldev->ifnetp;
- int status = XGE_HAL_OK;
- int buffer_size = 0, cluster_size = 0, count;
- bus_dmamap_t map = rxd_priv->dmainfo[index].dma_map;
- bus_dma_segment_t segs[3];
-
- buffer_size = (lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1) ?
- ifnetp->if_mtu + XGE_HAL_MAC_HEADER_MAX_SIZE :
- lldev->rxd_mbuf_len[index];
-
- if(buffer_size <= MCLBYTES) {
- cluster_size = MCLBYTES;
- mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
- }
- else {
- cluster_size = MJUMPAGESIZE;
- if((lldev->buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_5) &&
- (buffer_size > MJUMPAGESIZE)) {
- cluster_size = MJUM9BYTES;
- }
- mp = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, cluster_size);
- }
- if(!mp) {
- xge_trace(XGE_ERR, "Out of memory to allocate mbuf");
- status = XGE_HAL_FAIL;
- goto getbuf_out;
- }
-
- /* Update mbuf's length, packet length and receive interface */
- mp->m_len = mp->m_pkthdr.len = buffer_size;
- mp->m_pkthdr.rcvif = ifnetp;
-
- /* Load DMA map */
- if(bus_dmamap_load_mbuf_sg(lldev->dma_tag_rx, lldev->extra_dma_map,
- mp, segs, &count, BUS_DMA_NOWAIT)) {
- XGE_DRV_STATS(rx_map_fail);
- m_freem(mp);
- XGE_EXIT_ON_ERR("DMA map load failed", getbuf_out, XGE_HAL_FAIL);
- }
-
- /* Update descriptor private data */
- rxd_priv->bufferArray[index] = mp;
- rxd_priv->dmainfo[index].dma_phyaddr = htole64(segs->ds_addr);
- rxd_priv->dmainfo[index].dma_map = lldev->extra_dma_map;
- lldev->extra_dma_map = map;
-
- /* Pre-Read/Write sync */
- bus_dmamap_sync(lldev->dma_tag_rx, map, BUS_DMASYNC_POSTREAD);
-
- /* Unload DMA map of mbuf in current descriptor */
- bus_dmamap_unload(lldev->dma_tag_rx, map);
-
- /* Set descriptor buffer */
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1) {
- xge_hal_ring_dtr_1b_set(dtrh, rxd_priv->dmainfo[0].dma_phyaddr,
- cluster_size);
- }
-
-getbuf_out:
- return status;
-}
-
-/**
- * xge_get_buf_3b_5b
- * Allocates new mbufs to be placed into descriptors (in multi-buffer modes)
- *
- * @dtrh Descriptor Handle
- * @rxd_priv Rx Descriptor Private Data
- * @lldev Per-adapter Data
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-int
-xge_get_buf_3b_5b(xge_hal_dtr_h dtrh, xge_rx_priv_t *rxd_priv,
- xge_lldev_t *lldev)
-{
- bus_addr_t dma_pointers[5];
- int dma_sizes[5];
- int status = XGE_HAL_OK, index;
- int newindex = 0;
-
- for(index = 0; index < lldev->rxd_mbuf_cnt; index++) {
- status = xge_get_buf(dtrh, rxd_priv, lldev, index);
- if(status != XGE_HAL_OK) {
- for(newindex = 0; newindex < index; newindex++) {
- m_freem(rxd_priv->bufferArray[newindex]);
- }
- XGE_EXIT_ON_ERR("mbuf allocation failed", _exit, status);
- }
- }
-
- for(index = 0; index < lldev->buffer_mode; index++) {
- if(lldev->rxd_mbuf_len[index] != 0) {
- dma_pointers[index] = rxd_priv->dmainfo[index].dma_phyaddr;
- dma_sizes[index] = lldev->rxd_mbuf_len[index];
- }
- else {
- dma_pointers[index] = rxd_priv->dmainfo[index-1].dma_phyaddr;
- dma_sizes[index] = 1;
- }
- }
-
- /* Assigning second buffer to third pointer in 2 buffer mode */
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_2) {
- dma_pointers[2] = dma_pointers[1];
- dma_sizes[2] = dma_sizes[1];
- dma_sizes[1] = 1;
- }
-
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_5) {
- xge_hal_ring_dtr_5b_set(dtrh, dma_pointers, dma_sizes);
- }
- else {
- xge_hal_ring_dtr_3b_set(dtrh, dma_pointers, dma_sizes);
- }
-
-_exit:
- return status;
-}
-
-/**
- * xge_tx_compl
- * If the interrupt is due to Tx completion, free the sent buffer
- *
- * @channelh Channel Handle
- * @dtr Descriptor
- * @t_code Transfer Code indicating success or error
- * @userdata Per-adapter Data
- *
- * Returns XGE_HAL_OK or HAL error enum
- */
-xge_hal_status_e
-xge_tx_compl(xge_hal_channel_h channelh,
- xge_hal_dtr_h dtr, u8 t_code, void *userdata)
-{
- xge_tx_priv_t *ll_tx_priv = NULL;
- xge_lldev_t *lldev = (xge_lldev_t *)userdata;
- struct ifnet *ifnetp = lldev->ifnetp;
- mbuf_t m_buffer = NULL;
- int qindex = xge_hal_channel_id(channelh);
-
- mtx_lock(&lldev->mtx_tx[qindex]);
-
- XGE_DRV_STATS(tx_completions);
-
- /*
- * For each completed descriptor: Get private structure, free buffer,
- * do unmapping, and free descriptor
- */
- do {
- XGE_DRV_STATS(tx_desc_compl);
-
- if(t_code) {
- XGE_DRV_STATS(tx_tcode);
- xge_trace(XGE_TRACE, "t_code %d", t_code);
- xge_hal_device_handle_tcode(channelh, dtr, t_code);
- }
-
- ll_tx_priv = xge_hal_fifo_dtr_private(dtr);
- m_buffer = ll_tx_priv->buffer;
- bus_dmamap_unload(lldev->dma_tag_tx, ll_tx_priv->dma_map);
- m_freem(m_buffer);
- ll_tx_priv->buffer = NULL;
- xge_hal_fifo_dtr_free(channelh, dtr);
- } while(xge_hal_fifo_dtr_next_completed(channelh, &dtr, &t_code)
- == XGE_HAL_OK);
- xge_send_locked(ifnetp, qindex);
- ifnetp->if_drv_flags &= ~IFF_DRV_OACTIVE;
-
- mtx_unlock(&lldev->mtx_tx[qindex]);
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_tx_initial_replenish
- * Initially allocate buffers and set them into descriptors for later use
- *
- * @channelh Tx Channel Handle
- * @dtrh Descriptor Handle
- * @index
- * @userdata Per-adapter Data
- * @reopen Channel open/reopen option
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-xge_hal_status_e
-xge_tx_initial_replenish(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int index, void *userdata, xge_hal_channel_reopen_e reopen)
-{
- xge_tx_priv_t *txd_priv = NULL;
- int status = XGE_HAL_OK;
-
- /* Get the user data portion from channel handle */
- xge_lldev_t *lldev = xge_hal_channel_userdata(channelh);
- if(lldev == NULL) {
- XGE_EXIT_ON_ERR("Failed to get user data from channel", txinit_out,
- XGE_HAL_FAIL);
- }
-
- /* Get the private data */
- txd_priv = (xge_tx_priv_t *) xge_hal_fifo_dtr_private(dtrh);
- if(txd_priv == NULL) {
- XGE_EXIT_ON_ERR("Failed to get descriptor private data", txinit_out,
- XGE_HAL_FAIL);
- }
-
- /* Create DMA map for this descriptor */
- if(bus_dmamap_create(lldev->dma_tag_tx, BUS_DMA_NOWAIT,
- &txd_priv->dma_map)) {
- XGE_EXIT_ON_ERR("DMA map creation for Tx descriptor failed",
- txinit_out, XGE_HAL_FAIL);
- }
-
-txinit_out:
- return status;
-}
-
-/**
- * xge_rx_initial_replenish
- * Initially allocate buffers and set them into descriptors for later use
- *
- * @channelh Tx Channel Handle
- * @dtrh Descriptor Handle
- * @index Ring Index
- * @userdata Per-adapter Data
- * @reopen Channel open/reopen option
- *
- * Returns XGE_HAL_OK or HAL error enums
- */
-xge_hal_status_e
-xge_rx_initial_replenish(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int index, void *userdata, xge_hal_channel_reopen_e reopen)
-{
- xge_rx_priv_t *rxd_priv = NULL;
- int status = XGE_HAL_OK;
- int index1 = 0, index2 = 0;
-
- /* Get the user data portion from channel handle */
- xge_lldev_t *lldev = xge_hal_channel_userdata(channelh);
- if(lldev == NULL) {
- XGE_EXIT_ON_ERR("Failed to get user data from channel", rxinit_out,
- XGE_HAL_FAIL);
- }
-
- /* Get the private data */
- rxd_priv = (xge_rx_priv_t *) xge_hal_ring_dtr_private(channelh, dtrh);
- if(rxd_priv == NULL) {
- XGE_EXIT_ON_ERR("Failed to get descriptor private data", rxinit_out,
- XGE_HAL_FAIL);
- }
-
- rxd_priv->bufferArray = xge_os_malloc(NULL,
- (sizeof(rxd_priv->bufferArray) * lldev->rxd_mbuf_cnt));
-
- if(rxd_priv->bufferArray == NULL) {
- XGE_EXIT_ON_ERR("Failed to allocate Rxd private", rxinit_out,
- XGE_HAL_FAIL);
- }
-
- if(lldev->buffer_mode == XGE_HAL_RING_QUEUE_BUFFER_MODE_1) {
- /* Create DMA map for these descriptors*/
- if(bus_dmamap_create(lldev->dma_tag_rx , BUS_DMA_NOWAIT,
- &rxd_priv->dmainfo[0].dma_map)) {
- XGE_EXIT_ON_ERR("DMA map creation for Rx descriptor failed",
- rxinit_err_out, XGE_HAL_FAIL);
- }
- /* Get a buffer, attach it to this descriptor */
- status = xge_get_buf(dtrh, rxd_priv, lldev, 0);
- }
- else {
- for(index1 = 0; index1 < lldev->rxd_mbuf_cnt; index1++) {
- /* Create DMA map for this descriptor */
- if(bus_dmamap_create(lldev->dma_tag_rx , BUS_DMA_NOWAIT ,
- &rxd_priv->dmainfo[index1].dma_map)) {
- for(index2 = index1 - 1; index2 >= 0; index2--) {
- bus_dmamap_destroy(lldev->dma_tag_rx,
- rxd_priv->dmainfo[index2].dma_map);
- }
- XGE_EXIT_ON_ERR(
- "Jumbo DMA map creation for Rx descriptor failed",
- rxinit_err_out, XGE_HAL_FAIL);
- }
- }
- status = xge_get_buf_3b_5b(dtrh, rxd_priv, lldev);
- }
-
- if(status != XGE_HAL_OK) {
- for(index1 = 0; index1 < lldev->rxd_mbuf_cnt; index1++) {
- bus_dmamap_destroy(lldev->dma_tag_rx,
- rxd_priv->dmainfo[index1].dma_map);
- }
- goto rxinit_err_out;
- }
- else {
- goto rxinit_out;
- }
-
-rxinit_err_out:
- xge_os_free(NULL, rxd_priv->bufferArray,
- (sizeof(rxd_priv->bufferArray) * lldev->rxd_mbuf_cnt));
-rxinit_out:
- return status;
-}
-
-/**
- * xge_rx_term
- * During unload terminate and free all descriptors
- *
- * @channelh Rx Channel Handle
- * @dtrh Rx Descriptor Handle
- * @state Descriptor State
- * @userdata Per-adapter Data
- * @reopen Channel open/reopen option
- */
-void
-xge_rx_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- xge_hal_dtr_state_e state, void *userdata,
- xge_hal_channel_reopen_e reopen)
-{
- xge_rx_priv_t *rxd_priv = NULL;
- xge_lldev_t *lldev = NULL;
- int index = 0;
-
- /* Descriptor state is not "Posted" */
- if(state != XGE_HAL_DTR_STATE_POSTED) goto rxterm_out;
-
- /* Get the user data portion */
- lldev = xge_hal_channel_userdata(channelh);
-
- /* Get the private data */
- rxd_priv = (xge_rx_priv_t *) xge_hal_ring_dtr_private(channelh, dtrh);
-
- for(index = 0; index < lldev->rxd_mbuf_cnt; index++) {
- if(rxd_priv->dmainfo[index].dma_map != NULL) {
- bus_dmamap_sync(lldev->dma_tag_rx,
- rxd_priv->dmainfo[index].dma_map, BUS_DMASYNC_POSTREAD);
- bus_dmamap_unload(lldev->dma_tag_rx,
- rxd_priv->dmainfo[index].dma_map);
- if(rxd_priv->bufferArray[index] != NULL)
- m_free(rxd_priv->bufferArray[index]);
- bus_dmamap_destroy(lldev->dma_tag_rx,
- rxd_priv->dmainfo[index].dma_map);
- }
- }
- xge_os_free(NULL, rxd_priv->bufferArray,
- (sizeof(rxd_priv->bufferArray) * lldev->rxd_mbuf_cnt));
-
- /* Free the descriptor */
- xge_hal_ring_dtr_free(channelh, dtrh);
-
-rxterm_out:
- return;
-}
-
-/**
- * xge_tx_term
- * During unload terminate and free all descriptors
- *
- * @channelh Rx Channel Handle
- * @dtrh Rx Descriptor Handle
- * @state Descriptor State
- * @userdata Per-adapter Data
- * @reopen Channel open/reopen option
- */
-void
-xge_tx_term(xge_hal_channel_h channelh, xge_hal_dtr_h dtr,
- xge_hal_dtr_state_e state, void *userdata,
- xge_hal_channel_reopen_e reopen)
-{
- xge_tx_priv_t *ll_tx_priv = xge_hal_fifo_dtr_private(dtr);
- xge_lldev_t *lldev = (xge_lldev_t *)userdata;
-
- /* Destroy DMA map */
- bus_dmamap_destroy(lldev->dma_tag_tx, ll_tx_priv->dma_map);
-}
-
-/**
- * xge_methods
- *
- * FreeBSD device interface entry points
- */
-static device_method_t xge_methods[] = {
- DEVMETHOD(device_probe, xge_probe),
- DEVMETHOD(device_attach, xge_attach),
- DEVMETHOD(device_detach, xge_detach),
- DEVMETHOD(device_shutdown, xge_shutdown),
-
- DEVMETHOD_END
-};
-
-static driver_t xge_driver = {
- "nxge",
- xge_methods,
- sizeof(xge_lldev_t),
-};
-static devclass_t xge_devclass;
-DRIVER_MODULE(nxge, pci, xge_driver, xge_devclass, 0, 0);
-
diff --git a/sys/dev/nxge/if_nxge.h b/sys/dev/nxge/if_nxge.h
deleted file mode 100644
index aa7d4c533806..000000000000
--- a/sys/dev/nxge/if_nxge.h
+++ /dev/null
@@ -1,415 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef _IF_XGE_H
-#define _IF_XGE_H
-
-#include <dev/nxge/include/xgehal.h>
-#include <dev/nxge/xge-osdep.h>
-
-/* Printing description, Copyright */
-#define XGE_DRIVER_VERSION \
- XGELL_VERSION_MAJOR"."XGELL_VERSION_MINOR"." \
- XGELL_VERSION_FIX"."XGELL_VERSION_BUILD
-#define XGE_COPYRIGHT "Copyright(c) 2002-2007 Neterion Inc."
-
-/* Printing */
-#define xge_trace(trace, fmt, args...) xge_debug_ll(trace, fmt, ## args);
-
-#define XGE_ALIGN_TO(buffer_length, to) { \
- if((buffer_length % to) != 0) { \
- buffer_length += (to - (buffer_length % to)); \
- } \
-}
-
-#define XGE_EXIT_ON_ERR(text, label, return_value) { \
- xge_trace(XGE_ERR, "%s (Status: %d)", text, return_value); \
- status = return_value; \
- goto label; \
-}
-
-#define XGE_SET_BUFFER_MODE_IN_RINGS(mode) { \
- for(index = 0; index < XGE_RING_COUNT; index++) \
- ring_config->queue[index].buffer_mode = mode; \
-}
-
-#define XGE_DEFAULT_USER_HARDCODED -1
-#define XGE_MAX_SEGS 100 /* Maximum number of segments */
-#define XGE_TX_LEVEL_LOW 16
-#define XGE_FIFO_COUNT XGE_HAL_MIN_FIFO_NUM
-#define XGE_RING_COUNT XGE_HAL_MIN_RING_NUM
-#define XGE_BUFFER_SIZE 20
-#define XGE_LRO_DEFAULT_ENTRIES 12
-#define XGE_BAUDRATE 1000000000
-
-/* Default values to configuration parameters */
-#define XGE_DEFAULT_ENABLED_TSO 1
-#define XGE_DEFAULT_ENABLED_LRO 1
-#define XGE_DEFAULT_ENABLED_MSI 1
-#define XGE_DEFAULT_BUFFER_MODE 1
-#define XGE_DEFAULT_INITIAL_MTU 1500
-#define XGE_DEFAULT_LATENCY_TIMER -1
-#define XGE_DEFAULT_MAX_SPLITS_TRANS -1
-#define XGE_DEFAULT_MMRB_COUNT -1
-#define XGE_DEFAULT_SHARED_SPLITS 0
-#define XGE_DEFAULT_ISR_POLLING_CNT 8
-#define XGE_DEFAULT_STATS_REFRESH_TIME_SEC 4
-#define XGE_DEFAULT_MAC_RMAC_BCAST_EN 1
-#define XGE_DEFAULT_MAC_TMAC_UTIL_PERIOD 5
-#define XGE_DEFAULT_MAC_RMAC_UTIL_PERIOD 5
-#define XGE_DEFAULT_MAC_RMAC_PAUSE_GEN_EN 1
-#define XGE_DEFAULT_MAC_RMAC_PAUSE_RCV_EN 1
-#define XGE_DEFAULT_MAC_RMAC_PAUSE_TIME 65535
-#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q0Q3 187
-#define XGE_DEFAULT_MAC_MC_PAUSE_THRESHOLD_Q4Q7 187
-#define XGE_DEFAULT_FIFO_MEMBLOCK_SIZE PAGE_SIZE
-#define XGE_DEFAULT_FIFO_RESERVE_THRESHOLD 0
-#define XGE_DEFAULT_FIFO_MAX_FRAGS 64
-#define XGE_DEFAULT_FIFO_QUEUE_INTR 0
-#define XGE_DEFAULT_FIFO_QUEUE_MAX 2048
-#define XGE_DEFAULT_FIFO_QUEUE_INITIAL 2048
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_A 5
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_B 10
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_URANGE_C 20
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_A 15
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_B 30
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_C 45
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_UFC_D 60
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_CI_EN 1
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_AC_EN 1
-#define XGE_DEFAULT_FIFO_QUEUE_TTI_TIMER_VAL_US 8000
-#define XGE_DEFAULT_FIFO_ALIGNMENT_SIZE sizeof(u64)
-#define XGE_DEFAULT_RING_MEMBLOCK_SIZE PAGE_SIZE
-#define XGE_DEFAULT_RING_STRIP_VLAN_TAG 1
-#define XGE_DEFAULT_RING_QUEUE_MAX 16
-#define XGE_DEFAULT_RING_QUEUE_INITIAL 16
-#define XGE_DEFAULT_RING_QUEUE_DRAM_SIZE_MB 32
-#define XGE_DEFAULT_RING_QUEUE_INDICATE_MAX_PKTS 16
-#define XGE_DEFAULT_RING_QUEUE_BACKOFF_INTERVAL_US 1000
-#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_A 5
-#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_B 10
-#define XGE_DEFAULT_RING_QUEUE_RTI_URANGE_C 50
-#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_A 1
-#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_B 8
-#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_C 16
-#define XGE_DEFAULT_RING_QUEUE_RTI_UFC_D 32
-#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_AC_EN 1
-#define XGE_DEFAULT_RING_QUEUE_RTI_TIMER_VAL_US 250
-
-#define XGE_DRV_STATS(param) (lldev->driver_stats.param++)
-
-#define XGE_SAVE_PARAM(to, what, value) to.what = value;
-
-#define XGE_GET_PARAM(str_kenv, to, param, hardcode) { \
- static int param##__LINE__; \
- if(testenv(str_kenv) == 1) { \
- getenv_int(str_kenv, &param##__LINE__); \
- } \
- else { \
- param##__LINE__ = hardcode; \
- } \
- XGE_SAVE_PARAM(to, param, param##__LINE__); \
-}
-
-#define XGE_GET_PARAM_MAC(str_kenv, param, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).mac), param, hardcode);
-
-#define XGE_GET_PARAM_FIFO(str_kenv, param, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).fifo), param, hardcode);
-
-#define XGE_GET_PARAM_FIFO_QUEUE(str_kenv, param, qindex, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex]), param, \
- hardcode);
-
-#define XGE_GET_PARAM_FIFO_QUEUE_TTI(str_kenv, param, qindex, tindex, hardcode)\
- XGE_GET_PARAM(str_kenv, ((*dconfig).fifo.queue[qindex].tti[tindex]), \
- param, hardcode);
-
-#define XGE_GET_PARAM_RING(str_kenv, param, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).ring), param, hardcode);
-
-#define XGE_GET_PARAM_RING_QUEUE(str_kenv, param, qindex, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex]), param, \
- hardcode);
-
-#define XGE_GET_PARAM_RING_QUEUE_RTI(str_kenv, param, qindex, hardcode) \
- XGE_GET_PARAM(str_kenv, ((*dconfig).ring.queue[qindex].rti), param, \
- hardcode);
-
-/* Values to identify the requests from getinfo tool in ioctl */
-#define XGE_QUERY_STATS 1
-#define XGE_QUERY_PCICONF 2
-#define XGE_QUERY_DEVSTATS 3
-#define XGE_QUERY_DEVCONF 4
-#define XGE_READ_VERSION 5
-#define XGE_QUERY_SWSTATS 6
-#define XGE_QUERY_DRIVERSTATS 7
-#define XGE_SET_BUFFER_MODE_1 8
-#define XGE_SET_BUFFER_MODE_2 9
-#define XGE_SET_BUFFER_MODE_5 10
-#define XGE_QUERY_BUFFER_MODE 11
-
-#define XGE_OFFSET_OF_LAST_REG 0x3180
-
-#define VENDOR_ID_AMD 0x1022
-#define DEVICE_ID_8131_PCI_BRIDGE 0x7450
-
-typedef struct mbuf *mbuf_t;
-
-typedef enum xge_lables {
- xge_free_all = 0,
- xge_free_mutex = 1,
- xge_free_terminate_hal_driver = 2,
- xge_free_hal_device = 3,
- xge_free_pci_info = 4,
- xge_free_bar0 = 5,
- xge_free_bar0_resource = 6,
- xge_free_bar1 = 7,
- xge_free_bar1_resource = 8,
- xge_free_irq_resource = 9,
- xge_free_terminate_hal_device = 10,
- xge_free_media_interface = 11,
-} xge_lables_e;
-
-typedef enum xge_option {
- XGE_CHANGE_LRO = 0,
- XGE_SET_MTU = 1
-} xge_option_e;
-
-typedef enum xge_event_e {
- XGE_LL_EVENT_TRY_XMIT_AGAIN = XGE_LL_EVENT_BASE + 1,
- XGE_LL_EVENT_DEVICE_RESETTING = XGE_LL_EVENT_BASE + 2
-} xge_event_e;
-
-typedef struct xge_msi_info {
- u16 msi_control; /* MSI control 0x42 */
- u32 msi_lower_address; /* MSI lower address 0x44 */
- u32 msi_higher_address; /* MSI higher address 0x48 */
- u16 msi_data; /* MSI data */
-} xge_msi_info_t;
-
-typedef struct xge_driver_stats_t {
- /* ISR statistics */
- u64 isr_filter;
- u64 isr_line;
- u64 isr_msi;
-
- /* Tx statistics */
- u64 tx_calls;
- u64 tx_completions;
- u64 tx_desc_compl;
- u64 tx_tcode;
- u64 tx_defrag;
- u64 tx_no_txd;
- u64 tx_map_fail;
- u64 tx_max_frags;
- u64 tx_tso;
- u64 tx_posted;
- u64 tx_again;
- u64 tx_lock_fail;
-
- /* Rx statistics */
- u64 rx_completions;
- u64 rx_desc_compl;
- u64 rx_tcode;
- u64 rx_no_buf;
- u64 rx_map_fail;
-
- /* LRO statistics */
- u64 lro_uncapable;
- u64 lro_begin;
- u64 lro_end1;
- u64 lro_end2;
- u64 lro_end3;
- u64 lro_append;
- u64 lro_session_exceeded;
- u64 lro_close;
-} xge_driver_stats_t;
-
-typedef struct xge_lro_entry_t {
- SLIST_ENTRY(xge_lro_entry_t) next;
- struct mbuf *m_head;
- struct mbuf *m_tail;
- struct ip *lro_header_ip;
- int timestamp;
- u32 tsval;
- u32 tsecr;
- u32 source_ip;
- u32 dest_ip;
- u32 next_seq;
- u32 ack_seq;
- u32 len;
- u32 data_csum;
- u16 window;
- u16 source_port;
- u16 dest_port;
- u16 append_cnt;
- u16 mss;
-} xge_lro_entry_t;
-
-SLIST_HEAD(lro_head, xge_lro_entry_t);
-
-/* Adapter structure */
-typedef struct xge_lldev_t {
- device_t device; /* Device */
- struct ifnet *ifnetp; /* Interface ifnet structure */
- struct resource *irq; /* Resource structure for IRQ */
- void *irqhandle; /* IRQ handle */
- xge_pci_info_t *pdev; /* PCI info */
- xge_hal_device_t *devh; /* HAL: Device Handle */
- struct mtx mtx_drv; /* Mutex - Driver */
- struct mtx mtx_tx[XGE_FIFO_COUNT];
- /* Mutex - Tx */
- char mtx_name_drv[16];/*Mutex Name - Driver */
- char mtx_name_tx[16][XGE_FIFO_COUNT];
- /* Mutex Name - Tx */
- struct callout timer; /* Timer for polling */
- struct ifmedia media; /* In-kernel representation of a */
- /* single supported media type */
- xge_hal_channel_h fifo_channel[XGE_FIFO_COUNT];
- /* FIFO channels */
- xge_hal_channel_h ring_channel[XGE_RING_COUNT];
- /* Ring channels */
- bus_dma_tag_t dma_tag_tx; /* Tag for dtr dma mapping (Tx) */
- bus_dma_tag_t dma_tag_rx; /* Tag for dtr dma mapping (Rx) */
- bus_dmamap_t extra_dma_map; /* Extra DMA map for Rx */
- xge_msi_info_t msi_info; /* MSI info */
- xge_driver_stats_t driver_stats; /* Driver statistics */
- int initialized; /* Flag: Initialized or not */
- int all_multicast; /* All multicast flag */
- int macaddr_count; /* Multicast address count */
- int in_detach; /* To avoid ioctl during detach */
- int buffer_mode; /* Buffer Mode */
- int rxd_mbuf_cnt; /* Number of buffers used */
- int rxd_mbuf_len[5];/* Buffer lengths */
- int enabled_tso; /* Flag: TSO Enabled */
- int enabled_lro; /* Flag: LRO Enabled */
- int enabled_msi; /* Flag: MSI Enabled */
- int mtu; /* Interface MTU */
- int lro_num; /* Number of LRO sessions */
- struct lro_head lro_active; /* Active LRO sessions */
- struct lro_head lro_free; /* Free LRO sessions */
-} xge_lldev_t;
-
-/* Rx descriptor private structure */
-typedef struct xge_rx_priv_t {
- mbuf_t *bufferArray;
- xge_dma_mbuf_t dmainfo[5];
-} xge_rx_priv_t;
-
-/* Tx descriptor private structure */
-typedef struct xge_tx_priv_t {
- mbuf_t buffer;
- bus_dmamap_t dma_map;
-} xge_tx_priv_t;
-
-/* BAR0 Register */
-typedef struct xge_register_t {
- char option[2];
- u64 offset;
- u64 value;
-}xge_register_t;
-
-void xge_init_params(xge_hal_device_config_t *, device_t);
-void xge_init(void *);
-void xge_device_init(xge_lldev_t *, xge_hal_channel_reopen_e);
-void xge_device_stop(xge_lldev_t *, xge_hal_channel_reopen_e);
-void xge_stop(xge_lldev_t *);
-void xge_resources_free(device_t, xge_lables_e);
-void xge_callback_link_up(void *);
-void xge_callback_link_down(void *);
-void xge_callback_crit_err(void *, xge_hal_event_e, u64);
-void xge_callback_event(xge_queue_item_t *);
-int xge_ifmedia_change(struct ifnet *);
-void xge_ifmedia_status(struct ifnet *, struct ifmediareq *);
-int xge_ioctl(struct ifnet *, unsigned long, caddr_t);
-int xge_ioctl_stats(xge_lldev_t *, struct ifreq *);
-int xge_ioctl_registers(xge_lldev_t *, struct ifreq *);
-void xge_timer(void *);
-int xge_isr_filter(void *);
-void xge_isr_line(void *);
-void xge_isr_msi(void *);
-void xge_enable_msi(xge_lldev_t *);
-int xge_rx_open(int, xge_lldev_t *, xge_hal_channel_reopen_e);
-int xge_tx_open(xge_lldev_t *, xge_hal_channel_reopen_e);
-void xge_channel_close(xge_lldev_t *, xge_hal_channel_reopen_e);
-int xge_channel_open(xge_lldev_t *, xge_hal_channel_reopen_e);
-xge_hal_status_e xge_rx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
-xge_hal_status_e xge_tx_compl(xge_hal_channel_h, xge_hal_dtr_h, u8, void *);
-xge_hal_status_e xge_tx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
- int, void *, xge_hal_channel_reopen_e);
-xge_hal_status_e xge_rx_initial_replenish(xge_hal_channel_h, xge_hal_dtr_h,
- int, void *, xge_hal_channel_reopen_e);
-void xge_rx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
- void *, xge_hal_channel_reopen_e);
-void xge_tx_term(xge_hal_channel_h, xge_hal_dtr_h, xge_hal_dtr_state_e,
- void *, xge_hal_channel_reopen_e);
-void xge_set_mbuf_cflags(mbuf_t);
-void xge_send(struct ifnet *);
-static void inline xge_send_locked(struct ifnet *, int);
-int xge_get_buf(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *, int);
-int xge_ring_dtr_get(mbuf_t, xge_hal_channel_h, xge_hal_dtr_h, xge_lldev_t *,
- xge_rx_priv_t *);
-int xge_get_buf_3b_5b(xge_hal_dtr_h, xge_rx_priv_t *, xge_lldev_t *);
-void dmamap_cb(void *, bus_dma_segment_t *, int, int);
-void xge_reset(xge_lldev_t *);
-void xge_setmulti(xge_lldev_t *);
-void xge_enable_promisc(xge_lldev_t *);
-void xge_disable_promisc(xge_lldev_t *);
-int xge_change_mtu(xge_lldev_t *, int);
-void xge_buffer_mode_init(xge_lldev_t *, int);
-void xge_initialize(device_t, xge_hal_channel_reopen_e);
-void xge_terminate(device_t, xge_hal_channel_reopen_e);
-int xge_probe(device_t);
-int xge_driver_initialize(void);
-void xge_media_init(device_t);
-void xge_pci_space_save(device_t);
-void xge_pci_space_restore(device_t);
-void xge_msi_info_save(xge_lldev_t *);
-void xge_msi_info_restore(xge_lldev_t *);
-int xge_attach(device_t);
-int xge_interface_setup(device_t);
-int xge_detach(device_t);
-int xge_shutdown(device_t);
-void xge_mutex_init(xge_lldev_t *);
-void xge_mutex_destroy(xge_lldev_t *);
-void xge_print_info(xge_lldev_t *);
-void xge_lro_flush_sessions(xge_lldev_t *);
-void xge_rx_buffer_sizes_set(xge_lldev_t *, int, int);
-void xge_accumulate_large_rx(xge_lldev_t *, struct mbuf *, int,
- xge_rx_priv_t *);
-xge_hal_status_e xge_create_dma_tags(device_t);
-void xge_add_sysctl_handlers(xge_lldev_t *);
-void xge_confirm_changes(xge_lldev_t *, xge_option_e);
-static int xge_lro_accumulate(xge_lldev_t *, struct mbuf *);
-static void xge_lro_flush(xge_lldev_t *, xge_lro_entry_t *);
-
-#endif // _IF_XGE_H
-
diff --git a/sys/dev/nxge/include/build-version.h b/sys/dev/nxge/include/build-version.h
deleted file mode 100644
index 33fb24d257f4..000000000000
--- a/sys/dev/nxge/include/build-version.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef BUILD_VERSION_H
-#define BUILD_VERSION_H
-/* Do not edit! Automatically generated when released.*/
-/* $FreeBSD$ */
-#define GENERATED_BUILD_VERSION "11230"
-#endif /* BUILD_VERSION_H */
diff --git a/sys/dev/nxge/include/version.h b/sys/dev/nxge/include/version.h
deleted file mode 100644
index 28c85c2b4a14..000000000000
--- a/sys/dev/nxge/include/version.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef VERSION_H
-#define VERSION_H
-
-#include <dev/nxge/include/build-version.h>
-
-#define XGE_HAL_VERSION_MAJOR "2"
-#define XGE_HAL_VERSION_MINOR "0"
-#define XGE_HAL_VERSION_FIX "9"
-#define XGE_HAL_VERSION_BUILD GENERATED_BUILD_VERSION
-#define XGE_HAL_VERSION XGE_HAL_VERSION_MAJOR"."XGE_HAL_VERSION_MINOR"."\
- XGE_HAL_VERSION_FIX"."XGE_HAL_VERSION_BUILD
-#define XGE_HAL_DESC XGE_DRIVER_NAME" v."XGE_HAL_VERSION
-
-/* Link Layer versioning */
-#include <dev/nxge/xgell-version.h>
-
-#endif /* VERSION_H */
diff --git a/sys/dev/nxge/include/xge-debug.h b/sys/dev/nxge/include/xge-debug.h
deleted file mode 100644
index c76b299e6d3e..000000000000
--- a/sys/dev/nxge/include/xge-debug.h
+++ /dev/null
@@ -1,417 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_DEBUG_H
-#define XGE_DEBUG_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-
-__EXTERN_BEGIN_DECLS
-
-/*
- * __FUNCTION__ is, together with __PRETTY_FUNCTION__ or something similar,
- * a gcc extension. we'll have to #ifdef around that, and provide some
- * meaningful replacement for those, so to make some gcc versions happier
- */
-#ifndef __func__
-#ifdef __FUNCTION__
-#define __func__ __FUNCTION__
-#endif
-#endif
-
-
-#ifdef XGE_DEBUG_FP
-#define XGE_DEBUG_FP_DEVICE 0x1
-#define XGE_DEBUG_FP_CHANNEL 0x2
-#define XGE_DEBUG_FP_FIFO 0x4
-#define XGE_DEBUG_FP_RING 0x8
-#define XGE_DEBUG_FP_ALL 0xff
-#endif
-
-/**
- * enum xge_debug_level_e
- * @XGE_NONE: debug disabled
- * @XGE_ERR: all errors going to be logged out
- * @XGE_TRACE: all errors plus all kind of verbose tracing print outs
- * going to be logged out. Very noisy.
- *
- * This enumeration going to be used to switch between different
- * debug levels during runtime if DEBUG macro defined during
- * compilation. If DEBUG macro not defined than code will be
- * compiled out.
- */
-typedef enum xge_debug_level_e {
- XGE_NONE = 0,
- XGE_TRACE = 1,
- XGE_ERR = 2,
-} xge_debug_level_e;
-
-#define XGE_DEBUG_MODULE_MASK_DEF 0x30000030
-#define XGE_DEBUG_LEVEL_DEF XGE_ERR
-
-#if defined(XGE_DEBUG_TRACE_MASK) || defined(XGE_DEBUG_ERR_MASK)
-
-extern unsigned long *g_module_mask;
-extern int *g_level;
-
-#ifndef XGE_DEBUG_TRACE_MASK
-#define XGE_DEBUG_TRACE_MASK 0
-#endif
-
-#ifndef XGE_DEBUG_ERR_MASK
-#define XGE_DEBUG_ERR_MASK 0
-#endif
-
-/*
- * @XGE_COMPONENT_HAL_CONFIG: do debug for xge core config module
- * @XGE_COMPONENT_HAL_FIFO: do debug for xge core fifo module
- * @XGE_COMPONENT_HAL_RING: do debug for xge core ring module
- * @XGE_COMPONENT_HAL_CHANNEL: do debug for xge core channel module
- * @XGE_COMPONENT_HAL_DEVICE: do debug for xge core device module
- * @XGE_COMPONENT_HAL_DMQ: do debug for xge core DMQ module
- * @XGE_COMPONENT_HAL_UMQ: do debug for xge core UMQ module
- * @XGE_COMPONENT_HAL_SQ: do debug for xge core SQ module
- * @XGE_COMPONENT_HAL_SRQ: do debug for xge core SRQ module
- * @XGE_COMPONENT_HAL_CQRQ: do debug for xge core CRQ module
- * @XGE_COMPONENT_HAL_POOL: do debug for xge core memory pool module
- * @XGE_COMPONENT_HAL_BITMAP: do debug for xge core BITMAP module
- * @XGE_COMPONENT_CORE: do debug for xge KMA core module
- * @XGE_COMPONENT_OSDEP: do debug for xge KMA os dependent parts
- * @XGE_COMPONENT_LL: do debug for xge link layer module
- * @XGE_COMPONENT_ALL: activate debug for all modules with no exceptions
- *
- * This enumeration going to be used to distinguish modules
- * or libraries during compilation and runtime. Makefile must declare
- * XGE_DEBUG_MODULE_MASK macro and set it to proper value.
- */
-#define XGE_COMPONENT_HAL_CONFIG 0x00000001
-#define XGE_COMPONENT_HAL_FIFO 0x00000002
-#define XGE_COMPONENT_HAL_RING 0x00000004
-#define XGE_COMPONENT_HAL_CHANNEL 0x00000008
-#define XGE_COMPONENT_HAL_DEVICE 0x00000010
-#define XGE_COMPONENT_HAL_MM 0x00000020
-#define XGE_COMPONENT_HAL_QUEUE 0x00000040
-#define XGE_COMPONENT_HAL_INTERRUPT 0x00000080
-#define XGE_COMPONENT_HAL_STATS 0x00000100
-
- /* space for CORE_XXX */
-#define XGE_COMPONENT_OSDEP 0x10000000
-#define XGE_COMPONENT_LL 0x20000000
-#define XGE_COMPONENT_ALL 0xffffffff
-
-#ifndef XGE_DEBUG_MODULE_MASK
-#error "XGE_DEBUG_MODULE_MASK macro must be defined for DEBUG mode..."
-#endif
-
-#ifndef __GNUC__
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
- #define xge_trace_aux(fmt) xge_os_vatrace(g_xge_os_tracebuf, fmt)
-#else
- #define xge_trace_aux(fmt) xge_os_vaprintf(fmt)
-#endif
-
-/**
- * xge_debug
- * @level: level of debug verbosity.
- * @fmt: printf like format string
- *
- * Provides logging facilities. Can be customized on per-module
- * basis or/and with debug levels. Input parameters, except
- * module and level, are the same as posix printf. This function
- * may be compiled out if DEBUG macro was never defined.
- * See also: xge_debug_level_e{}.
- */
-#define xge_debug(module, level, fmt) { \
-if (((level >= XGE_TRACE && ((module & XGE_DEBUG_TRACE_MASK) == module)) || \
- (level >= XGE_ERR && ((module & XGE_DEBUG_ERR_MASK) == module))) && \
- level >= *g_level && module & *(unsigned int *)g_module_mask) { \
- xge_trace_aux(fmt); \
- } \
-}
-#else /* __GNUC__ */
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
- #define xge_trace_aux(fmt...) xge_os_trace(g_xge_os_tracebuf, fmt)
-#else
- #define xge_trace_aux(fmt...) xge_os_printf(fmt)
-#endif
-
-#define xge_debug(module, level, fmt...) { \
-if (((level >= XGE_TRACE && ((module & XGE_DEBUG_TRACE_MASK) == module)) || \
- (level >= XGE_ERR && ((module & XGE_DEBUG_ERR_MASK) == module))) && \
- level >= *g_level && module & *(unsigned int *)g_module_mask) { \
- xge_trace_aux(fmt); \
- } \
-}
-#endif /* __GNUC__ */
-
-#if (XGE_COMPONENT_HAL_STATS & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_stats(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_STATS;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_stats(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_STATS, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_stats(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_stats(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-/* Interrupt Related */
-#if (XGE_COMPONENT_HAL_INTERRUPT & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_interrupt(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_INTERRUPT;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_interrupt(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_INTERRUPT, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_interrupt(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_interrupt(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_QUEUE & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_queue(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_QUEUE;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_queue(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_QUEUE, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_queue(xge_debug_level_e level, char *fmt,
-...) {}
-#else /* __GNUC__ */
-#define xge_debug_queue(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_MM & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_mm(xge_debug_level_e level, char *fmt, ...)
-{
- u32 module = XGE_COMPONENT_HAL_MM;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_mm(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_MM, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_mm(xge_debug_level_e level, char *fmt, ...)
-{}
-#else /* __GNUC__ */
-#define xge_debug_mm(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_CONFIG & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_config(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_CONFIG;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_config(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_CONFIG, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_config(xge_debug_level_e level, char *fmt,
-...) {}
-#else /* __GNUC__ */
-#define xge_debug_config(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_FIFO & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_fifo(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_FIFO;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_fifo(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_FIFO, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_fifo(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_fifo(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_RING & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_ring(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_RING;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_ring(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_RING, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_ring(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_ring(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_CHANNEL & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_channel(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_CHANNEL;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_channel(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_CHANNEL, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_channel(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_channel(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_HAL_DEVICE & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_device(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_HAL_DEVICE;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_device(level, fmt...) \
- xge_debug(XGE_COMPONENT_HAL_DEVICE, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_device(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_device(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_OSDEP & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_osdep(xge_debug_level_e level, char *fmt, ...) {
- u32 module = XGE_COMPONENT_OSDEP;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_osdep(level, fmt...) \
- xge_debug(XGE_COMPONENT_OSDEP, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_osdep(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_osdep(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#if (XGE_COMPONENT_LL & XGE_DEBUG_MODULE_MASK)
-#ifndef __GNUC__
-static inline void xge_debug_ll(xge_debug_level_e level, char *fmt, ...)
-{
- u32 module = XGE_COMPONENT_LL;
- xge_debug(module, level, fmt);
-}
-#else /* __GNUC__ */
-#define xge_debug_ll(level, fmt...) \
- xge_debug(XGE_COMPONENT_LL, level, fmt)
-#endif /* __GNUC__ */
-#else
-#ifndef __GNUC__
-static inline void xge_debug_ll(xge_debug_level_e level, char *fmt, ...) {}
-#else /* __GNUC__ */
-#define xge_debug_ll(level, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-#else
-
-static inline void xge_debug_interrupt(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_stats(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_queue(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_mm(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_config(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_fifo(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_ring(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_channel(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_device(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_hal(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_osdep(xge_debug_level_e level, char *fmt, ...) {}
-static inline void xge_debug_ll(xge_debug_level_e level, char *fmt, ...) {}
-
-#endif /* end of XGE_DEBUG_*_MASK */
-
-#ifdef XGE_DEBUG_ASSERT
-
-/**
- * xge_assert
- * @test: C-condition to check
- * @fmt: printf like format string
- *
- * This function implements traditional assert. By default assertions
- * are enabled. It can be disabled by defining XGE_DEBUG_ASSERT macro in
- * compilation
- * time.
- */
-#define xge_assert(test) { \
- if (!(test)) xge_os_bug("bad cond: "#test" at %s:%d\n", \
- __FILE__, __LINE__); }
-#else
-#define xge_assert(test)
-#endif /* end of XGE_DEBUG_ASSERT */
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_DEBUG_H */
diff --git a/sys/dev/nxge/include/xge-defs.h b/sys/dev/nxge/include/xge-defs.h
deleted file mode 100644
index c69e13b4441a..000000000000
--- a/sys/dev/nxge/include/xge-defs.h
+++ /dev/null
@@ -1,143 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_DEFS_H
-#define XGE_DEFS_H
-
-#define XGE_PCI_VENDOR_ID 0x17D5
-#define XGE_PCI_DEVICE_ID_XENA_1 0x5731
-#define XGE_PCI_DEVICE_ID_XENA_2 0x5831
-#define XGE_PCI_DEVICE_ID_HERC_1 0x5732
-#define XGE_PCI_DEVICE_ID_HERC_2 0x5832
-#define XGE_PCI_DEVICE_ID_TITAN_1 0x5733
-#define XGE_PCI_DEVICE_ID_TITAN_2 0x5833
-
-#define XGE_DRIVER_NAME "Xge driver"
-#define XGE_DRIVER_VENDOR "Neterion, Inc"
-#define XGE_CHIP_FAMILY "Xframe"
-#define XGE_SUPPORTED_MEDIA_0 "Fiber"
-
-#include <dev/nxge/include/version.h>
-
-#if defined(__cplusplus)
-#define __EXTERN_BEGIN_DECLS extern "C" {
-#define __EXTERN_END_DECLS }
-#else
-#define __EXTERN_BEGIN_DECLS
-#define __EXTERN_END_DECLS
-#endif
-
-__EXTERN_BEGIN_DECLS
-
-/*---------------------------- DMA attributes ------------------------------*/
-/* Used in xge_os_dma_malloc() and xge_os_dma_map() */
-/*---------------------------- DMA attributes ------------------------------*/
-
-/* XGE_OS_DMA_REQUIRES_SYNC - should be defined or
- NOT defined in the Makefile */
-#define XGE_OS_DMA_CACHELINE_ALIGNED 0x1
-/* Either STREAMING or CONSISTENT should be used.
- The combination of both or none is invalid */
-#define XGE_OS_DMA_STREAMING 0x2
-#define XGE_OS_DMA_CONSISTENT 0x4
-#define XGE_OS_SPRINTF_STRLEN 64
-
-/*---------------------------- common stuffs -------------------------------*/
-
-#define XGE_OS_LLXFMT "%llx"
-#define XGE_OS_NEWLINE "\n"
-#ifdef XGE_OS_MEMORY_CHECK
-typedef struct {
- void *ptr;
- int size;
- char *file;
- int line;
-} xge_os_malloc_t;
-
-#define XGE_OS_MALLOC_CNT_MAX 64*1024
-extern xge_os_malloc_t g_malloc_arr[XGE_OS_MALLOC_CNT_MAX];
-extern int g_malloc_cnt;
-
-#define XGE_OS_MEMORY_CHECK_MALLOC(_vaddr, _size, _file, _line) { \
- if (_vaddr) { \
- int index_mem_chk; \
- for (index_mem_chk=0; index_mem_chk < g_malloc_cnt; index_mem_chk++) { \
- if (g_malloc_arr[index_mem_chk].ptr == NULL) { \
- break; \
- } \
- } \
- if (index_mem_chk == g_malloc_cnt) { \
- g_malloc_cnt++; \
- if (g_malloc_cnt >= XGE_OS_MALLOC_CNT_MAX) { \
- xge_os_bug("g_malloc_cnt exceed %d", \
- XGE_OS_MALLOC_CNT_MAX); \
- } \
- } \
- g_malloc_arr[index_mem_chk].ptr = _vaddr; \
- g_malloc_arr[index_mem_chk].size = _size; \
- g_malloc_arr[index_mem_chk].file = _file; \
- g_malloc_arr[index_mem_chk].line = _line; \
- for (index_mem_chk=0; index_mem_chk<_size; index_mem_chk++) { \
- *((char *)_vaddr+index_mem_chk) = 0x5a; \
- } \
- } \
-}
-
-#define XGE_OS_MEMORY_CHECK_FREE(_vaddr, _check_size) { \
- int index_mem_chk; \
- for (index_mem_chk=0; index_mem_chk < XGE_OS_MALLOC_CNT_MAX; index_mem_chk++) { \
- if (g_malloc_arr[index_mem_chk].ptr == _vaddr) { \
- g_malloc_arr[index_mem_chk].ptr = NULL; \
- if(_check_size && g_malloc_arr[index_mem_chk].size!=_check_size) { \
- xge_os_printf("OSPAL: freeing with wrong " \
- "size %d! allocated at %s:%d:"XGE_OS_LLXFMT":%d", \
- (int)_check_size, \
- g_malloc_arr[index_mem_chk].file, \
- g_malloc_arr[index_mem_chk].line, \
- (unsigned long long)(ulong_t) \
- g_malloc_arr[index_mem_chk].ptr, \
- g_malloc_arr[index_mem_chk].size); \
- } \
- break; \
- } \
- } \
- if (index_mem_chk == XGE_OS_MALLOC_CNT_MAX) { \
- xge_os_printf("OSPAL: ptr "XGE_OS_LLXFMT" not found!", \
- (unsigned long long)(ulong_t)_vaddr); \
- } \
-}
-#else
-#define XGE_OS_MEMORY_CHECK_MALLOC(ptr, size, file, line)
-#define XGE_OS_MEMORY_CHECK_FREE(vaddr, check_size)
-#endif
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_DEFS_H */
diff --git a/sys/dev/nxge/include/xge-list.h b/sys/dev/nxge/include/xge-list.h
deleted file mode 100644
index a7a9247d8c3f..000000000000
--- a/sys/dev/nxge/include/xge-list.h
+++ /dev/null
@@ -1,197 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_LIST_H
-#define XGE_LIST_H
-
-#include <dev/nxge/include/xge-debug.h>
-
-__EXTERN_BEGIN_DECLS
-
-/**
- * struct xge_list_t - List item.
- * @prev: Previous list item.
- * @next: Next list item.
- *
- * Item of a bi-directional linked list.
- */
-typedef struct xge_list_t {
- struct xge_list_t* prev;
- struct xge_list_t* next;
-} xge_list_t;
-
-/**
- * xge_list_init - Initialize linked list.
- * header: first element of the list (head)
- *
- * Initialize linked list.
- * See also: xge_list_t{}.
- */
-static inline void xge_list_init (xge_list_t *header)
-{
- header->next = header;
- header->prev = header;
-}
-
-/**
- * xge_list_is_empty - Is the list empty?
- * header: first element of the list (head)
- *
- * Determine whether the bi-directional list is empty. Return '1' in
- * case of 'empty'.
- * See also: xge_list_t{}.
- */
-static inline int xge_list_is_empty(xge_list_t *header)
-{
- xge_assert(header != NULL);
-
- return header->next == header;
-}
-
-/**
- * xge_list_first_get - Return the first item from the linked list.
- * header: first element of the list (head)
- *
- * Returns the next item from the header.
- * Returns NULL if the next item is header itself
- * See also: xge_list_remove(), xge_list_insert(), xge_list_t{}.
- */
-static inline xge_list_t *xge_list_first_get(xge_list_t *header)
-{
- xge_assert(header != NULL);
- xge_assert(header->next != NULL);
- xge_assert(header->prev != NULL);
-
- if(header->next == header)
- return NULL;
- else
- return header->next;
-}
-
-/**
- * xge_list_remove - Remove the specified item from the linked list.
- * item: element of the list
- *
- * Remove item from a list.
- * See also: xge_list_insert(), xge_list_t{}.
- */
-static inline void xge_list_remove(xge_list_t *item)
-{
- xge_assert(item != NULL);
- xge_assert(item->next != NULL);
- xge_assert(item->prev != NULL);
-
- item->next->prev = item->prev;
- item->prev->next = item->next;
-#ifdef XGE_DEBUG_ASSERT
- item->next = item->prev = NULL;
-#endif
-}
-
-/**
- * xge_list_insert - Insert a new item after the specified item.
- * new_item: new element of the list
- * prev_item: element of the list after which the new element is
- * inserted
- *
- * Insert new item (new_item) after given item (prev_item).
- * See also: xge_list_remove(), xge_list_insert_before(), xge_list_t{}.
- */
-static inline void xge_list_insert (xge_list_t *new_item,
- xge_list_t *prev_item)
-{
- xge_assert(new_item != NULL);
- xge_assert(prev_item != NULL);
- xge_assert(prev_item->next != NULL);
-
- new_item->next = prev_item->next;
- new_item->prev = prev_item;
- prev_item->next->prev = new_item;
- prev_item->next = new_item;
-}
-
-/**
- * xge_list_insert_before - Insert a new item before the specified item.
- * new_item: new element of the list
- * next_item: element of the list after which the new element is inserted
- *
- * Insert new item (new_item) before given item (next_item).
- */
-static inline void xge_list_insert_before (xge_list_t *new_item,
- xge_list_t *next_item)
-{
- xge_assert(new_item != NULL);
- xge_assert(next_item != NULL);
- xge_assert(next_item->next != NULL);
-
- new_item->next = next_item;
- new_item->prev = next_item->prev;
- next_item->prev->next = new_item;
- next_item->prev = new_item;
-}
-
-#define xge_list_for_each(_p, _h) \
- for (_p = (_h)->next, xge_os_prefetch(_p->next); _p != (_h); \
- _p = _p->next, xge_os_prefetch(_p->next))
-
-#define xge_list_for_each_safe(_p, _n, _h) \
- for (_p = (_h)->next, _n = _p->next; _p != (_h); \
- _p = _n, _n = _p->next)
-
-#ifdef __GNUC__
-/**
- * xge_container_of - Given a member, return the containing structure.
- * @ptr: the pointer to the member.
- * @type: the type of the container struct this is embedded in.
- * @member: the name of the member within the struct.
- *
- * Cast a member of a structure out to the containing structure.
- */
-#define xge_container_of(ptr, type, member) ({ \
- __typeof( ((type *)0)->member ) *__mptr = (ptr); \
- (type *)(void *)( (char *)__mptr - ((size_t) &((type *)0)->member) );})
-#else
-/* type unsafe version */
-#define xge_container_of(ptr, type, member) \
- ((type*)(void*)((char*)(ptr) - ((size_t) &((type *)0)->member)))
-#endif
-
-/**
- * xge_offsetof - Offset of the member in the containing structure.
- * @t: struct name.
- * @m: the name of the member within the struct.
- *
- * Return the offset of the member @m in the structure @t.
- */
-#define xge_offsetof(t, m) ((size_t) (&((t *)0)->m))
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_LIST_H */
diff --git a/sys/dev/nxge/include/xge-os-pal.h b/sys/dev/nxge/include/xge-os-pal.h
deleted file mode 100644
index 3d33595fccda..000000000000
--- a/sys/dev/nxge/include/xge-os-pal.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_OS_PAL_H
-#define XGE_OS_PAL_H
-
-#include <dev/nxge/include/xge-defs.h>
-
-__EXTERN_BEGIN_DECLS
-
-/*--------------------------- platform switch ------------------------------*/
-
-/* platform specific header */
-#include <dev/nxge/xge-osdep.h>
-
-#if !defined(XGE_OS_PLATFORM_64BIT) && !defined(XGE_OS_PLATFORM_32BIT)
-#error "either 32bit or 64bit switch must be defined!"
-#endif
-
-#if !defined(XGE_OS_HOST_BIG_ENDIAN) && !defined(XGE_OS_HOST_LITTLE_ENDIAN)
-#error "either little endian or big endian switch must be defined!"
-#endif
-
-#if defined(XGE_OS_PLATFORM_64BIT)
-#define XGE_OS_MEMORY_DEADCODE_PAT 0x5a5a5a5a5a5a5a5a
-#else
-#define XGE_OS_MEMORY_DEADCODE_PAT 0x5a5a5a5a
-#endif
-
-#define XGE_OS_TRACE_MSGBUF_MAX 512
-typedef struct xge_os_tracebuf_t {
- int wrapped_once; /* circular buffer been wrapped */
- int timestamp; /* whether timestamps are enabled */
- volatile int offset; /* offset within the tracebuf */
- int size; /* total size of trace buffer */
- char msg[XGE_OS_TRACE_MSGBUF_MAX]; /* each individual buffer */
- int msgbuf_max; /* actual size of msg buffer */
- char *data; /* pointer to data buffer */
-} xge_os_tracebuf_t;
-extern xge_os_tracebuf_t *g_xge_os_tracebuf;
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
-extern xge_os_tracebuf_t *g_xge_os_tracebuf;
-extern char *dmesg_start;
-
-/* Calculate the size of the msg and copy it into the global buffer */
-#define __xge_trace(tb) { \
- int msgsize = xge_os_strlen(tb->msg) + 2; \
- int offset = tb->offset; \
- if (msgsize != 2 && msgsize < tb->msgbuf_max) { \
- int leftsize = tb->size - offset; \
- if ((msgsize + tb->msgbuf_max) > leftsize) { \
- xge_os_memzero(tb->data + offset, leftsize); \
- offset = 0; \
- tb->wrapped_once = 1; \
- } \
- xge_os_memcpy(tb->data + offset, tb->msg, msgsize-1); \
- *(tb->data + offset + msgsize-1) = '\n'; \
- *(tb->data + offset + msgsize) = 0; \
- offset += msgsize; \
- tb->offset = offset; \
- dmesg_start = tb->data + offset; \
- *tb->msg = 0; \
- } \
-}
-
-#define xge_os_vatrace(tb, fmt) { \
- if (tb != NULL) { \
- char *_p = tb->msg; \
- if (tb->timestamp) { \
- xge_os_timestamp(tb->msg); \
- _p = tb->msg + xge_os_strlen(tb->msg); \
- } \
- xge_os_vasprintf(_p, fmt); \
- __xge_trace(tb); \
- } \
-}
-
-#ifdef __GNUC__
-#define xge_os_trace(tb, fmt...) { \
- if (tb != NULL) { \
- if (tb->timestamp) { \
- xge_os_timestamp(tb->msg); \
- } \
- xge_os_sprintf(tb->msg + xge_os_strlen(tb->msg), fmt); \
- __xge_trace(tb); \
- } \
-}
-#endif /* __GNUC__ */
-
-#else
-#define xge_os_vatrace(tb, fmt)
-#ifdef __GNUC__
-#define xge_os_trace(tb, fmt...)
-#endif /* __GNUC__ */
-#endif
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_OS_PAL_H */
diff --git a/sys/dev/nxge/include/xge-queue.h b/sys/dev/nxge/include/xge-queue.h
deleted file mode 100644
index a25ce6a90afb..000000000000
--- a/sys/dev/nxge/include/xge-queue.h
+++ /dev/null
@@ -1,179 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_QUEUE_H
-#define XGE_QUEUE_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-defs.h>
-#include <dev/nxge/include/xge-list.h>
-#include <dev/nxge/include/xgehal-event.h>
-
-__EXTERN_BEGIN_DECLS
-
-#define XGE_QUEUE_BUF_SIZE 0x1000
-#define XGE_DEFAULT_EVENT_MAX_DATA_SIZE 16
-
-/**
- * enum xge_queue_status_e - Enumerates return codes of the xge_queue
- * manipulation APIs.
- * @XGE_QUEUE_IS_FULL: Queue is full, need to grow.
- * @XGE_QUEUE_IS_EMPTY: Queue is empty.
- * @XGE_QUEUE_OUT_OF_MEMORY: Out of memory.
- * @XGE_QUEUE_NOT_ENOUGH_SPACE: Exceeded specified event size,
- * see xge_queue_consume().
- * @XGE_QUEUE_OK: Neither one of the codes listed above.
- *
- * Enumerates return codes of xge_queue_consume()
- * and xge_queue_produce() APIs.
- */
-typedef enum xge_queue_status_e {
- XGE_QUEUE_OK = 0,
- XGE_QUEUE_IS_FULL = 1,
- XGE_QUEUE_IS_EMPTY = 2,
- XGE_QUEUE_OUT_OF_MEMORY = 3,
- XGE_QUEUE_NOT_ENOUGH_SPACE = 4
-} xge_queue_status_e;
-
-typedef void* xge_queue_h;
-
-/**
- * struct xge_queue_item_t - Queue item.
- * @item: List item. Note that the queue is "built" on top of
- * the bi-directional linked list.
- * @event_type: Event type. Includes (but is not restricted to)
- * one of the xge_hal_event_e{} enumerated types.
- * @data_size: Size of the enqueued user data. Note that xge_queue_t
- * items are allowed to have variable sizes.
- * @is_critical: For critical events, e.g. ECC.
- * @context: Opaque (void*) "context", for instance event producer object.
- *
- * Item of the xge_queue_t{}. The queue is protected
- * in terms of multi-threaded concurrent access.
- * See also: xge_queue_t{}.
- */
-typedef struct xge_queue_item_t {
- xge_list_t item;
- xge_hal_event_e event_type;
- int data_size;
- int is_critical;
- void *context;
-} xge_queue_item_t;
-
-/**
- * function xge_queued_f - Item-enqueued callback.
- * @data: Per-queue context independent of the event. E.g., device handle.
- * @event_type: HAL or ULD-defined event type. Note that HAL own
- * events are enumerated by xge_hal_event_e{}.
- *
- * Per-queue optional callback. If not NULL, called by HAL each
- * time an event gets added to the queue.
- */
-typedef void (*xge_queued_f) (void *data, int event_type);
-
-/**
- * struct xge_queue_t - Protected dynamic queue of variable-size items.
- * @start_ptr: Points to the start of the queue.
- * @end_ptr: Points to the end of the queue.
- * @head_ptr: Points to the head of the queue. It gets changed during queue
- * produce/consume operations.
- * @tail_ptr: Points to the tail of the queue. It gets changed during queue
- * produce/consume operations.
- * @lock: Lock for queue operations(syncronization purpose).
- * @pages_initial:Number of pages to be initially allocated at the time
- * of queue creation.
- * @pages_max: Max number of pages that can be allocated in the queue.
- * @pages_current: Number of pages currently allocated
- * @list_head: Points to the list of queue elements that are produced, but yet
- * to be consumed.
- * @signal_callback: (TODO)
- * @pdev: PCI device handle
- * @irqh: PCI device IRQ handle.
- * @queued_func: Optional callback function to be called each time a new
- * item is added to the queue.
- * @queued_data: Arguments to the callback function.
- * @has_critical_event: Non-zero, if the queue contains a critical event,
- * see xge_hal_event_e{}.
- * Protected dynamically growing queue. The queue is used to support multiple
- * producer/consumer type scenarios. The queue is a strict FIFO: first come
- * first served.
- * Queue users may "produce" (see xge_queue_produce()) and "consume"
- * (see xge_queue_consume()) items (a.k.a. events) variable sizes.
- * See also: xge_queue_item_t{}.
- */
-typedef struct xge_queue_t {
- void *start_ptr;
- void *end_ptr;
- void *head_ptr;
- void *tail_ptr;
- spinlock_t lock;
- unsigned int pages_initial;
- unsigned int pages_max;
- unsigned int pages_current;
- xge_list_t list_head;
- pci_dev_h pdev;
- pci_irq_h irqh;
- xge_queued_f queued_func;
- void *queued_data;
- int has_critical_event;
-} xge_queue_t;
-
-/* ========================== PUBLIC API ================================= */
-
-xge_queue_h xge_queue_create(pci_dev_h pdev, pci_irq_h irqh, int pages_initial,
- int pages_max, xge_queued_f queued_func, void *queued_data);
-
-void xge_queue_destroy(xge_queue_h queueh);
-
-void* xge_queue_item_data(xge_queue_item_t *item);
-
-xge_queue_status_e
-xge_queue_produce(xge_queue_h queueh, int event_type, void *context,
- int is_critical, const int data_size, void *data);
-
-static inline xge_queue_status_e
-xge_queue_produce_context(xge_queue_h queueh, int event_type, void *context) {
- return xge_queue_produce(queueh, event_type, context, 0, 0, 0);
-}
-
-xge_queue_status_e xge_queue_consume(xge_queue_h queueh, int data_max_size,
- xge_queue_item_t *item);
-
-void xge_queue_flush(xge_queue_h queueh);
-
-/* ========================== PRIVATE API ================================= */
-
-xge_queue_status_e __io_queue_grow(xge_queue_h qh);
-
-int __queue_get_reset_critical (xge_queue_h qh);
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_QUEUE_H */
diff --git a/sys/dev/nxge/include/xgehal-channel.h b/sys/dev/nxge/include/xgehal-channel.h
deleted file mode 100644
index a5b9fab7f147..000000000000
--- a/sys/dev/nxge/include/xgehal-channel.h
+++ /dev/null
@@ -1,492 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_CHANNEL_H
-#define XGE_HAL_CHANNEL_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-list.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-stats.h>
-
-__EXTERN_BEGIN_DECLS
-
-/**
- * enum xge_hal_channel_type_e - Enumerated channel types.
- * @XGE_HAL_CHANNEL_TYPE_FIFO: fifo.
- * @XGE_HAL_CHANNEL_TYPE_RING: ring.
- * @XGE_HAL_CHANNEL_TYPE_SEND_QUEUE: Send Queue
- * @XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE: Receive Queue
- * @XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE: Receive queue completion queue
- * @XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE: Up message queue
- * @XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE: Down message queue
- * @XGE_HAL_CHANNEL_TYPE_MAX: Maximum number of HAL-supported
- * (and recognized) channel types. Currently: two.
- *
- * Enumerated channel types. Currently there are only two link-layer
- * channels - Xframe fifo and Xframe ring. In the future the list will grow.
- */
-typedef enum xge_hal_channel_type_e {
- XGE_HAL_CHANNEL_TYPE_FIFO,
- XGE_HAL_CHANNEL_TYPE_RING,
- XGE_HAL_CHANNEL_TYPE_SEND_QUEUE,
- XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE,
- XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE,
- XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE,
- XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE,
- XGE_HAL_CHANNEL_TYPE_MAX
-} xge_hal_channel_type_e;
-
-/**
- * enum xge_hal_channel_flag_e - Channel flags.
- * @XGE_HAL_CHANNEL_FLAG_NONE: zero (nil) flag.
- * @XGE_HAL_CHANNEL_FLAG_USE_TX_LOCK: use lock when posting transmit
- * descriptor.
- * @XGE_HAL_CHANNEL_FLAG_FREE_RXD: to-be-defined.
- *
- * Channel opening flags. Reserved for future usage.
- */
-typedef enum xge_hal_channel_flag_e {
- XGE_HAL_CHANNEL_FLAG_NONE = 0x0,
- XGE_HAL_CHANNEL_FLAG_USE_TX_LOCK = 0x1,
- XGE_HAL_CHANNEL_FLAG_FREE_RXD = 0x2
-} xge_hal_channel_flag_e;
-
-/**
- * enum xge_hal_dtr_state_e - Descriptor (DTR) state.
- * @XGE_HAL_DTR_STATE_NONE: Invalid state.
- * @XGE_HAL_DTR_STATE_AVAIL: Descriptor is available for reservation
- * (via xge_hal_fifo_dtr_reserve(), xge_hal_ring_dtr_reserve(), etc.).
- * @XGE_HAL_DTR_STATE_POSTED: Descriptor is posted for processing by the
- * device.
- * @XGE_HAL_DTR_STATE_FREED: Descriptor is free and can be reused for
- * filling-in and posting later.
- *
- * Xframe/HAL descriptor states. For more on descriptor states and transitions
- * please refer to ch_intern{}.
- *
- * See also: xge_hal_channel_dtr_term_f{}.
- */
-typedef enum xge_hal_dtr_state_e {
- XGE_HAL_DTR_STATE_NONE = 0,
- XGE_HAL_DTR_STATE_AVAIL = 1,
- XGE_HAL_DTR_STATE_POSTED = 2,
- XGE_HAL_DTR_STATE_FREED = 3
-} xge_hal_dtr_state_e;
-
-/**
- * enum xge_hal_channel_reopen_e - Channel open, close, or reopen option.
- * @XGE_HAL_CHANNEL_RESET_ONLY: Do not (de)allocate channel; used with
- * xge_hal_channel_open(), xge_hal_channel_close().
- * @XGE_HAL_CHANNEL_OC_NORMAL: Do (de)allocate channel; used with
- * xge_hal_channel_open(), xge_hal_channel_close().
- *
- * Enumerates options used with channel open and close operations.
- * The @XGE_HAL_CHANNEL_RESET_ONLY can be used when resetting the device;
- * in this case there is actually no need to free and then again malloc
- * the memory (including DMA-able memory) used for channel operation.
- */
-typedef enum xge_hal_channel_reopen_e {
- XGE_HAL_CHANNEL_RESET_ONLY = 1,
- XGE_HAL_CHANNEL_OC_NORMAL = 2
-} xge_hal_channel_reopen_e;
-
-/**
- * function xge_hal_channel_callback_f - Channel callback.
- * @channelh: Channel "containing" 1 or more completed descriptors.
- * @dtrh: First completed descriptor.
- * @t_code: Transfer code, as per Xframe User Guide.
- * Returned by HAL.
- * @host_control: Opaque 64bit data stored by ULD inside the Xframe
- * descriptor prior to posting the latter on the channel
- * via xge_hal_fifo_dtr_post() or xge_hal_ring_dtr_post().
- * The @host_control is returned as is to the ULD with each
- * completed descriptor.
- * @userdata: Opaque per-channel data specified at channel open
- * time, via xge_hal_channel_open().
- *
- * Channel completion callback (type declaration). A single per-channel
- * callback is specified at channel open time, via
- * xge_hal_channel_open().
- * Typically gets called as part of the processing of the Interrupt
- * Service Routine.
- *
- * Channel callback gets called by HAL if, and only if, there is at least
- * one new completion on a given ring or fifo channel. Upon processing the
- * first @dtrh ULD is _supposed_ to continue consuming completions
- * using one of the following HAL APIs:
- * - xge_hal_fifo_dtr_next_completed()
- * or
- * - xge_hal_ring_dtr_next_completed().
- *
- * Note that failure to process new completions in a timely fashion
- * leads to XGE_HAL_INF_OUT_OF_DESCRIPTORS condition.
- *
- * Non-zero @t_code means failure to process (transmit or receive, depending
- * on the channel type) the descriptor.
- *
- * In the "transmit" case the failure could happen, for instance, when the
- * link is down, in which case Xframe completes the descriptor because it
- * is not able to send the data out.
- *
- * For details please refer to Xframe User Guide.
- *
- * See also: xge_hal_fifo_dtr_next_completed(),
- * xge_hal_ring_dtr_next_completed(), xge_hal_channel_dtr_term_f{}.
- */
-typedef xge_hal_status_e (*xge_hal_channel_callback_f)
- (xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- u8 t_code, void *userdata);
-
-/**
- * function xge_hal_channel_dtr_init_f - Initialize descriptor callback.
- * @channelh: Channel "containing" the @dtrh descriptor.
- * @dtrh: Descriptor.
- * @index: Index of the descriptor in the channel's set of descriptors.
- * @userdata: Per-channel user data (a.k.a. context) specified at
- * channel open time, via xge_hal_channel_open().
- * @reopen: See xge_hal_channel_reopen_e{}.
- *
- * Initialize descriptor callback. Unless NULL is specified in the
- * xge_hal_channel_attr_t{} structure passed to xge_hal_channel_open()),
- * HAL invokes the callback as part of the xge_hal_channel_open()
- * implementation.
- * For the ring type of channel the ULD is expected to fill in this descriptor
- * with buffer(s) and control information.
- * For the fifo type of channel the ULD could use the callback to
- * pre-set DMA mappings and/or alignment buffers.
- *
- * See also: xge_hal_channel_attr_t{}, xge_hal_channel_dtr_term_f{}.
- */
-typedef xge_hal_status_e (*xge_hal_channel_dtr_init_f)
- (xge_hal_channel_h channelh,
- xge_hal_dtr_h dtrh,
- int index,
- void *userdata,
- xge_hal_channel_reopen_e reopen);
-
-/**
- * function xge_hal_channel_dtr_term_f - Terminate descriptor callback.
- * @channelh: Channel "containing" the @dtrh descriptor.
- * @dtrh: First completed descriptor.
- * @state: One of the xge_hal_dtr_state_e{} enumerated states.
- * @userdata: Per-channel user data (a.k.a. context) specified at
- * channel open time, via xge_hal_channel_open().
- * @reopen: See xge_hal_channel_reopen_e{}.
- *
- * Terminate descriptor callback. Unless NULL is specified in the
- * xge_hal_channel_attr_t{} structure passed to xge_hal_channel_open()),
- * HAL invokes the callback as part of closing the corresponding
- * channel, prior to de-allocating the channel and associated data
- * structures (including descriptors).
- * ULD should utilize the callback to (for instance) unmap
- * and free DMA data buffers associated with the posted (state =
- * XGE_HAL_DTR_STATE_POSTED) descriptors,
- * as well as other relevant cleanup functions.
- *
- * See also: xge_hal_channel_attr_t{}, xge_hal_channel_dtr_init_f{}.
- */
-typedef void (*xge_hal_channel_dtr_term_f) (xge_hal_channel_h channelh,
- xge_hal_dtr_h dtrh,
- xge_hal_dtr_state_e state,
- void *userdata,
- xge_hal_channel_reopen_e reopen);
-
-
-/**
- * struct xge_hal_channel_attr_t - Channel open "template".
- * @type: xge_hal_channel_type_e channel type.
- * @vp_id: Virtual path id
- * @post_qid: Queue ID to post descriptors. For the link layer this
- * number should be in the 0..7 range.
- * @compl_qid: Completion queue ID. Must be set to zero for the link layer.
- * @callback: Channel completion callback. HAL invokes the callback when there
- * are new completions on that channel. In many implementations
- * the @callback executes in the hw interrupt context.
- * @dtr_init: Channel's descriptor-initialize callback.
- * See xge_hal_channel_dtr_init_f{}.
- * If not NULL, HAL invokes the callback when opening
- * the channel via xge_hal_channel_open().
- * @dtr_term: Channel's descriptor-terminate callback. If not NULL,
- * HAL invokes the callback when closing the corresponding channel.
- * See also xge_hal_channel_dtr_term_f{}.
- * @userdata: User-defined "context" of _that_ channel. Passed back to the
- * user as one of the @callback, @dtr_init, and @dtr_term arguments.
- * @per_dtr_space: If specified (i.e., greater than zero): extra space
- * reserved by HAL per each transmit or receive (depending on the
- * channel type) descriptor. Can be used to store,
- * and retrieve on completion, information specific
- * to the upper-layer.
- * @flags: xge_hal_channel_flag_e enumerated flags.
- *
- * Channel open "template". User fills the structure with channel
- * attributes and passes it to xge_hal_channel_open().
- * Usage: See ex_open{}.
- */
-typedef struct xge_hal_channel_attr_t {
- xge_hal_channel_type_e type;
- int post_qid;
- int compl_qid;
- xge_hal_channel_callback_f callback;
- xge_hal_channel_dtr_init_f dtr_init;
- xge_hal_channel_dtr_term_f dtr_term;
- void *userdata;
- int per_dtr_space;
- xge_hal_channel_flag_e flags;
-} xge_hal_channel_attr_t;
-
-/*
- * xge_hal_channel_t
- * ---------- complete/free section ---------------
- * @item: List item; used to maintain a list of open channels.
- * @callback: Channel completion callback. See
- * xge_hal_channel_callback_f.
- * @compl_index: Completion index. At any point in time points on the
- * position in the channel, which will contain next
- * to-be-completed descriptor.
- * @length: Channel length. Currently allocated number of descriptors.
- * The channel length "grows" when more descriptors get allocated.
- * See _hal_mempool_grow.
- * @free_arr: Free array. Contains completed descriptors that were freed
- * (i.e., handed over back to HAL) by ULD.
- * See xge_hal_fifo_dtr_free(), xge_hal_ring_dtr_free().
- * @free_lock: Lock to protect @free_arr.
- * ----------- reserve/post section ---------------
- * @post_index: Post index. At any point in time points on the
- * position in the channel, which'll contain next to-be-posted
- * descriptor.
- * @post_lock: Lock to serialize multiple concurrent "posters" of descriptors
- * on the given channel.
- * @reserve_arr: Reserve array. Contains descriptors that can be reserved
- * by ULD for the subsequent send or receive operation.
- * See xge_hal_fifo_dtr_reserve(),
- * xge_hal_ring_dtr_reserve().
- * @reserve_length: Length of the @reserve_arr. The length dynamically
- * changes: it decrements each time descriptor is reserved.
- * @reserve_lock: Lock to serialize multiple concurrent threads accessing
- * @reserve_arr.
- * @reserve_threshold: Reserve threshold. Minimal number of free descriptors
- * that ought to be preserved in the channel at all times.
- * Note that @reserve_threshold >= 0 &&
- * @reserve_threshold < @reserve_max.
- * ------------ common section --------------------
- * @devh: Device handle. HAL device object that contains _this_ channel.
- * @dmah: Channel's DMA address. Used to synchronize (to/from device)
- * descriptors.
- * @regh0: Base address of the device memory space handle. Copied from HAL device
- * at channel open time.
- * @regh1: Base address of the device memory space handle. Copied from HAL device
- * at channel open time.
- * @userdata: Per-channel opaque (void*) user-defined context, which may be
- * upper-layer driver object, ULP connection, etc.
- * Once channel is open, @userdata is passed back to user via
- * xge_hal_channel_callback_f.
- * @work_arr: Work array. Contains descriptors posted to the channel.
- * Note that at any point in time @work_arr contains 3 types of
- * descriptors:
- * 1) posted but not yet consumed by Xframe device;
- * 2) consumed but not yet completed;
- * 3) completed but not yet freed
- * (via xge_hal_fifo_dtr_free() or xge_hal_ring_dtr_free())
- * @saved_arr: Array used internally to optimize channel full-duplex
- * operation.
- * @stats: Channel statistcis. Includes HAL internal counters, including
- * for instance, number of times out-of-descriptors
- * (see XGE_HAL_INF_OUT_OF_DESCRIPTORS) condition happened.
- * ------------- "slow" section ------------------
- * @type: Channel type. See xge_hal_channel_type_e{}.
- * @vp_id: Virtual path id
- * @post_qid: Identifies Xframe queue used for posting descriptors.
- * @compl_qid: Identifies Xframe completion queue.
- * @flags: Channel flags. See xge_hal_channel_flag_e{}.
- * @reserve_initial: Initial number of descriptors allocated at channel open
- * time (see xge_hal_channel_open()). The number of
- * channel descriptors can grow at runtime
- * up to @reserve_max value.
- * @reserve_max: Maximum number of channel descriptors. See @reserve_initial.
- * @is_open: True, if channel is open; false - otherwise.
- * @per_dtr_space: Per-descriptor space (in bytes) that channel user can utilize
- * to store per-operation control information.
- * HAL channel object. HAL devices (see xge_hal_device_t{}) contains
- * zero or more channels. HAL channel contains zero or more descriptors. The
- * latter are used by ULD(s) to manage the device and/or send and receive data
- * to remote peer(s) via the channel.
- *
- * See also: xge_hal_channel_type_e{}, xge_hal_channel_flag_e,
- * xge_hal_channel_callback_f{}
- */
-typedef struct {
- /* complete/free section */
- xge_list_t item;
- xge_hal_channel_callback_f callback;
- void **free_arr;
- int length;
- int free_length;
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ) || \
- defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- spinlock_t free_lock;
-#endif
- int compl_index;
- unsigned int usage_cnt;
- unsigned int poll_bytes;
-
- /* reserve/post data path section */
- int terminating;
-#ifdef __XGE_WIN__
- int __xge_os_attr_cacheline_aligned
- post_index;
-#else
- int post_index
- __xge_os_attr_cacheline_aligned;
-#endif
- spinlock_t reserve_lock;
- spinlock_t post_lock;
-
- void **reserve_arr;
- int reserve_length;
- int reserve_threshold;
- int reserve_top;
- int unused1;
-
- /* common section */
- xge_hal_device_h devh;
- pci_dev_h pdev;
- pci_reg_h regh0;
- pci_reg_h regh1;
- void *userdata;
- void **work_arr;
- void **saved_arr;
- void **orig_arr;
- xge_hal_stats_channel_info_t stats;
-
- /* slow section */
- xge_hal_channel_type_e type;
- int post_qid;
- int compl_qid;
- xge_hal_channel_flag_e flags;
- int reserve_initial;
- int reserve_max;
- int is_open;
- int per_dtr_space;
- xge_hal_channel_dtr_term_f dtr_term;
- xge_hal_channel_dtr_init_f dtr_init;
- /* MSI stuff */
- u32 msi_msg;
- u8 rti;
- u8 tti;
- u16 unused2;
- /* MSI-X stuff */
- u64 msix_address;
- u32 msix_data;
- int msix_idx;
- volatile int in_interrupt;
- unsigned int magic;
-#ifdef __XGE_WIN__
-} __xge_os_attr_cacheline_aligned xge_hal_channel_t ;
-#else
-} xge_hal_channel_t __xge_os_attr_cacheline_aligned;
-#endif
-
-/* ========================== CHANNEL PRIVATE API ========================= */
-
-xge_hal_status_e
-__hal_channel_initialize(xge_hal_channel_h channelh,
- xge_hal_channel_attr_t *attr, void **reserve_arr,
- int reserve_initial, int reserve_max, int reserve_threshold);
-
-void __hal_channel_terminate(xge_hal_channel_h channelh);
-
-xge_hal_channel_t*
-__hal_channel_allocate(xge_hal_device_h devh, int post_qid,
- xge_hal_channel_type_e type);
-
-void __hal_channel_free(xge_hal_channel_t *channel);
-
-#if defined(XGE_DEBUG_FP) && (XGE_DEBUG_FP & XGE_DEBUG_FP_CHANNEL)
-#define __HAL_STATIC_CHANNEL
-#define __HAL_INLINE_CHANNEL
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_channel_dtr_alloc(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_try_complete(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_complete(xge_hal_channel_h channelh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_dealloc(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_restore(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int offset);
-
-/* ========================== CHANNEL PUBLIC API ========================= */
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_channel_dtr_count(xge_hal_channel_h channelh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void*
-xge_hal_channel_userdata(xge_hal_channel_h channelh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_channel_id(xge_hal_channel_h channelh);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_check_alignment(dma_addr_t dma_pointer, int size, int alignment,
- int copy_size);
-
-#else /* XGE_FASTPATH_EXTERN */
-#define __HAL_STATIC_CHANNEL static
-#define __HAL_INLINE_CHANNEL inline
-#include <dev/nxge/xgehal/xgehal-channel-fp.c>
-#endif /* XGE_FASTPATH_INLINE */
-
-xge_hal_status_e
-xge_hal_channel_open(xge_hal_device_h hldev, xge_hal_channel_attr_t *attr,
- xge_hal_channel_h *channel,
- xge_hal_channel_reopen_e reopen);
-
-void xge_hal_channel_close(xge_hal_channel_h channelh,
- xge_hal_channel_reopen_e reopen);
-
-void xge_hal_channel_abort(xge_hal_channel_h channelh,
- xge_hal_channel_reopen_e reopen);
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_CHANNEL_H */
diff --git a/sys/dev/nxge/include/xgehal-config.h b/sys/dev/nxge/include/xgehal-config.h
deleted file mode 100644
index 4d5e3970d049..000000000000
--- a/sys/dev/nxge/include/xgehal-config.h
+++ /dev/null
@@ -1,914 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_CONFIG_H
-#define XGE_HAL_CONFIG_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xge-queue.h>
-
-__EXTERN_BEGIN_DECLS
-
-#define XGE_HAL_DEFAULT_USE_HARDCODE -1
-
-#define XGE_HAL_MAX_VIRTUAL_PATHS 8
-#define XGE_HAL_MAX_INTR_PER_VP 4
-
-
-/**
- * struct xge_hal_tti_config_t - Xframe Tx interrupt configuration.
- * @enabled: Set to 1, if TTI feature is enabled.
- * @urange_a: Link utilization range A. The value from 0 to 100%.
- * @ufc_a: Frame count for the utilization range A. Interrupt will be generated
- * each time when (and only when) the line is utilized no more
- * than @urange_a percent in the transmit direction,
- * and number of transmitted frames is greater or equal @ufc_a.
- * @urange_b: Link utilization range B.
- * @ufc_b: Frame count for the utilization range B.
- * @urange_c: Link utilization range C.
- * @ufc_c: Frame count for the utilization range C.
- * @urange_d: Link utilization range D.
- * @ufc_d: Frame count for the utilization range D.
- * @timer_val_us: Interval of time, in microseconds, at which transmit timer
- * interrupt is to be generated. Note that unless @timer_ci_en
- * is set, the timer interrupt is generated only in presence
- * of the transmit traffic. Note also that timer interrupt
- * and utilization interrupt are two separate interrupt
- * sources.
- * @timer_ac_en: Enable auto-cancel. That is, reset the timer if utilization
- * interrupt was generated during the interval.
- * @timer_ci_en: Enable/disable continuous interrupt. Set this value
- * to 1 in order to generate continuous interrupt
- * at fixed @timer_val intervals of time, independently
- * of whether there is transmit traffic or not.
- * @enabled: Set to 1, if TTI feature is enabled.
- *
- * Xframe transmit interrupt configuration.
- * See Xframe User Guide, Section 3.5 "Device Interrupts"
- * for more details. Note also (min, max)
- * ranges in the body of the xge_hal_tx_intr_config_t structure.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_tti_config_t{} structure. Please refer to the
- * corresponding header file.
- */
-typedef struct xge_hal_tti_config_t {
-
- int enabled;
-#define XGE_HAL_TTI_ENABLE 1
-#define XGE_HAL_TTI_DISABLE 0
-
- /* Line utilization interrupts */
-
- int urange_a;
-#define XGE_HAL_MIN_TX_URANGE_A 0
-#define XGE_HAL_MAX_TX_URANGE_A 100
-
- int ufc_a;
-#define XGE_HAL_MIN_TX_UFC_A 0
-#define XGE_HAL_MAX_TX_UFC_A 65535
-
- int urange_b;
-#define XGE_HAL_MIN_TX_URANGE_B 0
-#define XGE_HAL_MAX_TX_URANGE_B 100
-
- int ufc_b;
-#define XGE_HAL_MIN_TX_UFC_B 0
-#define XGE_HAL_MAX_TX_UFC_B 65535
-
- int urange_c;
-#define XGE_HAL_MIN_TX_URANGE_C 0
-#define XGE_HAL_MAX_TX_URANGE_C 100
-
- int ufc_c;
-#define XGE_HAL_MIN_TX_UFC_C 0
-#define XGE_HAL_MAX_TX_UFC_C 65535
-
- int ufc_d;
-#define XGE_HAL_MIN_TX_UFC_D 0
-#define XGE_HAL_MAX_TX_UFC_D 65535
-
- int timer_val_us;
-#define XGE_HAL_MIN_TX_TIMER_VAL 0
-#define XGE_HAL_MAX_TX_TIMER_VAL 65535
-
- int timer_ac_en;
-#define XGE_HAL_MIN_TX_TIMER_AC_EN 0
-#define XGE_HAL_MAX_TX_TIMER_AC_EN 1
-
- int timer_ci_en;
-#define XGE_HAL_MIN_TX_TIMER_CI_EN 0
-#define XGE_HAL_MAX_TX_TIMER_CI_EN 1
-
-
-} xge_hal_tti_config_t;
-
-/**
- * struct xge_hal_rti_config_t - Xframe Rx interrupt configuration.
- * @urange_a: Link utilization range A. The value from 0 to 100%.
- * @ufc_a: Frame count for the utilization range A. Interrupt will be generated
- * each time when (and only when) the line is utilized no more
- * than @urange_a percent inbound,
- * and number of received frames is greater or equal @ufc_a.
- * @urange_b: Link utilization range B.
- * @ufc_b: Frame count for the utilization range B.
- * @urange_c: Link utilization range C.
- * @ufc_c: Frame count for the utilization range C.
- * @urange_d: Link utilization range D.
- * @ufc_d: Frame count for the utilization range D.
- * @timer_ac_en: Enable auto-cancel. That is, reset the timer if utilization
- * interrupt was generated during the interval.
- * @timer_val_us: Interval of time, in microseconds, at which receive timer
- * interrupt is to be generated. The timer interrupt is generated
- * only in presence of the inbound traffic. Note also that timer
- * interrupt and utilization interrupt are two separate interrupt
- * sources.
- *
- * Xframe receive interrupt configuration.
- * See Xframe User Guide, Section 3.5 "Device Interrupts"
- * for more details. Note also (min, max)
- * ranges in the body of the xge_hal_intr_config_t structure.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_rti_config_t{} structure. Please refer to the
- * corresponding header file.
- */
-typedef struct xge_hal_rti_config_t {
-
- int urange_a;
-#define XGE_HAL_MIN_RX_URANGE_A 0
-#define XGE_HAL_MAX_RX_URANGE_A 127
-
- int ufc_a;
-#define XGE_HAL_MIN_RX_UFC_A 0
-#define XGE_HAL_MAX_RX_UFC_A 65535
-
- int urange_b;
-#define XGE_HAL_MIN_RX_URANGE_B 0
-#define XGE_HAL_MAX_RX_URANGE_B 127
-
- int ufc_b;
-#define XGE_HAL_MIN_RX_UFC_B 0
-#define XGE_HAL_MAX_RX_UFC_B 65535
-
- int urange_c;
-#define XGE_HAL_MIN_RX_URANGE_C 0
-#define XGE_HAL_MAX_RX_URANGE_C 127
-
- int ufc_c;
-#define XGE_HAL_MIN_RX_UFC_C 0
-#define XGE_HAL_MAX_RX_UFC_C 65535
-
- int ufc_d;
-#define XGE_HAL_MIN_RX_UFC_D 0
-#define XGE_HAL_MAX_RX_UFC_D 65535
-
- int timer_ac_en;
-#define XGE_HAL_MIN_RX_TIMER_AC_EN 0
-#define XGE_HAL_MAX_RX_TIMER_AC_EN 1
-
- int timer_val_us;
-#define XGE_HAL_MIN_RX_TIMER_VAL 0
-#define XGE_HAL_MAX_RX_TIMER_VAL 65535
-
-} xge_hal_rti_config_t;
-
-/**
- * struct xge_hal_fifo_queue_t - Single fifo configuration.
- * @max: Max numbers of TxDLs (that is, lists of Tx descriptors) per queue.
- * @initial: Initial numbers of TxDLs per queue (can grow up to @max).
- * @intr: Boolean. Use 1 to generate interrupt for each completed TxDL.
- * Use 0 otherwise.
- * @intr_vector: TBD
- * @no_snoop_bits: If non-zero, specifies no-snoop PCI operation,
- * which generally improves latency of the host bridge operation
- * (see PCI specification). For valid values please refer
- * to xge_hal_fifo_queue_t{} in the driver sources.
- * @priority: TBD
- * @configured: Boolean. Use 1 to specify that the fifo is configured.
- * Only "configured" fifos can be activated and used to post
- * Tx descriptors. Any subset of 8 available fifos can be
- * "configured".
- * @tti: TBD
- *
- * Single fifo configuration.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_fifo_queue_t{} structure. Please refer to the
- * corresponding header file.
- * See also: xge_hal_fifo_config_t{}
- */
-typedef struct xge_hal_fifo_queue_t {
- int max;
- int initial;
-#define XGE_HAL_MIN_FIFO_QUEUE_LENGTH 2
-#define XGE_HAL_MAX_FIFO_QUEUE_LENGTH 8192
-
- int intr;
-#define XGE_HAL_MIN_FIFO_QUEUE_INTR 0
-#define XGE_HAL_MAX_FIFO_QUEUE_INTR 1
-
- int intr_vector;
-#define XGE_HAL_MIN_FIFO_QUEUE_INTR_VECTOR 0
-#define XGE_HAL_MAX_FIFO_QUEUE_INTR_VECTOR 64
-
- int no_snoop_bits;
-#define XGE_HAL_MIN_FIFO_QUEUE_NO_SNOOP_DISABLED 0
-#define XGE_HAL_MAX_FIFO_QUEUE_NO_SNOOP_TXD 1
-#define XGE_HAL_MAX_FIFO_QUEUE_NO_SNOOP_BUFFER 2
-#define XGE_HAL_MAX_FIFO_QUEUE_NO_SNOOP_ALL 3
-
- int priority;
-#define XGE_HAL_MIN_FIFO_PRIORITY 0
-#define XGE_HAL_MAX_FIFO_PRIORITY 63
-
- int configured;
-#define XGE_HAL_MIN_FIFO_CONFIGURED 0
-#define XGE_HAL_MAX_FIFO_CONFIGURED 1
-
-#define XGE_HAL_MAX_FIFO_TTI_NUM 7
-#define XGE_HAL_MAX_FIFO_TTI_RING_0 56
- xge_hal_tti_config_t tti[XGE_HAL_MAX_FIFO_TTI_NUM];
-
-} xge_hal_fifo_queue_t;
-
-/**
- * struct xge_hal_fifo_config_t - Configuration of all 8 fifos.
- * @max_frags: Max number of Tx buffers per TxDL (that is, per single
- * transmit operation).
- * No more than 256 transmit buffers can be specified.
- * @max_aligned_frags: Number of fragments to be aligned out of
- * maximum fragments (see @max_frags).
- * @reserve_threshold: Descriptor reservation threshold.
- * At least @reserve_threshold descriptors will remain
- * unallocated at all times.
- * @memblock_size: Fifo descriptors are allocated in blocks of @mem_block_size
- * bytes. Setting @memblock_size to page size ensures
- * by-page allocation of descriptors. 128K bytes is the
- * maximum supported block size.
- * @queue: Array of per-fifo configurations.
- * @alignment_size: per Tx fragment DMA-able memory used to align transmit data
- * (e.g., to align on a cache line).
- *
- * Configuration of all Xframe fifos. Includes array of xge_hal_fifo_queue_t
- * structures.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_fifo_config_t{} structure. Please refer to the
- * corresponding header file.
- * See also: xge_hal_ring_queue_t{}.
- */
-typedef struct xge_hal_fifo_config_t {
- int max_frags;
-#define XGE_HAL_MIN_FIFO_FRAGS 1
-#define XGE_HAL_MAX_FIFO_FRAGS 256
-
- int reserve_threshold;
-#define XGE_HAL_MIN_FIFO_RESERVE_THRESHOLD 0
-#define XGE_HAL_MAX_FIFO_RESERVE_THRESHOLD 8192
-
- int memblock_size;
-#define XGE_HAL_MIN_FIFO_MEMBLOCK_SIZE 4096
-#define XGE_HAL_MAX_FIFO_MEMBLOCK_SIZE 131072
-
- int alignment_size;
-#define XGE_HAL_MIN_ALIGNMENT_SIZE 0
-#define XGE_HAL_MAX_ALIGNMENT_SIZE 65536
-
- int max_aligned_frags;
- /* range: (1, @max_frags) */
-
-#define XGE_HAL_MIN_FIFO_NUM 1
-#define XGE_HAL_MAX_FIFO_NUM_HERC 8
-#define XGE_HAL_MAX_FIFO_NUM_TITAN (XGE_HAL_MAX_VIRTUAL_PATHS - 1)
-#define XGE_HAL_MAX_FIFO_NUM (XGE_HAL_MAX_VIRTUAL_PATHS)
- xge_hal_fifo_queue_t queue[XGE_HAL_MAX_FIFO_NUM];
-} xge_hal_fifo_config_t;
-
-/**
- * struct xge_hal_rts_port_t - RTS port entry
- * @num: Port number
- * @udp: Port is UDP (default TCP)
- * @src: Port is Source (default Destination)
- */
-typedef struct xge_hal_rts_port_t {
- int num;
- int udp;
- int src;
-} xge_hal_rts_port_t;
-
-/**
- * struct xge_hal_ring_queue_t - Single ring configuration.
- * @max: Max numbers of RxD blocks per queue
- * @initial: Initial numbers of RxD blocks per queue
- * (can grow up to @max)
- * @buffer_mode: Receive buffer mode (1, 2, 3, or 5); for details please refer
- * to Xframe User Guide.
- * @dram_size_mb: Size (in MB) of Xframe DRAM used for _that_ ring.
- * Note that 64MB of available
- * on-board DRAM is shared between receive rings.
- * If a single ring is used, @dram_size_mb can be set to 64.
- * Sum of all rings' @dram_size_mb cannot exceed 64.
- * @intr_vector: TBD
- * @backoff_interval_us: Time (in microseconds), after which Xframe
- * tries to download RxDs posted by the host.
- * Note that the "backoff" does not happen if host posts receive
- * descriptors in the timely fashion.
- * @max_frm_len: Maximum frame length that can be received on _that_ ring.
- * Setting this field to -1 ensures that the ring will
- * "accept" MTU-size frames (note that MTU can be changed at
- * runtime).
- * Any value other than (-1) specifies a certain "hard"
- * limit on the receive frame sizes.
- * The field can be used to activate receive frame-length based
- * steering.
- * @priority: Ring priority. 0 - highest, 7 - lowest. The value is used
- * to give prioritized access to PCI-X. See Xframe documentation
- * for details.
- * @rth_en: Enable Receive Traffic Hashing (RTH).
- * @no_snoop_bits: If non-zero, specifies no-snoop PCI operation,
- * which generally improves latency of the host bridge operation
- * (see PCI specification). For valid values please refer
- * to xge_hal_ring_queue_t{} in the driver sources.
- * @indicate_max_pkts: Sets maximum number of received frames to be processed
- * within single interrupt.
- * @configured: Boolean. Use 1 to specify that the ring is configured.
- * Only "configured" rings can be activated and used to post
- * Rx descriptors. Any subset of 8 available rings can be
- * "configured".
- * @rts_mac_en: 1 - To enable Receive MAC address steering.
- * 0 - To disable Receive MAC address steering.
- * @rth_en: TBD
- * @rts_port_en: TBD
- * @rts_ports: TBD
- * @rti: Xframe receive interrupt configuration.
- *
- * Single ring configuration.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_ring_queue_t{} structure. Please refer to the
- * corresponding header file.
- * See also: xge_hal_fifo_config_t{}.
- */
-typedef struct xge_hal_ring_queue_t {
- int max;
- int initial;
-#define XGE_HAL_MIN_RING_QUEUE_BLOCKS 1
-#define XGE_HAL_MAX_RING_QUEUE_BLOCKS 64
-
- int buffer_mode;
-#define XGE_HAL_RING_QUEUE_BUFFER_MODE_1 1
-#define XGE_HAL_RING_QUEUE_BUFFER_MODE_2 2
-#define XGE_HAL_RING_QUEUE_BUFFER_MODE_3 3
-#define XGE_HAL_RING_QUEUE_BUFFER_MODE_5 5
-
- int dram_size_mb;
-#define XGE_HAL_MIN_RING_QUEUE_SIZE 0
-#define XGE_HAL_MAX_RING_QUEUE_SIZE_XENA 64
-#define XGE_HAL_MAX_RING_QUEUE_SIZE_HERC 32
-
- int intr_vector;
-#define XGE_HAL_MIN_RING_QUEUE_INTR_VECTOR 0
-#define XGE_HAL_MAX_RING_QUEUE_INTR_VECTOR 64
-
- int backoff_interval_us;
-#define XGE_HAL_MIN_BACKOFF_INTERVAL_US 1
-#define XGE_HAL_MAX_BACKOFF_INTERVAL_US 125000
-
- int max_frm_len;
-#define XGE_HAL_MIN_MAX_FRM_LEN -1
-#define XGE_HAL_MAX_MAX_FRM_LEN 9622
-
- int priority;
-#define XGE_HAL_MIN_RING_PRIORITY 0
-#define XGE_HAL_MAX_RING_PRIORITY 7
-
- int no_snoop_bits;
-#define XGE_HAL_MIN_RING_QUEUE_NO_SNOOP_DISABLED 0
-#define XGE_HAL_MAX_RING_QUEUE_NO_SNOOP_RXD 1
-#define XGE_HAL_MAX_RING_QUEUE_NO_SNOOP_BUFFER 2
-#define XGE_HAL_MAX_RING_QUEUE_NO_SNOOP_ALL 3
-
- int indicate_max_pkts;
-#define XGE_HAL_MIN_RING_INDICATE_MAX_PKTS 1
-#define XGE_HAL_MAX_RING_INDICATE_MAX_PKTS 65536
-
- int configured;
-#define XGE_HAL_MIN_RING_CONFIGURED 0
-#define XGE_HAL_MAX_RING_CONFIGURED 1
-
- int rts_mac_en;
-#define XGE_HAL_MIN_RING_RTS_MAC_EN 0
-#define XGE_HAL_MAX_RING_RTS_MAC_EN 1
-
- int rth_en;
-#define XGE_HAL_MIN_RING_RTH_EN 0
-#define XGE_HAL_MAX_RING_RTH_EN 1
-
- int rts_port_en;
-#define XGE_HAL_MIN_RING_RTS_PORT_EN 0
-#define XGE_HAL_MAX_RING_RTS_PORT_EN 1
-
-#define XGE_HAL_MAX_STEERABLE_PORTS 32
- xge_hal_rts_port_t rts_ports[XGE_HAL_MAX_STEERABLE_PORTS];
-
- xge_hal_rti_config_t rti;
-
-} xge_hal_ring_queue_t;
-
-/**
- * struct xge_hal_ring_config_t - Array of ring configurations.
- * @memblock_size: Ring descriptors are allocated in blocks of @mem_block_size
- * bytes. Setting @memblock_size to page size ensures
- * by-page allocation of descriptors. 128K bytes is the
- * upper limit.
- * @scatter_mode: Xframe supports two receive scatter modes: A and B.
- * For details please refer to Xframe User Guide.
- * @strip_vlan_tag: TBD
- * @queue: Array of all Xframe ring configurations.
- *
- * Array of ring configurations.
- * See also: xge_hal_ring_queue_t{}.
- */
-typedef struct xge_hal_ring_config_t {
-
- int memblock_size;
-#define XGE_HAL_MIN_RING_MEMBLOCK_SIZE 4096
-#define XGE_HAL_MAX_RING_MEMBLOCK_SIZE 131072
-
- int scatter_mode;
-#define XGE_HAL_RING_QUEUE_SCATTER_MODE_A 0
-#define XGE_HAL_RING_QUEUE_SCATTER_MODE_B 1
-
- int strip_vlan_tag;
-#define XGE_HAL_RING_DONOT_STRIP_VLAN_TAG 0
-#define XGE_HAL_RING_STRIP_VLAN_TAG 1
-
-#define XGE_HAL_MIN_RING_NUM 1
-#define XGE_HAL_MAX_RING_NUM_HERC 8
-#define XGE_HAL_MAX_RING_NUM_TITAN (XGE_HAL_MAX_VIRTUAL_PATHS - 1)
-#define XGE_HAL_MAX_RING_NUM (XGE_HAL_MAX_VIRTUAL_PATHS)
- xge_hal_ring_queue_t queue[XGE_HAL_MAX_RING_NUM];
-
-} xge_hal_ring_config_t;
-
-/**
- * struct xge_hal_mac_config_t - MAC configuration.
- * @media: Transponder type.
- * @tmac_util_period: The sampling period over which the transmit utilization
- * is calculated.
- * @rmac_util_period: The sampling period over which the receive utilization
- * is calculated.
- * @rmac_strip_pad: Determines whether padding of received frames is removed by
- * the MAC or sent to the host.
- * @rmac_bcast_en: Enable frames containing broadcast address to be
- * passed to the host.
- * @rmac_pause_gen_en: Received pause generation enable.
- * @rmac_pause_rcv_en: Receive pause enable.
- * @rmac_pause_time: The value to be inserted in outgoing pause frames.
- * Has units of pause quanta (one pause quanta = 512 bit times).
- * @mc_pause_threshold_q0q3: Contains thresholds for pause frame generation
- * for queues 0 through 3. The threshold value indicates portion of the
- * individual receive buffer queue size. Thresholds have a range of 0 to
- * 255, allowing 256 possible watermarks in a queue.
- * @mc_pause_threshold_q4q7: Contains thresholds for pause frame generation
- * for queues 4 through 7. The threshold value indicates portion of the
- * individual receive buffer queue size. Thresholds have a range of 0 to
- * 255, allowing 256 possible watermarks in a queue.
- *
- * MAC configuration. This includes various aspects of configuration, including:
- * - Pause frame threshold;
- * - sampling rate to calculate link utilization;
- * - enabling/disabling broadcasts.
- *
- * See Xframe User Guide for more details.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_mac_config_t{} structure. Please refer to the
- * corresponding include file.
- */
-typedef struct xge_hal_mac_config_t {
- int media;
-#define XGE_HAL_MIN_MEDIA 0
-#define XGE_HAL_MEDIA_SR 0
-#define XGE_HAL_MEDIA_SW 1
-#define XGE_HAL_MEDIA_LR 2
-#define XGE_HAL_MEDIA_LW 3
-#define XGE_HAL_MEDIA_ER 4
-#define XGE_HAL_MEDIA_EW 5
-#define XGE_HAL_MAX_MEDIA 5
-
- int tmac_util_period;
-#define XGE_HAL_MIN_TMAC_UTIL_PERIOD 0
-#define XGE_HAL_MAX_TMAC_UTIL_PERIOD 15
-
- int rmac_util_period;
-#define XGE_HAL_MIN_RMAC_UTIL_PERIOD 0
-#define XGE_HAL_MAX_RMAC_UTIL_PERIOD 15
-
- int rmac_bcast_en;
-#define XGE_HAL_MIN_RMAC_BCAST_EN 0
-#define XGE_HAL_MAX_RMAC_BCAST_EN 1
-
- int rmac_pause_gen_en;
-#define XGE_HAL_MIN_RMAC_PAUSE_GEN_EN 0
-#define XGE_HAL_MAX_RMAC_PAUSE_GEN_EN 1
-
- int rmac_pause_rcv_en;
-#define XGE_HAL_MIN_RMAC_PAUSE_RCV_EN 0
-#define XGE_HAL_MAX_RMAC_PAUSE_RCV_EN 1
-
- int rmac_pause_time;
-#define XGE_HAL_MIN_RMAC_HIGH_PTIME 16
-#define XGE_HAL_MAX_RMAC_HIGH_PTIME 65535
-
- int mc_pause_threshold_q0q3;
-#define XGE_HAL_MIN_MC_PAUSE_THRESHOLD_Q0Q3 0
-#define XGE_HAL_MAX_MC_PAUSE_THRESHOLD_Q0Q3 254
-
- int mc_pause_threshold_q4q7;
-#define XGE_HAL_MIN_MC_PAUSE_THRESHOLD_Q4Q7 0
-#define XGE_HAL_MAX_MC_PAUSE_THRESHOLD_Q4Q7 254
-
-} xge_hal_mac_config_t;
-
-/**
- * struct xge_hal_device_config_t - Device configuration.
- * @mtu: Current mtu size.
- * @isr_polling_cnt: Maximum number of times to "poll" for Tx and Rx
- * completions. Used in xge_hal_device_handle_irq().
- * @latency_timer: Specifies, in units of PCI bus clocks, and in conformance
- * with the PCI Specification, the value of the Latency Timer
- * for this PCI bus master.
- * Specify either zero or -1 to use BIOS default.
- * @napi_weight: (TODO)
- * @max_splits_trans: Maximum number of PCI-X split transactions.
- * Specify (-1) to use BIOS default.
- * @mmrb_count: Maximum Memory Read Byte Count. Use (-1) to use default
- * BIOS value. Otherwise: mmrb_count = 0 corresponds to 512B;
- * 1 - 1KB, 2 - 2KB, and 3 - 4KB.
- * @shared_splits: The number of Outstanding Split Transactions that is
- * shared by Tx and Rx requests. The device stops issuing Tx
- * requests once the number of Outstanding Split Transactions is
- * equal to the value of Shared_Splits.
- * A value of zero indicates that the Tx and Rx share all allocated
- * Split Requests, i.e. the device can issue both types (Tx and Rx)
- * of read requests until the number of Maximum Outstanding Split
- * Transactions is reached.
- * @stats_refresh_time_sec: Sets the default interval for automatic stats transfer
- * to the host. This includes MAC stats as well as PCI stats.
- * See xge_hal_stats_hw_info_t{}.
- * @pci_freq_mherz: PCI clock frequency, e.g.: 133 for 133MHz.
- * @intr_mode: Line, MSI, or MSI-X interrupt.
- * @sched_timer_us: If greater than zero, specifies time interval
- * (in microseconds) for the device to generate
- * interrupt. Note that unlike tti and rti interrupts,
- * the scheduled interrupt is generated independently of
- * whether there is transmit or receive traffic, respectively.
- * @sched_timer_one_shot: 1 - generate scheduled interrupt only once.
- * 0 - generate scheduled interrupt periodically at the specified
- * @sched_timer_us interval.
- *
- * @ring: See xge_hal_ring_config_t{}.
- * @mac: See xge_hal_mac_config_t{}.
- * @tti: See xge_hal_tti_config_t{}.
- * @fifo: See xge_hal_fifo_config_t{}.
- *
- * @dump_on_serr: Dump adapter state ("about", statistics, registers) on SERR#.
- * @dump_on_eccerr: Dump adapter state ("about", statistics, registers) on
- * ECC error.
- * @dump_on_parityerr: Dump adapter state ("about", statistics, registers) on
- * parity error.
- * @rth_en: Enable Receive Traffic Hashing(RTH) using IT(Indirection Table).
- * @rth_bucket_size: RTH bucket width (in bits). For valid range please see
- * xge_hal_device_config_t{} in the driver sources.
- * @rth_spdm_en: Enable Receive Traffic Hashing(RTH) using SPDM(Socket Pair
- * Direct Match).
- * @rth_spdm_use_l4: Set to 1, if the L4 ports are used in the calculation of
- * hash value in the RTH SPDM based steering.
- * @rxufca_intr_thres: (TODO)
- * @rxufca_lo_lim: (TODO)
- * @rxufca_hi_lim: (TODO)
- * @rxufca_lbolt_period: (TODO)
- * @link_valid_cnt: link-valid counting is done only at device-open time,
- * to determine with the specified certainty that the link is up. See also
- * @link_retry_cnt.
- * @link_retry_cnt: Max number of polls for link-up. Done only at device
- * open time. Reducing this value as well as the previous @link_valid_cnt,
- * speeds up device startup, which may be important if the driver
- * is compiled into OS.
- * @link_stability_period: Specify the period for which the link must be
- * stable in order for the adapter to declare "LINK UP".
- * The enumerated settings (see Xframe-II UG) are:
- * 0 ........... instantaneous
- * 1 ........... 500 μs
- * 2 ........... 1 ms
- * 3 ........... 64 ms
- * 4 ........... 256 ms
- * 5 ........... 512 ms
- * 6 ........... 1 s
- * 7 ........... 2 s
- * @device_poll_millis: Specify the interval (in mulliseconds) between
- * successive xge_hal_device_poll() runs.
- * stable in order for the adapter to declare "LINK UP".
- * @no_isr_events: TBD
- * @lro_sg_size: TBD
- * @lro_frm_len: TBD
- * @bimodal_interrupts: Enable bimodal interrupts in device
- * @bimodal_timer_lo_us: TBD
- * @bimodal_timer_hi_us: TBD
- * @rts_mac_en: Enable Receive Traffic Steering using MAC destination address
- * @rts_qos_en: TBD
- * @rts_port_en: TBD
- * @vp_config: Configuration for virtual paths
- * @max_cqe_groups: The maximum number of adapter CQE group blocks a CQRQ
- * can own at any one time.
- * @max_num_wqe_od_groups: The maximum number of WQE Headers/OD Groups that
- * this S-RQ can own at any one time.
- * @no_wqe_threshold: Maximum number of times adapter polls WQE Hdr blocks for
- * WQEs before generating a message or interrupt.
- * @refill_threshold_high:This field provides a hysteresis upper bound for
- * automatic adapter refill operations.
- * @refill_threshold_low:This field provides a hysteresis lower bound for
- * automatic adapter refill operations.
- * @eol_policy:This field sets the policy for handling the end of list condition.
- * 2'b00 - When EOL is reached,poll until last block wrapper size is no longer 0.
- * 2'b01 - Send UMQ message when EOL is reached.
- * 2'b1x - Poll until the poll_count_max is reached and if still EOL,send UMQ message
- * @eol_poll_count_max:sets the maximum number of times the queue manager will poll for
- * a non-zero block wrapper before giving up and sending a UMQ message
- * @ack_blk_limit: Limit on the maximum number of ACK list blocks that can be held
- * by a session at any one time.
- * @poll_or_doorbell: TBD
- *
- * Xframe configuration.
- * Contains per-device configuration parameters, including:
- * - latency timer (settable via PCI configuration space);
- * - maximum number of split transactions;
- * - maximum number of shared splits;
- * - stats sampling interval, etc.
- *
- * In addition, xge_hal_device_config_t{} includes "subordinate"
- * configurations, including:
- * - fifos and rings;
- * - MAC (see xge_hal_mac_config_t{}).
- *
- * See Xframe User Guide for more details.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the xge_hal_device_config_t{} structure. Please refer to the
- * corresponding include file.
- * See also: xge_hal_tti_config_t{}, xge_hal_stats_hw_info_t{},
- * xge_hal_mac_config_t{}.
- */
-typedef struct xge_hal_device_config_t {
- int mtu;
-#define XGE_HAL_MIN_INITIAL_MTU XGE_HAL_MIN_MTU
-#define XGE_HAL_MAX_INITIAL_MTU XGE_HAL_MAX_MTU
-
- int isr_polling_cnt;
-#define XGE_HAL_MIN_ISR_POLLING_CNT 0
-#define XGE_HAL_MAX_ISR_POLLING_CNT 65536
-
- int latency_timer;
-#define XGE_HAL_USE_BIOS_DEFAULT_LATENCY -1
-#define XGE_HAL_MIN_LATENCY_TIMER 8
-#define XGE_HAL_MAX_LATENCY_TIMER 255
-
- int napi_weight;
-#define XGE_HAL_DEF_NAPI_WEIGHT 64
-
- int max_splits_trans;
-#define XGE_HAL_USE_BIOS_DEFAULT_SPLITS -1
-#define XGE_HAL_ONE_SPLIT_TRANSACTION 0
-#define XGE_HAL_TWO_SPLIT_TRANSACTION 1
-#define XGE_HAL_THREE_SPLIT_TRANSACTION 2
-#define XGE_HAL_FOUR_SPLIT_TRANSACTION 3
-#define XGE_HAL_EIGHT_SPLIT_TRANSACTION 4
-#define XGE_HAL_TWELVE_SPLIT_TRANSACTION 5
-#define XGE_HAL_SIXTEEN_SPLIT_TRANSACTION 6
-#define XGE_HAL_THIRTYTWO_SPLIT_TRANSACTION 7
-
- int mmrb_count;
-#define XGE_HAL_DEFAULT_BIOS_MMRB_COUNT -1
-#define XGE_HAL_MIN_MMRB_COUNT 0 /* 512b */
-#define XGE_HAL_MAX_MMRB_COUNT 3 /* 4k */
-
- int shared_splits;
-#define XGE_HAL_MIN_SHARED_SPLITS 0
-#define XGE_HAL_MAX_SHARED_SPLITS 31
-
- int stats_refresh_time_sec;
-#define XGE_HAL_STATS_REFRESH_DISABLE 0
-#define XGE_HAL_MIN_STATS_REFRESH_TIME 1
-#define XGE_HAL_MAX_STATS_REFRESH_TIME 300
-
- int pci_freq_mherz;
-#define XGE_HAL_PCI_FREQ_MHERZ_33 33
-#define XGE_HAL_PCI_FREQ_MHERZ_66 66
-#define XGE_HAL_PCI_FREQ_MHERZ_100 100
-#define XGE_HAL_PCI_FREQ_MHERZ_133 133
-#define XGE_HAL_PCI_FREQ_MHERZ_266 266
-
- int intr_mode;
-#define XGE_HAL_INTR_MODE_IRQLINE 0
-#define XGE_HAL_INTR_MODE_MSI 1
-#define XGE_HAL_INTR_MODE_MSIX 2
-
- int sched_timer_us;
-#define XGE_HAL_SCHED_TIMER_DISABLED 0
-#define XGE_HAL_SCHED_TIMER_MIN 0
-#define XGE_HAL_SCHED_TIMER_MAX 0xFFFFF
-
- int sched_timer_one_shot;
-#define XGE_HAL_SCHED_TIMER_ON_SHOT_DISABLE 0
-#define XGE_HAL_SCHED_TIMER_ON_SHOT_ENABLE 1
-
- xge_hal_ring_config_t ring;
- xge_hal_mac_config_t mac;
- xge_hal_fifo_config_t fifo;
-
- int dump_on_serr;
-#define XGE_HAL_DUMP_ON_SERR_DISABLE 0
-#define XGE_HAL_DUMP_ON_SERR_ENABLE 1
-
- int dump_on_eccerr;
-#define XGE_HAL_DUMP_ON_ECCERR_DISABLE 0
-#define XGE_HAL_DUMP_ON_ECCERR_ENABLE 1
-
- int dump_on_parityerr;
-#define XGE_HAL_DUMP_ON_PARITYERR_DISABLE 0
-#define XGE_HAL_DUMP_ON_PARITYERR_ENABLE 1
-
- int rth_en;
-#define XGE_HAL_RTH_DISABLE 0
-#define XGE_HAL_RTH_ENABLE 1
-
- int rth_bucket_size;
-#define XGE_HAL_MIN_RTH_BUCKET_SIZE 1
-#define XGE_HAL_MAX_RTH_BUCKET_SIZE 8
-
- int rth_spdm_en;
-#define XGE_HAL_RTH_SPDM_DISABLE 0
-#define XGE_HAL_RTH_SPDM_ENABLE 1
-
- int rth_spdm_use_l4;
-#define XGE_HAL_RTH_SPDM_USE_L4 1
-
- int rxufca_intr_thres;
-#define XGE_HAL_RXUFCA_INTR_THRES_MIN 1
-#define XGE_HAL_RXUFCA_INTR_THRES_MAX 4096
-
- int rxufca_lo_lim;
-#define XGE_HAL_RXUFCA_LO_LIM_MIN 1
-#define XGE_HAL_RXUFCA_LO_LIM_MAX 16
-
- int rxufca_hi_lim;
-#define XGE_HAL_RXUFCA_HI_LIM_MIN 1
-#define XGE_HAL_RXUFCA_HI_LIM_MAX 256
-
- int rxufca_lbolt_period;
-#define XGE_HAL_RXUFCA_LBOLT_PERIOD_MIN 1
-#define XGE_HAL_RXUFCA_LBOLT_PERIOD_MAX 1024
-
- int link_valid_cnt;
-#define XGE_HAL_LINK_VALID_CNT_MIN 0
-#define XGE_HAL_LINK_VALID_CNT_MAX 127
-
- int link_retry_cnt;
-#define XGE_HAL_LINK_RETRY_CNT_MIN 0
-#define XGE_HAL_LINK_RETRY_CNT_MAX 127
-
- int link_stability_period;
-#define XGE_HAL_DEFAULT_LINK_STABILITY_PERIOD 2 /* 1ms */
-#define XGE_HAL_MIN_LINK_STABILITY_PERIOD 0 /* instantaneous */
-#define XGE_HAL_MAX_LINK_STABILITY_PERIOD 7 /* 2s */
-
- int device_poll_millis;
-#define XGE_HAL_DEFAULT_DEVICE_POLL_MILLIS 1000
-#define XGE_HAL_MIN_DEVICE_POLL_MILLIS 1
-#define XGE_HAL_MAX_DEVICE_POLL_MILLIS 100000
-
- int no_isr_events;
-#define XGE_HAL_NO_ISR_EVENTS_MIN 0
-#define XGE_HAL_NO_ISR_EVENTS_MAX 1
-
- int lro_sg_size;
-#define XGE_HAL_LRO_DEFAULT_SG_SIZE 10
-#define XGE_HAL_LRO_MIN_SG_SIZE 1
-#define XGE_HAL_LRO_MAX_SG_SIZE 64
-
- int lro_frm_len;
-#define XGE_HAL_LRO_DEFAULT_FRM_LEN 65536
-#define XGE_HAL_LRO_MIN_FRM_LEN 4096
-#define XGE_HAL_LRO_MAX_FRM_LEN 65536
-
- int bimodal_interrupts;
-#define XGE_HAL_BIMODAL_INTR_MIN -1
-#define XGE_HAL_BIMODAL_INTR_MAX 1
-
- int bimodal_timer_lo_us;
-#define XGE_HAL_BIMODAL_TIMER_LO_US_MIN 1
-#define XGE_HAL_BIMODAL_TIMER_LO_US_MAX 127
-
- int bimodal_timer_hi_us;
-#define XGE_HAL_BIMODAL_TIMER_HI_US_MIN 128
-#define XGE_HAL_BIMODAL_TIMER_HI_US_MAX 65535
-
- int rts_mac_en;
-#define XGE_HAL_RTS_MAC_DISABLE 0
-#define XGE_HAL_RTS_MAC_ENABLE 1
-
- int rts_qos_en;
-#define XGE_HAL_RTS_QOS_DISABLE 0
-#define XGE_HAL_RTS_QOS_ENABLE 1
-
- int rts_port_en;
-#define XGE_HAL_RTS_PORT_DISABLE 0
-#define XGE_HAL_RTS_PORT_ENABLE 1
-
-} xge_hal_device_config_t;
-
-/**
- * struct xge_hal_driver_config_t - HAL (layer) configuration.
- * @periodic_poll_interval_millis: Interval, in milliseconds, which is used to
- * periodically poll HAL, i.e, invoke
- * xge_hal_device_poll().
- * Note that HAL does not maintain its own
- * polling context. HAL relies on ULD to
- * provide one.
- * @queue_size_initial: Initial size of the HAL protected event queue.
- * The queue is shared by HAL and upper-layer drivers.
- * The queue is used to exchange and process slow-path
- * events. See xge_hal_event_e.
- * @queue_size_max: Maximum size of the HAL queue. Depending on the load,
- * the queue may grow at run-time up to @queue_max_size.
- * @tracebuf_size: Size of the trace buffer. Set it to '0' to disable.
- * HAL configuration. (Note: do not confuse HAL layer with (possibly multiple)
- * HAL devices.)
- * Currently this structure contains just a few basic values.
- * Note: Valid (min, max) range for each attribute is specified in the body of
- * the structure. Please refer to the corresponding header file.
- * See also: xge_hal_device_poll()
- */
-typedef struct xge_hal_driver_config_t {
- int queue_size_initial;
-#define XGE_HAL_MIN_QUEUE_SIZE_INITIAL 1
-#define XGE_HAL_MAX_QUEUE_SIZE_INITIAL 16
-
- int queue_size_max;
-#define XGE_HAL_MIN_QUEUE_SIZE_MAX 1
-#define XGE_HAL_MAX_QUEUE_SIZE_MAX 16
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
- int tracebuf_size;
-#define XGE_HAL_MIN_CIRCULAR_ARR 4096
-#define XGE_HAL_MAX_CIRCULAR_ARR 1048576
-#define XGE_HAL_DEF_CIRCULAR_ARR XGE_OS_HOST_PAGE_SIZE
-
- int tracebuf_timestamp_en;
-#define XGE_HAL_MIN_TIMESTAMP_EN 0
-#define XGE_HAL_MAX_TIMESTAMP_EN 1
-#endif
-
-} xge_hal_driver_config_t;
-
-
-/* ========================== PRIVATE API ================================= */
-
-xge_hal_status_e
-__hal_device_config_check_common (xge_hal_device_config_t *new_config);
-
-xge_hal_status_e
-__hal_device_config_check_xena (xge_hal_device_config_t *new_config);
-
-xge_hal_status_e
-__hal_device_config_check_herc (xge_hal_device_config_t *new_config);
-
-xge_hal_status_e
-__hal_driver_config_check (xge_hal_driver_config_t *new_config);
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_CONFIG_H */
diff --git a/sys/dev/nxge/include/xgehal-device.h b/sys/dev/nxge/include/xgehal-device.h
deleted file mode 100644
index 88b757226f9d..000000000000
--- a/sys/dev/nxge/include/xgehal-device.h
+++ /dev/null
@@ -1,1012 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_DEVICE_H
-#define XGE_HAL_DEVICE_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-queue.h>
-#include <dev/nxge/include/xgehal-event.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-regs.h>
-#include <dev/nxge/include/xgehal-channel.h>
-#include <dev/nxge/include/xgehal-stats.h>
-#include <dev/nxge/include/xgehal-ring.h>
-
-__EXTERN_BEGIN_DECLS
-
-#define XGE_HAL_VPD_LENGTH 80
-#define XGE_HAL_CARD_XENA_VPD_ADDR 0x50
-#define XGE_HAL_CARD_HERC_VPD_ADDR 0x80
-#define XGE_HAL_VPD_READ_COMPLETE 0x80
-#define XGE_HAL_VPD_BUFFER_SIZE 128
-#define XGE_HAL_DEVICE_XMSI_WAIT_MAX_MILLIS 500
-#define XGE_HAL_DEVICE_CMDMEM_WAIT_MAX_MILLIS 500
-#define XGE_HAL_DEVICE_QUIESCENT_WAIT_MAX_MILLIS 500
-#define XGE_HAL_DEVICE_FAULT_WAIT_MAX_MILLIS 50
-#define XGE_HAL_DEVICE_RESET_WAIT_MAX_MILLIS 250
-#define XGE_HAL_DEVICE_SPDM_READY_WAIT_MAX_MILLIS 250 /* TODO */
-
-#define XGE_HAL_MAGIC 0x12345678
-#define XGE_HAL_DEAD 0xDEADDEAD
-#define XGE_HAL_DUMP_BUF_SIZE 0x4000
-
-#define XGE_HAL_LRO_MAX_BUCKETS 32
-
-/**
- * enum xge_hal_card_e - Xframe adapter type.
- * @XGE_HAL_CARD_UNKNOWN: Unknown device.
- * @XGE_HAL_CARD_XENA: Xframe I device.
- * @XGE_HAL_CARD_HERC: Xframe II (PCI-266Mhz) device.
- * @XGE_HAL_CARD_TITAN: Xframe ER (PCI-266Mhz) device.
- *
- * Enumerates Xframe adapter types. The corresponding PCI device
- * IDs are listed in the file xgehal-defs.h.
- * (See XGE_PCI_DEVICE_ID_XENA_1, etc.)
- *
- * See also: xge_hal_device_check_id().
- */
-typedef enum xge_hal_card_e {
- XGE_HAL_CARD_UNKNOWN = 0,
- XGE_HAL_CARD_XENA = 1,
- XGE_HAL_CARD_HERC = 2,
- XGE_HAL_CARD_TITAN = 3,
-} xge_hal_card_e;
-
-/**
- * struct xge_hal_device_attr_t - Device memory spaces.
- * @regh0: BAR0 mapped memory handle (Solaris), or simply PCI device @pdev
- * (Linux and the rest.)
- * @regh1: BAR1 mapped memory handle. Same comment as above.
- * @bar0: BAR0 virtual address.
- * @bar1: BAR1 virtual address.
- * @irqh: IRQ handle (Solaris).
- * @cfgh: Configuration space handle (Solaris), or PCI device @pdev (Linux).
- * @pdev: PCI device object.
- *
- * Device memory spaces. Includes configuration, BAR0, BAR1, etc. per device
- * mapped memories. Also, includes a pointer to OS-specific PCI device object.
- */
-typedef struct xge_hal_device_attr_t {
- pci_reg_h regh0;
- pci_reg_h regh1;
- pci_reg_h regh2;
- char *bar0;
- char *bar1;
- char *bar2;
- pci_irq_h irqh;
- pci_cfg_h cfgh;
- pci_dev_h pdev;
-} xge_hal_device_attr_t;
-
-/**
- * enum xge_hal_device_link_state_e - Link state enumeration.
- * @XGE_HAL_LINK_NONE: Invalid link state.
- * @XGE_HAL_LINK_DOWN: Link is down.
- * @XGE_HAL_LINK_UP: Link is up.
- *
- */
-typedef enum xge_hal_device_link_state_e {
- XGE_HAL_LINK_NONE,
- XGE_HAL_LINK_DOWN,
- XGE_HAL_LINK_UP
-} xge_hal_device_link_state_e;
-
-
-/**
- * enum xge_hal_pci_mode_e - PIC bus speed and mode specific enumeration.
- * @XGE_HAL_PCI_33MHZ_MODE: 33 MHZ pci mode.
- * @XGE_HAL_PCI_66MHZ_MODE: 66 MHZ pci mode.
- * @XGE_HAL_PCIX_M1_66MHZ_MODE: PCIX M1 66MHZ mode.
- * @XGE_HAL_PCIX_M1_100MHZ_MODE: PCIX M1 100MHZ mode.
- * @XGE_HAL_PCIX_M1_133MHZ_MODE: PCIX M1 133MHZ mode.
- * @XGE_HAL_PCIX_M2_66MHZ_MODE: PCIX M2 66MHZ mode.
- * @XGE_HAL_PCIX_M2_100MHZ_MODE: PCIX M2 100MHZ mode.
- * @XGE_HAL_PCIX_M2_133MHZ_MODE: PCIX M3 133MHZ mode.
- * @XGE_HAL_PCIX_M1_RESERVED: PCIX M1 reserved mode.
- * @XGE_HAL_PCIX_M1_66MHZ_NS: PCIX M1 66MHZ mode not supported.
- * @XGE_HAL_PCIX_M1_100MHZ_NS: PCIX M1 100MHZ mode not supported.
- * @XGE_HAL_PCIX_M1_133MHZ_NS: PCIX M1 133MHZ not supported.
- * @XGE_HAL_PCIX_M2_RESERVED: PCIX M2 reserved.
- * @XGE_HAL_PCIX_533_RESERVED: PCIX 533 reserved.
- * @XGE_HAL_PCI_BASIC_MODE: PCI basic mode, XENA specific value.
- * @XGE_HAL_PCIX_BASIC_MODE: PCIX basic mode, XENA specific value.
- * @XGE_HAL_PCI_INVALID_MODE: Invalid PCI or PCIX mode.
- *
- */
-typedef enum xge_hal_pci_mode_e {
- XGE_HAL_PCI_33MHZ_MODE = 0x0,
- XGE_HAL_PCI_66MHZ_MODE = 0x1,
- XGE_HAL_PCIX_M1_66MHZ_MODE = 0x2,
- XGE_HAL_PCIX_M1_100MHZ_MODE = 0x3,
- XGE_HAL_PCIX_M1_133MHZ_MODE = 0x4,
- XGE_HAL_PCIX_M2_66MHZ_MODE = 0x5,
- XGE_HAL_PCIX_M2_100MHZ_MODE = 0x6,
- XGE_HAL_PCIX_M2_133MHZ_MODE = 0x7,
- XGE_HAL_PCIX_M1_RESERVED = 0x8,
- XGE_HAL_PCIX_M1_66MHZ_NS = 0xA,
- XGE_HAL_PCIX_M1_100MHZ_NS = 0xB,
- XGE_HAL_PCIX_M1_133MHZ_NS = 0xC,
- XGE_HAL_PCIX_M2_RESERVED = 0xD,
- XGE_HAL_PCIX_533_RESERVED = 0xE,
- XGE_HAL_PCI_BASIC_MODE = 0x10,
- XGE_HAL_PCIX_BASIC_MODE = 0x11,
- XGE_HAL_PCI_INVALID_MODE = 0x12,
-} xge_hal_pci_mode_e;
-
-/**
- * enum xge_hal_pci_bus_frequency_e - PCI bus frequency enumeration.
- * @XGE_HAL_PCI_BUS_FREQUENCY_33MHZ: PCI bus frequency 33MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_66MHZ: PCI bus frequency 66MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_100MHZ: PCI bus frequency 100MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_133MHZ: PCI bus frequency 133MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_200MHZ: PCI bus frequency 200MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_250MHZ: PCI bus frequency 250MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_266MHZ: PCI bus frequency 266MHZ
- * @XGE_HAL_PCI_BUS_FREQUENCY_UNKNOWN: Unrecognized PCI bus frequency value.
- *
- */
-typedef enum xge_hal_pci_bus_frequency_e {
- XGE_HAL_PCI_BUS_FREQUENCY_33MHZ = 33,
- XGE_HAL_PCI_BUS_FREQUENCY_66MHZ = 66,
- XGE_HAL_PCI_BUS_FREQUENCY_100MHZ = 100,
- XGE_HAL_PCI_BUS_FREQUENCY_133MHZ = 133,
- XGE_HAL_PCI_BUS_FREQUENCY_200MHZ = 200,
- XGE_HAL_PCI_BUS_FREQUENCY_250MHZ = 250,
- XGE_HAL_PCI_BUS_FREQUENCY_266MHZ = 266,
- XGE_HAL_PCI_BUS_FREQUENCY_UNKNOWN = 0
-} xge_hal_pci_bus_frequency_e;
-
-/**
- * enum xge_hal_pci_bus_width_e - PCI bus width enumeration.
- * @XGE_HAL_PCI_BUS_WIDTH_64BIT: 64 bit bus width.
- * @XGE_HAL_PCI_BUS_WIDTH_32BIT: 32 bit bus width.
- * @XGE_HAL_PCI_BUS_WIDTH_UNKNOWN: unknown bus width.
- *
- */
-typedef enum xge_hal_pci_bus_width_e {
- XGE_HAL_PCI_BUS_WIDTH_64BIT = 0,
- XGE_HAL_PCI_BUS_WIDTH_32BIT = 1,
- XGE_HAL_PCI_BUS_WIDTH_UNKNOWN = 2,
-} xge_hal_pci_bus_width_e;
-
-#if defined (XGE_HAL_CONFIG_LRO)
-
-#define IP_TOTAL_LENGTH_OFFSET 2
-#define IP_FAST_PATH_HDR_MASK 0x45
-#define TCP_FAST_PATH_HDR_MASK1 0x50
-#define TCP_FAST_PATH_HDR_MASK2 0x10
-#define TCP_FAST_PATH_HDR_MASK3 0x18
-#define IP_SOURCE_ADDRESS_OFFSET 12
-#define IP_DESTINATION_ADDRESS_OFFSET 16
-#define TCP_DESTINATION_PORT_OFFSET 2
-#define TCP_SOURCE_PORT_OFFSET 0
-#define TCP_DATA_OFFSET_OFFSET 12
-#define TCP_WINDOW_OFFSET 14
-#define TCP_SEQUENCE_NUMBER_OFFSET 4
-#define TCP_ACKNOWLEDGEMENT_NUMBER_OFFSET 8
-
-typedef struct tcplro {
- u16 source;
- u16 dest;
- u32 seq;
- u32 ack_seq;
- u8 doff_res;
- u8 ctrl;
- u16 window;
- u16 check;
- u16 urg_ptr;
-} tcplro_t;
-
-typedef struct iplro {
- u8 version_ihl;
- u8 tos;
- u16 tot_len;
- u16 id;
- u16 frag_off;
- u8 ttl;
- u8 protocol;
- u16 check;
- u32 saddr;
- u32 daddr;
- /*The options start here. */
-} iplro_t;
-
-/*
- * LRO object, one per each LRO session.
-*/
-typedef struct lro {
- /* non-linear: contains scatter-gather list of
- xframe-mapped received buffers */
- OS_NETSTACK_BUF os_buf;
- OS_NETSTACK_BUF os_buf_end;
-
- /* link layer header of the first frame;
- remains intack throughout the processing */
- u8 *ll_hdr;
-
- /* IP header - gets _collapsed_ */
- iplro_t *ip_hdr;
-
- /* transport header - gets _collapsed_ */
- tcplro_t *tcp_hdr;
-
- /* Next tcp sequence number */
- u32 tcp_next_seq_num;
- /* Current tcp seq & ack */
- u32 tcp_seq_num;
- u32 tcp_ack_num;
-
- /* total number of accumulated (so far) frames */
- int sg_num;
-
- /* total data length */
- int total_length;
-
- /* receive side hash value, available from Hercules */
- u32 rth_value;
-
- /* In use */
- u8 in_use;
-
- /* Total length of the fragments clubbed with the inital frame */
- u32 frags_len;
-
- /* LRO frame contains time stamp, if (ts_off != -1) */
- int ts_off;
-
-} lro_t;
-#endif
-
-/*
- * xge_hal_spdm_entry_t
- *
- * Represents a single spdm entry in the SPDM table.
- */
-typedef struct xge_hal_spdm_entry_t {
- xge_hal_ipaddr_t src_ip;
- xge_hal_ipaddr_t dst_ip;
- u32 jhash_value;
- u16 l4_sp;
- u16 l4_dp;
- u16 spdm_entry;
- u8 in_use;
- u8 is_tcp;
- u8 is_ipv4;
- u8 tgt_queue;
-} xge_hal_spdm_entry_t;
-
-#if defined(XGE_HAL_CONFIG_LRO)
-typedef struct {
- lro_t lro_pool[XGE_HAL_LRO_MAX_BUCKETS];
- int lro_next_idx;
- lro_t *lro_recent;
-} xge_hal_lro_desc_t;
-#endif
-/*
- * xge_hal_vpd_data_t
- *
- * Represents vpd capabilty structure
- */
-typedef struct xge_hal_vpd_data_t {
- u8 product_name[XGE_HAL_VPD_LENGTH];
- u8 serial_num[XGE_HAL_VPD_LENGTH];
-} xge_hal_vpd_data_t;
-
-/*
- * xge_hal_device_t
- *
- * HAL device object. Represents Xframe.
- */
-typedef struct {
- unsigned int magic;
- pci_reg_h regh0;
- pci_reg_h regh1;
- pci_reg_h regh2;
- char *bar0;
- char *isrbar0;
- char *bar1;
- char *bar2;
- pci_irq_h irqh;
- pci_cfg_h cfgh;
- pci_dev_h pdev;
- xge_hal_pci_config_t pci_config_space;
- xge_hal_pci_config_t pci_config_space_bios;
- xge_hal_device_config_t config;
- xge_list_t free_channels;
- xge_list_t fifo_channels;
- xge_list_t ring_channels;
- volatile int is_initialized;
- volatile int terminating;
- xge_hal_stats_t stats;
- macaddr_t macaddr[1];
- xge_queue_h queueh;
- volatile int mcast_refcnt;
- int is_promisc;
- volatile xge_hal_device_link_state_e link_state;
- void *upper_layer_info;
- xge_hal_device_attr_t orig_attr;
- u16 device_id;
- u8 revision;
- int msi_enabled;
- int hw_is_initialized;
- u64 inject_serr;
- u64 inject_ecc;
- u8 inject_bad_tcode;
- int inject_bad_tcode_for_chan_type;
- int reset_needed_after_close;
- int tti_enabled;
- xge_hal_tti_config_t bimodal_tti[XGE_HAL_MAX_RING_NUM];
- int bimodal_timer_val_us;
- int bimodal_urange_a_en;
- int bimodal_intr_cnt;
- char *spdm_mem_base;
- u16 spdm_max_entries;
- xge_hal_spdm_entry_t **spdm_table;
- spinlock_t spdm_lock;
-#if defined(XGE_HAL_CONFIG_LRO)
- xge_hal_lro_desc_t lro_desc[XGE_HAL_MAX_RING_NUM];
-#endif
- spinlock_t xena_post_lock;
-
- /* bimodal workload stats */
- int irq_workload_rxd[XGE_HAL_MAX_RING_NUM];
- int irq_workload_rxcnt[XGE_HAL_MAX_RING_NUM];
- int irq_workload_rxlen[XGE_HAL_MAX_RING_NUM];
- int irq_workload_txd[XGE_HAL_MAX_FIFO_NUM];
- int irq_workload_txcnt[XGE_HAL_MAX_FIFO_NUM];
- int irq_workload_txlen[XGE_HAL_MAX_FIFO_NUM];
-
- int mtu_first_time_set;
- u64 rxufca_lbolt;
- u64 rxufca_lbolt_time;
- u64 rxufca_intr_thres;
- char* dump_buf;
- xge_hal_pci_mode_e pci_mode;
- xge_hal_pci_bus_frequency_e bus_frequency;
- xge_hal_pci_bus_width_e bus_width;
- xge_hal_vpd_data_t vpd_data;
- volatile int in_poll;
- u64 msix_vector_table[XGE_HAL_MAX_MSIX_MESSAGES_WITH_ADDR];
-} xge_hal_device_t;
-
-
-/* ========================== PRIVATE API ================================= */
-
-void
-__hal_device_event_queued(void *data, int event_type);
-
-xge_hal_status_e
-__hal_device_set_swapper(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_rth_it_configure(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_rth_spdm_configure(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_verify_pcc_idle(xge_hal_device_t *hldev, u64 adp_status);
-
-xge_hal_status_e
-__hal_device_handle_pic(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_read_spdm_entry_line(xge_hal_device_t *hldev, u8 spdm_line,
- u16 spdm_entry, u64 *spdm_line_val);
-
-void __hal_pio_mem_write32_upper(pci_dev_h pdev, pci_reg_h regh, u32 val,
- void *addr);
-
-void __hal_pio_mem_write32_lower(pci_dev_h pdev, pci_reg_h regh, u32 val,
- void *addr);
-void __hal_device_get_vpd_data(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_handle_txpic(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_txdma(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_txmac(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_txxgxs(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_rxpic(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_rxdma(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_rxmac(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_rxxgxs(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_handle_mc(xge_hal_device_t *hldev, u64 reason);
-
-xge_hal_status_e
-__hal_device_register_poll(xge_hal_device_t *hldev, u64 *reg, int op, u64 mask,
- int max_millis);
-xge_hal_status_e
-__hal_device_rts_mac_configure(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_rts_qos_configure(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_rts_port_configure(xge_hal_device_t *hldev);
-
-xge_hal_status_e
-__hal_device_rti_configure(xge_hal_device_t *hldev, int runtime);
-
-void
-__hal_device_msi_intr_endis(xge_hal_device_t *hldev, int flag);
-
-void
-__hal_device_msix_intr_endis(xge_hal_device_t *hldev,
- xge_hal_channel_t *channel, int flag);
-
-/* =========================== PUBLIC API ================================= */
-
-unsigned int
-__hal_fix_time_ival_herc(xge_hal_device_t *hldev,
- unsigned int time_ival);
-xge_hal_status_e
-xge_hal_rts_rth_itable_set(xge_hal_device_t *hldev, u8 *itable,
- u32 itable_size);
-
-void
-xge_hal_rts_rth_set(xge_hal_device_t *hldev, u8 def_q, u64 hash_type,
- u16 bucket_size);
-
-void
-xge_hal_rts_rth_init(xge_hal_device_t *hldev);
-
-void
-xge_hal_rts_rth_clr(xge_hal_device_t *hldev);
-
-void
-xge_hal_rts_rth_start(xge_hal_device_t *hldev);
-
-void
-xge_hal_rts_rth_stop(xge_hal_device_t *hldev);
-
-void
-xge_hal_device_rts_rth_key_set(xge_hal_device_t *hldev, u8 KeySize, u8 *Key);
-
-xge_hal_status_e
-xge_hal_device_rts_mac_enable(xge_hal_device_h devh, int index, macaddr_t macaddr);
-
-xge_hal_status_e
-xge_hal_device_rts_mac_disable(xge_hal_device_h devh, int index);
-
-int xge_hal_reinitialize_hw(xge_hal_device_t * hldev);
-
-xge_hal_status_e xge_hal_fix_rldram_ecc_error(xge_hal_device_t * hldev);
-/**
- * xge_hal_device_rti_reconfigure
- * @hldev: Hal Device
- */
-static inline xge_hal_status_e
-xge_hal_device_rti_reconfigure(xge_hal_device_t *hldev)
-{
- return __hal_device_rti_configure(hldev, 1);
-}
-
-/**
- * xge_hal_device_rts_port_reconfigure
- * @hldev: Hal Device
- */
-static inline xge_hal_status_e
-xge_hal_device_rts_port_reconfigure(xge_hal_device_t *hldev)
-{
- return __hal_device_rts_port_configure(hldev);
-}
-
-/**
- * xge_hal_device_is_initialized - Returns 0 if device is not
- * initialized, non-zero otherwise.
- * @devh: HAL device handle.
- *
- * Returns 0 if device is not initialized, non-zero otherwise.
- */
-static inline int
-xge_hal_device_is_initialized(xge_hal_device_h devh)
-{
- return ((xge_hal_device_t*)devh)->is_initialized;
-}
-
-
-/**
- * xge_hal_device_in_poll - non-zero, if xge_hal_device_poll() is executing.
- * @devh: HAL device handle.
- *
- * Returns non-zero if xge_hal_device_poll() is executing, and 0 - otherwise.
- */
-static inline int
-xge_hal_device_in_poll(xge_hal_device_h devh)
-{
- return ((xge_hal_device_t*)devh)->in_poll;
-}
-
-
-/**
- * xge_hal_device_inject_ecc - Inject ECC error.
- * @devh: HAL device, pointer to xge_hal_device_t structure.
- * @err_reg: Contains the error register.
- *
- * This function is used to inject ECC error into the driver flow.
- * This facility can be used to test the driver flow in the
- * case of ECC error is reported by the firmware.
- *
- * Returns: void
- * See also: xge_hal_device_inject_serr(),
- * xge_hal_device_inject_bad_tcode()
- */
-static inline void
-xge_hal_device_inject_ecc(xge_hal_device_h devh, u64 err_reg)
-{
- ((xge_hal_device_t*)devh)->inject_ecc = err_reg;
-}
-
-
-/**
- * xge_hal_device_inject_serr - Inject SERR error.
- * @devh: HAL device, pointer to xge_hal_device_t structure.
- * @err_reg: Contains the error register.
- *
- * This function is used to inject SERR error into the driver flow.
- * This facility can be used to test the driver flow in the
- * case of SERR error is reported by firmware.
- *
- * Returns: void
- * See also: xge_hal_device_inject_ecc(),
- * xge_hal_device_inject_bad_tcode()
- */
-static inline void
-xge_hal_device_inject_serr(xge_hal_device_h devh, u64 err_reg)
-{
- ((xge_hal_device_t*)devh)->inject_serr = err_reg;
-}
-
-
-/**
- * xge_hal_device_inject_bad_tcode - Inject Bad transfer code.
- * @devh: HAL device, pointer to xge_hal_device_t structure.
- * @chan_type: Channel type (fifo/ring).
- * @t_code: Transfer code.
- *
- * This function is used to inject bad (Tx/Rx Data)transfer code
- * into the driver flow.
- *
- * This facility can be used to test the driver flow in the
- * case of bad transfer code reported by firmware for a Tx/Rx data
- * transfer.
- *
- * Returns: void
- * See also: xge_hal_device_inject_ecc(), xge_hal_device_inject_serr()
- */
-static inline void
-xge_hal_device_inject_bad_tcode(xge_hal_device_h devh, int chan_type, u8 t_code)
-{
- ((xge_hal_device_t*)devh)->inject_bad_tcode_for_chan_type = chan_type;
- ((xge_hal_device_t*)devh)->inject_bad_tcode = t_code;
-}
-
-void xge_hal_device_msi_enable(xge_hal_device_h devh);
-
-/*
- * xge_hal_device_msi_mode - Is MSI enabled?
- * @devh: HAL device handle.
- *
- * Returns 0 if MSI is enabled for the specified device,
- * non-zero otherwise.
- */
-static inline int
-xge_hal_device_msi_mode(xge_hal_device_h devh)
-{
- return ((xge_hal_device_t*)devh)->msi_enabled;
-}
-
-/**
- * xge_hal_device_queue - Get per-device event queue.
- * @devh: HAL device handle.
- *
- * Returns: event queue associated with the specified HAL device.
- */
-static inline xge_queue_h
-xge_hal_device_queue (xge_hal_device_h devh)
-{
- return ((xge_hal_device_t*)devh)->queueh;
-}
-
-/**
- * xge_hal_device_attr - Get original (user-specified) device
- * attributes.
- * @devh: HAL device handle.
- *
- * Returns: original (user-specified) device attributes.
- */
-static inline xge_hal_device_attr_t*
-xge_hal_device_attr(xge_hal_device_h devh)
-{
- return &((xge_hal_device_t*)devh)->orig_attr;
-}
-
-/**
- * xge_hal_device_private_set - Set ULD context.
- * @devh: HAL device handle.
- * @data: pointer to ULD context
- *
- * Use HAL device to set upper-layer driver (ULD) context.
- *
- * See also: xge_hal_device_from_private(), xge_hal_device_private()
- */
-static inline void
-xge_hal_device_private_set(xge_hal_device_h devh, void *data)
-{
- ((xge_hal_device_t*)devh)->upper_layer_info = data;
-}
-
-/**
- * xge_hal_device_private - Get ULD context.
- * @devh: HAL device handle.
- *
- * Use HAL device to get upper-layer driver (ULD) context.
- *
- * Returns: ULD context.
- *
- * See also: xge_hal_device_from_private(), xge_hal_device_private_set()
- */
-static inline void*
-xge_hal_device_private(xge_hal_device_h devh)
-{
- return ((xge_hal_device_t*)devh)->upper_layer_info;
-}
-
-/**
- * xge_hal_device_from_private - Get HAL device object from private.
- * @info_ptr: ULD context.
- *
- * Use ULD context to get HAL device.
- *
- * Returns: Device handle.
- *
- * See also: xge_hal_device_private(), xge_hal_device_private_set()
- */
-static inline xge_hal_device_h
-xge_hal_device_from_private(void *info_ptr)
-{
- return xge_container_of((void ** ) info_ptr, xge_hal_device_t,
- upper_layer_info);
-}
-
-/**
- * xge_hal_device_mtu_check - check MTU value for ranges
- * @hldev: the device
- * @new_mtu: new MTU value to check
- *
- * Will do sanity check for new MTU value.
- *
- * Returns: XGE_HAL_OK - success.
- * XGE_HAL_ERR_INVALID_MTU_SIZE - MTU is invalid.
- *
- * See also: xge_hal_device_mtu_set()
- */
-static inline xge_hal_status_e
-xge_hal_device_mtu_check(xge_hal_device_t *hldev, int new_mtu)
-{
- if ((new_mtu < XGE_HAL_MIN_MTU) || (new_mtu > XGE_HAL_MAX_MTU)) {
- return XGE_HAL_ERR_INVALID_MTU_SIZE;
- }
-
- return XGE_HAL_OK;
-}
-
-void xge_hal_device_bcast_enable(xge_hal_device_h devh);
-
-void xge_hal_device_bcast_disable(xge_hal_device_h devh);
-
-void xge_hal_device_terminating(xge_hal_device_h devh);
-
-xge_hal_status_e xge_hal_device_initialize(xge_hal_device_t *hldev,
- xge_hal_device_attr_t *attr, xge_hal_device_config_t *config);
-
-void xge_hal_device_terminate(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_reset(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_macaddr_get(xge_hal_device_t *hldev,
- int index, macaddr_t *macaddr);
-
-xge_hal_status_e xge_hal_device_macaddr_set(xge_hal_device_t *hldev,
- int index, macaddr_t macaddr);
-
-xge_hal_status_e xge_hal_device_macaddr_clear(xge_hal_device_t *hldev,
- int index);
-
-int xge_hal_device_macaddr_find(xge_hal_device_t *hldev, macaddr_t wanted);
-
-xge_hal_status_e xge_hal_device_mtu_set(xge_hal_device_t *hldev, int new_mtu);
-
-xge_hal_status_e xge_hal_device_status(xge_hal_device_t *hldev, u64 *hw_status);
-
-void xge_hal_device_intr_enable(xge_hal_device_t *hldev);
-
-void xge_hal_device_intr_disable(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_mcast_enable(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_mcast_disable(xge_hal_device_t *hldev);
-
-void xge_hal_device_promisc_enable(xge_hal_device_t *hldev);
-
-void xge_hal_device_promisc_disable(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_disable(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_enable(xge_hal_device_t *hldev);
-
-xge_hal_status_e xge_hal_device_handle_tcode(xge_hal_channel_h channelh,
- xge_hal_dtr_h dtrh,
- u8 t_code);
-
-xge_hal_status_e xge_hal_device_link_state(xge_hal_device_h devh,
- xge_hal_device_link_state_e *ls);
-
-void xge_hal_device_sched_timer(xge_hal_device_h devh, int interval_us,
- int one_shot);
-
-void xge_hal_device_poll(xge_hal_device_h devh);
-
-xge_hal_card_e xge_hal_device_check_id(xge_hal_device_h devh);
-
-int xge_hal_device_is_slot_freeze(xge_hal_device_h devh);
-
-xge_hal_status_e
-xge_hal_device_pci_info_get(xge_hal_device_h devh, xge_hal_pci_mode_e *pci_mode,
- xge_hal_pci_bus_frequency_e *bus_frequency,
- xge_hal_pci_bus_width_e *bus_width);
-
-xge_hal_status_e
-xge_hal_spdm_entry_add(xge_hal_device_h devh, xge_hal_ipaddr_t *src_ip,
- xge_hal_ipaddr_t *dst_ip, u16 l4_sp, u16 l4_dp,
- u8 is_tcp, u8 is_ipv4, u8 tgt_queue);
-
-xge_hal_status_e
-xge_hal_spdm_entry_remove(xge_hal_device_h devh, xge_hal_ipaddr_t *src_ip,
- xge_hal_ipaddr_t *dst_ip, u16 l4_sp, u16 l4_dp,
- u8 is_tcp, u8 is_ipv4);
-
-xge_hal_status_e
-xge_hal_device_rts_section_enable(xge_hal_device_h devh, int index);
-
-int
-xge_hal_device_is_closed (xge_hal_device_h devh);
-
-/* private functions, don't use them in ULD */
-
-void __hal_serial_mem_write64(xge_hal_device_t *hldev, u64 value, u64 *reg);
-
-u64 __hal_serial_mem_read64(xge_hal_device_t *hldev, u64 *reg);
-
-
-/* Some function protoypes for MSI implementation. */
-xge_hal_status_e
-xge_hal_channel_msi_set (xge_hal_channel_h channelh, int msi,
- u32 msg_val);
-void
-xge_hal_mask_msi(xge_hal_device_t *hldev);
-
-void
-xge_hal_unmask_msi(xge_hal_channel_h channelh);
-
-xge_hal_status_e
-xge_hal_channel_msix_set(xge_hal_channel_h channelh, int msix_idx);
-
-xge_hal_status_e
-xge_hal_mask_msix(xge_hal_device_h devh, int msi_id);
-
-xge_hal_status_e
-xge_hal_unmask_msix(xge_hal_device_h devh, int msi_id);
-
-#if defined(XGE_HAL_CONFIG_LRO)
-xge_hal_status_e
-xge_hal_lro_init(u32 lro_scale, xge_hal_device_t *hldev);
-
-void
-xge_hal_lro_terminate(u32 lro_scale, xge_hal_device_t *hldev);
-#endif
-
-#if defined(XGE_DEBUG_FP) && (XGE_DEBUG_FP & XGE_DEBUG_FP_DEVICE)
-#define __HAL_STATIC_DEVICE
-#define __HAL_INLINE_DEVICE
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE int
-xge_hal_device_rev(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_begin_irq(xge_hal_device_t *hldev, u64 *reason);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_clear_rx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_clear_tx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_continue_irq(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_handle_irq(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_bar0(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_isrbar0(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_bar1(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_isrbar0_set(xge_hal_device_t *hldev, char *isrbar0);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_bar1_set(xge_hal_device_t *hldev, xge_hal_channel_h channelh,
- char *bar1);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_tx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_rx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_all(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_tx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_rx(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_all(xge_hal_device_t *hldev);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_tx_channels(xge_hal_device_t *hldev, int *got_tx);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_rx_channels(xge_hal_device_t *hldev, int *got_rx);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_rx_channel(xge_hal_channel_t *channel, int *got_rx);
-
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_tx_channel(xge_hal_channel_t *channel, int *got_tx);
-
-#if defined (XGE_HAL_CONFIG_LRO)
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u8
-__hal_header_parse_token_u8(u8 *string,u16 offset);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u16
-__hal_header_parse_token_u16(u8 *string,u16 offset);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u32
-__hal_header_parse_token_u32(u8 *string,u16 offset);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_header_update_u8(u8 *string, u16 offset, u8 val);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_header_update_u16(u8 *string, u16 offset, u16 val);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_header_update_u32(u8 *string, u16 offset, u32 val);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u16
-__hal_tcp_seg_len(iplro_t *ip, tcplro_t *tcp);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_ip_lro_capable(iplro_t *ip, xge_hal_dtr_info_t *ext_info);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_tcp_lro_capable(iplro_t *ip, tcplro_t *tcp, lro_t *lro, int *ts_off);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_lro_capable(u8 *buffer, iplro_t **ip, tcplro_t **tcp,
- xge_hal_dtr_info_t *ext_info);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_get_lro_session(u8 *eth_hdr, iplro_t *ip, tcplro_t *tcp, lro_t **lro,
- xge_hal_dtr_info_t *ext_info, xge_hal_device_t *hldev,
- xge_hal_lro_desc_t *ring_lro, lro_t **lro_end3);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_lro_under_optimal_thresh(iplro_t *ip, tcplro_t *tcp, lro_t *lro,
- xge_hal_device_t *hldev);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_collapse_ip_hdr(iplro_t *ip, tcplro_t *tcp, lro_t *lro,
- xge_hal_device_t *hldev);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_collapse_tcp_hdr(iplro_t *ip, tcplro_t *tcp, lro_t *lro,
- xge_hal_device_t *hldev);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_append_lro(iplro_t *ip, tcplro_t **tcp, u32 *seg_len, lro_t *lro,
- xge_hal_device_t *hldev);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-xge_hal_lro_process_rx(int ring, u8 *eth_hdr, u8 *ip_hdr, tcplro_t **tcp,
- u32 *seglen, lro_t **p_lro,
- xge_hal_dtr_info_t *ext_info, xge_hal_device_t *hldev,
- lro_t **lro_end3);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-xge_hal_accumulate_large_rx(u8 *buffer, tcplro_t **tcp, u32 *seglen,
- lro_t **lro, xge_hal_dtr_info_t *ext_info,
- xge_hal_device_t *hldev, lro_t **lro_end3);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL lro_t *
-xge_hal_lro_next_session (xge_hal_device_t *hldev, int ring);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL lro_t *
-xge_hal_lro_get_next_session(xge_hal_device_t *hldev);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_open_lro_session (u8 *buffer, iplro_t *ip, tcplro_t *tcp, lro_t **lro,
- xge_hal_device_t *hldev, xge_hal_lro_desc_t *ring_lro,
- int slot, u32 tcp_seg_len, int ts_off);
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-__hal_lro_get_free_slot (xge_hal_lro_desc_t *ring_lro);
-#endif
-
-#else /* XGE_FASTPATH_EXTERN */
-#define __HAL_STATIC_DEVICE static
-#define __HAL_INLINE_DEVICE inline
-#include <dev/nxge/xgehal/xgehal-device-fp.c>
-#endif /* XGE_FASTPATH_INLINE */
-
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_DEVICE_H */
diff --git a/sys/dev/nxge/include/xgehal-driver.h b/sys/dev/nxge/include/xgehal-driver.h
deleted file mode 100644
index d375570f1076..000000000000
--- a/sys/dev/nxge/include/xgehal-driver.h
+++ /dev/null
@@ -1,316 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_DRIVER_H
-#define XGE_HAL_DRIVER_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-list.h>
-#include <dev/nxge/include/xge-queue.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-event.h>
-
-__EXTERN_BEGIN_DECLS
-
-/* maximum number of events consumed in a syncle poll() cycle */
-#define XGE_HAL_DRIVER_QUEUE_CONSUME_MAX 5
-
-
-/**
- * function xge_uld_sched_timer_cb_f - Per-device periodic timer
- * callback.
- * @devh: HAL device handle.
- * @userdata: Per-device user data (a.k.a. context) specified via
- * xge_hal_device_initialize().
- *
- * Periodic or one-shot timer callback. If specified (that is, not NULL)
- * HAL invokes this callback periodically. The call is performed in the
- * interrupt context, or more exactly, in the context of HAL's ISR
- * xge_hal_device_continue_irq().
- *
- * See also: xge_hal_device_initialize{}
- */
-typedef void (*xge_uld_sched_timer_cb_f)(xge_hal_device_h devh, void *userdata);
-
-/**
- * function xge_uld_link_up_f - Link-Up callback provided by upper-layer
- * driver.
- * @userdata: Opaque context set by the ULD via
- * xge_hal_device_private_set()
- * (typically - at HAL device iinitialization time).
- *
- * Link-up notification callback provided by the ULD.
- * This is one of the per-driver callbacks, see xge_hal_uld_cbs_t{}.
- *
- * See also: xge_hal_uld_cbs_t{}, xge_uld_link_down_f{},
- * xge_hal_driver_initialize(), xge_hal_device_private_set().
- */
-typedef void (*xge_uld_link_up_f) (void *userdata);
-
-/**
- * function xge_uld_link_down_f - Link-Down callback provided by
- * upper-layer driver.
- * @userdata: Opaque context set by the ULD via
- * xge_hal_device_private_set()
- * (typically - at HAL device iinitialization time).
- *
- * Link-Down notification callback provided by the upper-layer driver.
- * This is one of the per-driver callbacks, see xge_hal_uld_cbs_t{}.
- *
- * See also: xge_hal_uld_cbs_t{}, xge_uld_link_up_f{},
- * xge_hal_driver_initialize(), xge_hal_device_private_set().
- */
-typedef void (*xge_uld_link_down_f) (void *userdata);
-
-/**
- * function xge_uld_crit_err_f - Critical Error notification callback.
- * @userdata: Opaque context set by the ULD via
- * xge_hal_device_private_set()
- * (typically - at HAL device iinitialization time).
- * @type: Enumerated hw error, e.g.: double ECC.
- * @serr_data: Xframe status.
- * @ext_data: Extended data. The contents depends on the @type.
- *
- * Link-Down notification callback provided by the upper-layer driver.
- * This is one of the per-driver callbacks, see xge_hal_uld_cbs_t{}.
- *
- * See also: xge_hal_uld_cbs_t{}, xge_hal_event_e{},
- * xge_hal_device_private_set(), xge_hal_driver_initialize().
- */
-typedef void (*xge_uld_crit_err_f) (void *userdata, xge_hal_event_e type,
- u64 ext_data);
-
-/**
- * function xge_uld_event_queued_f - Event-enqueued notification
- * callback.
- * @devh: HAL device handle.
- * @event_type: HAL- or ULD-defined event type. Note that HAL
- * events are enumerated by xge_hal_event_e{}.
- *
- * "Event-was-enqueued" notification callback provided by the upper-layer
- * driver. The callback is invoked (if defined, i.e., not NULL in the
- * xge_hal_uld_cbs_t{} structure) each time immediately after an event
- * is enqueued.
- *
- * See also: xge_hal_uld_cbs_t{}, xge_hal_device_private_set(),
- * xge_hal_driver_initialize().
- */
-typedef void (*xge_uld_event_queued_f) (xge_hal_device_h devh, int event_type);
-
-/**
- * function xge_uld_event_f - ULD event callback.
- * @item: ULD-defined event, item of the xge_queue_t.
- *
- * ULD event callback.
- * Upper-layer driver can use HAL queue to serialize certain slow-path
- * events. HAL periodically polls the queue as part of the
- * xge_hal_device_poll() processing. When/if HAL discovers in the queue
- * an unkown event type it simply invokes the event callback
- * (which must be non-NULL and supplied by the ULD in this case).
- *
- * See also: xge_hal_uld_cbs_t{}, xge_hal_device_poll(), xge_queue_t{},
- * xge_hal_driver_initialize(), xge_queue_item_t{}.
- */
-typedef void (*xge_uld_event_f) (xge_queue_item_t *item);
-
-/**
- * function xge_uld_before_device_poll_f - ULD "before-poll" callback.
- * @devh: HAL device handle.
- *
- * HAL invokes the callback from inside its xge_hal_device_poll()
- * implementation %prior to accessing the @devh device. This allows ULD to
- * perform per-device locking and/or context mapping, if required..
- * The interface is currently used by AIX driver only.
- * To avoid using/implementing the callback set the corresponding field
- * in the xge_hal_uld_cbs_t{} structure to NULL.
- *
- * Returns: 0 on success, non-zero on failure.
- *
- * See also: xge_hal_driver_initialize(), xge_hal_uld_cbs_t{},
- * xge_hal_device_poll().
- */
-typedef int (*xge_uld_before_device_poll_f) (xge_hal_device_h devh);
-
-/**
- * function xge_uld_after_device_poll_f - ULD "after-poll" callback.
- * @devh: HAL device handle.
- *
- * Unless NULL is specified,
- * HAL invokes the callback from inside its xge_hal_device_poll()
- * implementation immediately %after it has completed polling the @devh
- * device. This allows ULD to undo the affects of
- * xge_uld_before_device_poll_f{}.
- * The interface is currently used by AIX driver only.
- *
- * See also: xge_hal_driver_initialize(), xge_hal_uld_cbs_t{},
- * xge_hal_device_poll().
- */
-typedef void (*xge_uld_after_device_poll_f) (xge_hal_device_h devh);
-
-/**
- * function xge_uld_xpak_alarm_log_f - ULD "XPAK alarm log" callback.
- * @devh: HAL device handle.
- * @type: TODO
- *
- * Unless NULL is specified,
- * HAL invokes the callback from inside __hal_chk_xpak_counter()
- */
-typedef void (*xge_uld_xpak_alarm_log_f) (xge_hal_device_h devh, xge_hal_xpak_alarm_type_e type);
-
-/**
- * struct xge_hal_uld_cbs_t - Upper-layer driver "slow-path" callbacks.
- * @link_up: See xge_uld_link_up_f{}.
- * @link_down: See xge_uld_link_down_f{}.
- * @crit_err: See xge_uld_crit_err_f{}.
- * @event: See xge_uld_event_f{}.
- * @event_queued: See xge_uld_event_queued_f{}.
- * @before_device_poll: See xge_uld_before_device_poll_f{}.
- * @after_device_poll: See xge_uld_after_device_poll_f{}.
- * @sched_timer: See xge_uld_sched_timer_cb_f{}.
- * @xpak_alarm_log: TODO
- *
- * Upper layer driver slow-path (per-driver) callbacks.
- * Implemented by ULD and provided to HAL via
- * xge_hal_driver_initialize().
- * Note that these callbacks are not mandatory: HAL will not invoke
- * a callback if NULL is specified.
- *
- * Note that in addition to those, there are curently 2 per-channel callbacks
- * (completion and abort) specified at channel open time
- * via xge_hal_channel_open().
- *
- * See also: xge_hal_driver_initialize().
- */
-typedef struct xge_hal_uld_cbs_t {
- xge_uld_link_up_f link_up;
- xge_uld_link_down_f link_down;
- xge_uld_crit_err_f crit_err;
- xge_uld_event_f event;
- xge_uld_event_queued_f event_queued;
- xge_uld_before_device_poll_f before_device_poll;
- xge_uld_after_device_poll_f after_device_poll;
- xge_uld_sched_timer_cb_f sched_timer;
- xge_uld_xpak_alarm_log_f xpak_alarm_log;
-} xge_hal_uld_cbs_t;
-
-/**
- * struct xge_hal_driver_t - Represents HAL object.
- * @config: HAL configuration.
- * @devices: List of all PCI-enumerated Xframe devices in the system.
- * A single xge_hal_driver_t instance contains zero or more
- * Xframe devices.
- * @devices_lock: Lock to protect %devices when inserting/removing.
- * @is_initialized: True if HAL is initialized; false otherwise.
- * @uld_callbacks: Upper-layer driver callbacks. See xge_hal_uld_cbs_t{}.
- * @debug_module_mask: 32bit mask that defines which components of the
- * driver are to be traced. The trace-able components are:
- * XGE_COMPONENT_HAL_CONFIG 0x1
- * XGE_COMPONENT_HAL_FIFO 0x2
- * XGE_COMPONENT_HAL_RING 0x4
- * XGE_COMPONENT_HAL_CHANNEL 0x8
- * XGE_COMPONENT_HAL_DEVICE 0x10
- * XGE_COMPONENT_HAL_MM 0x20
- * XGE_COMPONENT_HAL_QUEUE 0x40
- * XGE_COMPONENT_HAL_STATS 0x100
- * XGE_COMPONENT_OSDEP 0x1000
- * XGE_COMPONENT_LL 0x2000
- * XGE_COMPONENT_TOE 0x4000
- * XGE_COMPONENT_RDMA 0x8000
- * XGE_COMPONENT_ALL 0xffffffff
- * The @debug_module_mask allows to switch off and on tracing at runtime.
- * In addition, the traces for the same trace-able components can be
- * compiled out, based on the same mask provided via Makefile.
- * @debug_level: See xge_debug_level_e{}.
- *
- * HAL (driver) object. There is a single instance of this structure per HAL.
- */
-typedef struct xge_hal_driver_t {
- xge_hal_driver_config_t config;
- int is_initialized;
- xge_hal_uld_cbs_t uld_callbacks;
- u32 debug_module_mask;
- int debug_level;
-} xge_hal_driver_t;
-
-extern xge_hal_driver_t *g_xge_hal_driver;
-
-static inline int
-xge_hal_driver_is_initialized(void) {
- return g_xge_hal_driver->is_initialized;
-}
-
-static inline int
-xge_hal_driver_debug_module_mask(void)
-{
- return g_xge_hal_driver->debug_module_mask;
-}
-
-static inline void
-xge_hal_driver_debug_module_mask_set(u32 new_mask)
-{
-#if (defined(XGE_DEBUG_TRACE_MASK) && XGE_DEBUG_TRACE_MASK > 0) || \
- (defined(XGE_DEBUG_ERR_MASK) && XGE_DEBUG_ERR_MASK > 0)
- g_xge_hal_driver->debug_module_mask = new_mask;
- g_module_mask = (unsigned long *)&g_xge_hal_driver->debug_module_mask;
-#endif
-}
-
-static inline int
-xge_hal_driver_debug_level(void) { return g_xge_hal_driver->debug_level; }
-
-static inline void
-xge_hal_driver_debug_level_set(int new_level)
-{
-#if (defined(XGE_DEBUG_TRACE_MASK) && XGE_DEBUG_TRACE_MASK > 0) || \
- (defined(XGE_DEBUG_ERR_MASK) && XGE_DEBUG_ERR_MASK > 0)
- g_xge_hal_driver->debug_level = new_level;
- g_level = &g_xge_hal_driver->debug_level;
-#endif
-}
-
-xge_hal_status_e xge_hal_driver_initialize(xge_hal_driver_config_t *config,
- xge_hal_uld_cbs_t *uld_callbacks);
-
-void xge_hal_driver_terminate(void);
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
-void xge_hal_driver_tracebuf_dump(void);
-
-xge_hal_status_e
-xge_hal_driver_tracebuf_read(int bufsize, char *retbuf, int *retsize);
-#else
-#define xge_hal_driver_tracebuf_dump()
-#define xge_hal_driver_tracebuf_read(a, b, c) (0);
-#endif
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_DRIVER_H */
diff --git a/sys/dev/nxge/include/xgehal-event.h b/sys/dev/nxge/include/xgehal-event.h
deleted file mode 100644
index ac7bf35dd088..000000000000
--- a/sys/dev/nxge/include/xgehal-event.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_EVENT_H
-#define XGE_HAL_EVENT_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-
-__EXTERN_BEGIN_DECLS
-
-#define XGE_HAL_EVENT_BASE 0
-#define XGE_LL_EVENT_BASE 100
-
-/**
- * enum xge_hal_event_e - Enumerates slow-path HAL events.
- * @XGE_HAL_EVENT_UNKNOWN: Unknown (and invalid) event.
- * @XGE_HAL_EVENT_SERR: Serious hardware error event.
- * @XGE_HAL_EVENT_LINK_IS_UP: The link state has changed from 'down' to
- * 'up'; upper-layer driver (typically, link layer) is
- * supposed to wake the queue, etc.
- * @XGE_HAL_EVENT_LINK_IS_DOWN: Link-down event.
- * The link state has changed from 'down' to 'up';
- * upper-layer driver is supposed to stop traffic, etc.
- * @XGE_HAL_EVENT_ECCERR: ECC error event.
- * @XGE_HAL_EVENT_PARITYERR: Parity error event.
- * @XGE_HAL_EVENT_TARGETABORT: Target abort event. Used when device
- * aborts transmit operation with the corresponding transfer code
- * (for T_CODE enum see xgehal-fifo.h and xgehal-ring.h)
- * @XGE_HAL_EVENT_SLOT_FREEZE: Slot-freeze event. Driver tries to distinguish
- * slot-freeze from the rest critical events (e.g. ECC) when it is
- * impossible to PIO read "through" the bus, i.e. when getting all-foxes.
- *
- * xge_hal_event_e enumerates slow-path HAL eventis.
- *
- * See also: xge_hal_uld_cbs_t{}, xge_uld_link_up_f{},
- * xge_uld_link_down_f{}.
- */
-typedef enum xge_hal_event_e {
- XGE_HAL_EVENT_UNKNOWN = 0,
- /* HAL events */
- XGE_HAL_EVENT_SERR = XGE_HAL_EVENT_BASE + 1,
- XGE_HAL_EVENT_LINK_IS_UP = XGE_HAL_EVENT_BASE + 2,
- XGE_HAL_EVENT_LINK_IS_DOWN = XGE_HAL_EVENT_BASE + 3,
- XGE_HAL_EVENT_ECCERR = XGE_HAL_EVENT_BASE + 4,
- XGE_HAL_EVENT_PARITYERR = XGE_HAL_EVENT_BASE + 5,
- XGE_HAL_EVENT_TARGETABORT = XGE_HAL_EVENT_BASE + 6,
- XGE_HAL_EVENT_SLOT_FREEZE = XGE_HAL_EVENT_BASE + 7,
-} xge_hal_event_e;
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_EVENT_H */
diff --git a/sys/dev/nxge/include/xgehal-fifo.h b/sys/dev/nxge/include/xgehal-fifo.h
deleted file mode 100644
index 3dc23a048786..000000000000
--- a/sys/dev/nxge/include/xgehal-fifo.h
+++ /dev/null
@@ -1,361 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_FIFO_H
-#define XGE_HAL_FIFO_H
-
-#include <dev/nxge/include/xgehal-channel.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-mm.h>
-
-__EXTERN_BEGIN_DECLS
-
-/* HW fifo configuration */
-#define XGE_HAL_FIFO_INT_PER_LIST_THRESHOLD 65
-#define XGE_HAL_FIFO_MAX_WRR 5
-#define XGE_HAL_FIFO_MAX_PARTITION 4
-#define XGE_HAL_FIFO_MAX_WRR_STATE 36
-#define XGE_HAL_FIFO_HW_PAIR_OFFSET 0x20000
-
-/* HW FIFO Weight Calender */
-#define XGE_HAL_FIFO_WRR_0 0x0706050407030602ULL
-#define XGE_HAL_FIFO_WRR_1 0x0507040601070503ULL
-#define XGE_HAL_FIFO_WRR_2 0x0604070205060700ULL
-#define XGE_HAL_FIFO_WRR_3 0x0403060705010207ULL
-#define XGE_HAL_FIFO_WRR_4 0x0604050300000000ULL
-/*
- * xge_hal_fifo_hw_pair_t
- *
- * Represent a single fifo in the BAR1 memory space.
- */
-typedef struct {
- u64 txdl_pointer; /* offset 0x0 */
-
- u64 reserved[2];
-
- u64 list_control; /* offset 0x18 */
-#define XGE_HAL_TX_FIFO_LAST_TXD_NUM( val) vBIT(val,0,8)
-#define XGE_HAL_TX_FIFO_FIRST_LIST BIT(14)
-#define XGE_HAL_TX_FIFO_LAST_LIST BIT(15)
-#define XGE_HAL_TX_FIFO_FIRSTNLAST_LIST vBIT(3,14,2)
-#define XGE_HAL_TX_FIFO_SPECIAL_FUNC BIT(23)
-#define XGE_HAL_TX_FIFO_NO_SNOOP(n) vBIT(n,30,2)
-} xge_hal_fifo_hw_pair_t;
-
-
-/* Bad TxDL transfer codes */
-#define XGE_HAL_TXD_T_CODE_OK 0x0
-#define XGE_HAL_TXD_T_CODE_UNUSED_1 0x1
-#define XGE_HAL_TXD_T_CODE_ABORT_BUFFER 0x2
-#define XGE_HAL_TXD_T_CODE_ABORT_DTOR 0x3
-#define XGE_HAL_TXD_T_CODE_UNUSED_5 0x5
-#define XGE_HAL_TXD_T_CODE_PARITY 0x7
-#define XGE_HAL_TXD_T_CODE_LOSS_OF_LINK 0xA
-#define XGE_HAL_TXD_T_CODE_GENERAL_ERR 0xF
-
-
-/**
- * struct xge_hal_fifo_txd_t - TxD.
- * @control_1: Control_1.
- * @control_2: Control_2.
- * @buffer_pointer: Buffer_Address.
- * @host_control: Host_Control.Opaque 64bit data stored by ULD inside the Xframe
- * descriptor prior to posting the latter on the channel
- * via xge_hal_fifo_dtr_post() or xge_hal_ring_dtr_post().
- * The %host_control is returned as is to the ULD with each
- * completed descriptor.
- *
- * Transmit descriptor (TxD).Fifo descriptor contains configured number
- * (list) of TxDs. * For more details please refer to Xframe User Guide,
- * Section 5.4.2 "Transmit Descriptor (TxD) Format".
- */
-typedef struct xge_hal_fifo_txd_t {
- u64 control_1;
-#define XGE_HAL_TXD_LIST_OWN_XENA BIT(7)
-#define XGE_HAL_TXD_T_CODE (BIT(12)|BIT(13)|BIT(14)|BIT(15))
-#define XGE_HAL_GET_TXD_T_CODE(val) ((val & XGE_HAL_TXD_T_CODE)>>48)
-#define XGE_HAL_SET_TXD_T_CODE(x, val) (x |= (((u64)val & 0xF) << 48))
-#define XGE_HAL_TXD_GATHER_CODE (BIT(22) | BIT(23))
-#define XGE_HAL_TXD_GATHER_CODE_FIRST BIT(22)
-#define XGE_HAL_TXD_GATHER_CODE_LAST BIT(23)
-#define XGE_HAL_TXD_NO_LSO 0
-#define XGE_HAL_TXD_UDF_COF 1
-#define XGE_HAL_TXD_TCP_LSO 2
-#define XGE_HAL_TXD_UDP_LSO 3
-#define XGE_HAL_TXD_LSO_COF_CTRL(val) vBIT(val,30,2)
-#define XGE_HAL_TXD_TCP_LSO_MSS(val) vBIT(val,34,14)
-#define XGE_HAL_TXD_BUFFER0_SIZE(val) vBIT(val,48,16)
-#define XGE_HAL_TXD_GET_LSO_BYTES_SENT(val) ((val & vBIT(0xFFFF,16,16))>>32)
- u64 control_2;
-#define XGE_HAL_TXD_TX_CKO_CONTROL (BIT(5)|BIT(6)|BIT(7))
-#define XGE_HAL_TXD_TX_CKO_IPV4_EN BIT(5)
-#define XGE_HAL_TXD_TX_CKO_TCP_EN BIT(6)
-#define XGE_HAL_TXD_TX_CKO_UDP_EN BIT(7)
-#define XGE_HAL_TXD_VLAN_ENABLE BIT(15)
-#define XGE_HAL_TXD_VLAN_TAG(val) vBIT(val,16,16)
-#define XGE_HAL_TXD_INT_NUMBER(val) vBIT(val,34,6)
-#define XGE_HAL_TXD_INT_TYPE_PER_LIST BIT(47)
-#define XGE_HAL_TXD_INT_TYPE_UTILZ BIT(46)
-#define XGE_HAL_TXD_SET_MARKER vBIT(0x6,0,4)
-
- u64 buffer_pointer;
-
- u64 host_control;
-
-} xge_hal_fifo_txd_t;
-
-typedef xge_hal_fifo_txd_t* xge_hal_fifo_txdl_t;
-
-/**
- * struct xge_hal_fifo_t - Fifo channel.
- * @channel: Channel "base" of this fifo, the common part of all HAL
- * channels.
- * @post_lock_ptr: Points to a lock that serializes (pointer, control) PIOs.
- * Note that for Xena the serialization is done across all device
- * fifos.
- * @hw_pair: Per-fifo (Pointer, Control) pair used to send descriptors to the
- * Xframe hardware (for details see Xframe user guide).
- * @config: Fifo configuration, part of device configuration
- * (see xge_hal_device_config_t{}).
- * @no_snoop_bits: See xge_hal_fifo_config_t{}.
- * @txdl_per_memblock: Number of TxDLs (TxD lists) per memblock.
- * on TxDL please refer to Xframe UG.
- * @interrupt_type: FIXME: to-be-defined.
- * @txdl_size: Configured TxDL size (i.e., number of TxDs in a list), plus
- * per-TxDL HAL private space (xge_hal_fifo_txdl_priv_t).
- * @priv_size: Per-Tx descriptor space reserved for upper-layer driver
- * usage.
- * @mempool: Memory pool, from which descriptors get allocated.
- * @align_size: TBD
- *
- * Fifo channel.
- * Note: The structure is cache line aligned.
- */
-typedef struct xge_hal_fifo_t {
- xge_hal_channel_t channel;
- spinlock_t *post_lock_ptr;
- xge_hal_fifo_hw_pair_t *hw_pair;
- xge_hal_fifo_config_t *config;
- int no_snoop_bits;
- int txdl_per_memblock;
- u64 interrupt_type;
- int txdl_size;
- int priv_size;
- xge_hal_mempool_t *mempool;
- int align_size;
-} __xge_os_attr_cacheline_aligned xge_hal_fifo_t;
-
-/**
- * struct xge_hal_fifo_txdl_priv_t - Transmit descriptor HAL-private
- * data.
- * @dma_addr: DMA (mapped) address of _this_ descriptor.
- * @dma_handle: DMA handle used to map the descriptor onto device.
- * @dma_offset: Descriptor's offset in the memory block. HAL allocates
- * descriptors in memory blocks (see
- * xge_hal_fifo_config_t{})
- * Each memblock is a contiguous block of DMA-able memory.
- * @frags: Total number of fragments (that is, contiguous data buffers)
- * carried by this TxDL.
- * @align_vaddr_start: (TODO).
- * @align_vaddr: Virtual address of the per-TxDL area in memory used for
- * alignement. Used to place one or more mis-aligned fragments
- * (the maximum defined by configration variable
- * @max_aligned_frags).
- * @align_dma_addr: DMA address translated from the @align_vaddr.
- * @align_dma_handle: DMA handle that corresponds to @align_dma_addr.
- * @align_dma_acch: DMA access handle corresponds to @align_dma_addr.
- * @align_dma_offset: The current offset into the @align_vaddr area.
- * Grows while filling the descriptor, gets reset.
- * @align_used_frags: (TODO).
- * @alloc_frags: Total number of fragments allocated.
- * @dang_frags: Number of fragments kept from release until this TxDL is freed.
- * @bytes_sent: TODO
- * @unused: TODO
- * @dang_txdl: (TODO).
- * @next_txdl_priv: (TODO).
- * @first_txdp: (TODO).
- * @dang_dtrh: Pointer to TxDL (list) kept from release until this TxDL
- * is freed.
- * @linked_txdl_priv: Pointer to any linked TxDL for creating contiguous
- * TxDL list.
- * @dtrh: Corresponding dtrh to this TxDL.
- * @memblock: Pointer to the TxDL memory block or memory page.
- * on the next send operation.
- * @dma_object: DMA address and handle of the memory block that contains
- * the descriptor. This member is used only in the "checked"
- * version of the HAL (to enforce certain assertions);
- * otherwise it gets compiled out.
- * @allocated: True if the descriptor is reserved, 0 otherwise. Internal usage.
- *
- * Per-transmit decsriptor HAL-private data. HAL uses the space to keep DMA
- * information associated with the descriptor. Note that ULD can ask HAL
- * to allocate additional per-descriptor space for its own (ULD-specific)
- * purposes.
- *
- * See also: xge_hal_ring_rxd_priv_t{}.
- */
-typedef struct xge_hal_fifo_txdl_priv_t {
- dma_addr_t dma_addr;
- pci_dma_h dma_handle;
- ptrdiff_t dma_offset;
- int frags;
- char *align_vaddr_start;
- char *align_vaddr;
- dma_addr_t align_dma_addr;
- pci_dma_h align_dma_handle;
- pci_dma_acc_h align_dma_acch;
- ptrdiff_t align_dma_offset;
- int align_used_frags;
- int alloc_frags;
- int dang_frags;
- unsigned int bytes_sent;
- int unused;
- xge_hal_fifo_txd_t *dang_txdl;
- struct xge_hal_fifo_txdl_priv_t *next_txdl_priv;
- xge_hal_fifo_txd_t *first_txdp;
- void *memblock;
-#ifdef XGE_DEBUG_ASSERT
- xge_hal_mempool_dma_t *dma_object;
-#endif
-#ifdef XGE_OS_MEMORY_CHECK
- int allocated;
-#endif
-} xge_hal_fifo_txdl_priv_t;
-
-/**
- * xge_hal_fifo_get_max_frags_cnt - Return the max fragments allocated
- * for the fifo.
- * @channelh: Channel handle.
- */
-static inline int
-xge_hal_fifo_get_max_frags_cnt(xge_hal_channel_h channelh)
-{
- return ((xge_hal_fifo_t *)channelh)->config->max_frags;
-}
-/* ========================= FIFO PRIVATE API ============================= */
-
-xge_hal_status_e __hal_fifo_open(xge_hal_channel_h channelh,
- xge_hal_channel_attr_t *attr);
-
-void __hal_fifo_close(xge_hal_channel_h channelh);
-
-void __hal_fifo_hw_initialize(xge_hal_device_h hldev);
-
-xge_hal_status_e
-__hal_fifo_dtr_align_alloc_map(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-void
-__hal_fifo_dtr_align_free_unmap(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-#if defined(XGE_DEBUG_FP) && (XGE_DEBUG_FP & XGE_DEBUG_FP_FIFO)
-#define __HAL_STATIC_FIFO
-#define __HAL_INLINE_FIFO
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_fifo_txdl_priv_t*
-__hal_fifo_txdl_priv(xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-__hal_fifo_dtr_post_single(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- u64 ctrl_1);
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-__hal_fifo_txdl_restore_many(xge_hal_channel_h channelh,
- xge_hal_fifo_txd_t *txdp, int txdl_count);
-
-/* ========================= FIFO PUBLIC API ============================== */
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_reserve_many(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh,
- const int frags);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void*
-xge_hal_fifo_dtr_private(xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO int
-xge_hal_fifo_dtr_buffer_cnt(xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_reserve_sp(xge_hal_channel_h channel, int dtr_sp_size,
- xge_hal_dtr_h dtr_sp);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_post_many(xge_hal_channel_h channelh, int num,
- xge_hal_dtr_h dtrs[]);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh,
- u8 *t_code);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtr);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_buffer_set(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int frag_idx, dma_addr_t dma_pointer, int size);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_buffer_set_aligned(xge_hal_channel_h channelh,
- xge_hal_dtr_h dtrh, int frag_idx, void *vaddr,
- dma_addr_t dma_pointer, int size, int misaligned_size);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_dtr_buffer_append(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- void *vaddr, int size);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_buffer_finalize(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int frag_idx);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_mss_set(xge_hal_dtr_h dtrh, int mss);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_cksum_set_bits(xge_hal_dtr_h dtrh, u64 cksum_bits);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO void
-xge_hal_fifo_dtr_vlan_set(xge_hal_dtr_h dtrh, u16 vlan_tag);
-
-__HAL_STATIC_FIFO __HAL_INLINE_FIFO xge_hal_status_e
-xge_hal_fifo_is_next_dtr_completed(xge_hal_channel_h channelh);
-
-#else /* XGE_FASTPATH_EXTERN */
-#define __HAL_STATIC_FIFO static
-#define __HAL_INLINE_FIFO inline
-#include <dev/nxge/xgehal/xgehal-fifo-fp.c>
-#endif /* XGE_FASTPATH_INLINE */
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_FIFO_H */
diff --git a/sys/dev/nxge/include/xgehal-mgmt.h b/sys/dev/nxge/include/xgehal-mgmt.h
deleted file mode 100644
index 842a12cc7a37..000000000000
--- a/sys/dev/nxge/include/xgehal-mgmt.h
+++ /dev/null
@@ -1,222 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_MGMT_H
-#define XGE_HAL_MGMT_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-debug.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-stats.h>
-#include <dev/nxge/include/xgehal-regs.h>
-#include <dev/nxge/include/xgehal-device.h>
-
-__EXTERN_BEGIN_DECLS
-
-/**
- * struct xge_hal_mgmt_about_info_t - About info.
- * @vendor: PCI Vendor ID.
- * @device: PCI Device ID.
- * @subsys_vendor: PCI Subsystem Vendor ID.
- * @subsys_device: PCI Subsystem Device ID.
- * @board_rev: PCI Board revision, e.g. 3 - for Xena 3.
- * @vendor_name: Neterion, Inc.
- * @chip_name: Xframe.
- * @media: Fiber, copper.
- * @hal_major: HAL major version number.
- * @hal_minor: HAL minor version number.
- * @hal_fix: HAL fix number.
- * @hal_build: HAL build number.
- * @ll_major: Link-layer ULD major version number.
- * @ll_minor: Link-layer ULD minor version number.
- * @ll_fix: Link-layer ULD fix version number.
- * @ll_build: Link-layer ULD build number.
- * @transponder_temperature: TODO
- */
-typedef struct xge_hal_mgmt_about_info_t {
- u16 vendor;
- u16 device;
- u16 subsys_vendor;
- u16 subsys_device;
- u8 board_rev;
- char vendor_name[16];
- char chip_name[16];
- char media[16];
- char hal_major[4];
- char hal_minor[4];
- char hal_fix[4];
- char hal_build[16];
- char ll_major[4];
- char ll_minor[4];
- char ll_fix[4];
- char ll_build[16];
- u32 transponder_temperature;
-} xge_hal_mgmt_about_info_t;
-
-typedef xge_hal_stats_hw_info_t xge_hal_mgmt_hw_stats_t;
-typedef xge_hal_stats_pcim_info_t xge_hal_mgmt_pcim_stats_t;
-typedef xge_hal_stats_sw_err_t xge_hal_mgmt_sw_stats_t;
-typedef xge_hal_stats_device_info_t xge_hal_mgmt_device_stats_t;
-typedef xge_hal_stats_channel_info_t xge_hal_mgmt_channel_stats_t;
-typedef xge_hal_device_config_t xge_hal_mgmt_device_config_t;
-typedef xge_hal_driver_config_t xge_hal_mgmt_driver_config_t;
-typedef xge_hal_pci_config_t xge_hal_mgmt_pci_config_t;
-
-xge_hal_status_e
-xge_hal_mgmt_about(xge_hal_device_h devh, xge_hal_mgmt_about_info_t *about_info,
- int size);
-
-xge_hal_status_e
-xge_hal_mgmt_hw_stats(xge_hal_device_h devh, xge_hal_mgmt_hw_stats_t *hw_stats,
- int size);
-
-xge_hal_status_e
-xge_hal_mgmt_hw_stats_off(xge_hal_device_h devh, int off, int size, char *out);
-
-xge_hal_status_e
-xge_hal_mgmt_pcim_stats(xge_hal_device_h devh,
- xge_hal_mgmt_pcim_stats_t *pcim_stats, int size);
-
-xge_hal_status_e
-xge_hal_mgmt_pcim_stats_off(xge_hal_device_h devh, int off, int size,
- char *out);
-
-xge_hal_status_e
-xge_hal_mgmt_sw_stats(xge_hal_device_h devh, xge_hal_mgmt_sw_stats_t *hw_stats,
- int size);
-
-xge_hal_status_e
-xge_hal_mgmt_device_stats(xge_hal_device_h devh,
- xge_hal_mgmt_device_stats_t *device_stats, int size);
-
-xge_hal_status_e
-xge_hal_mgmt_channel_stats(xge_hal_channel_h channelh,
- xge_hal_mgmt_channel_stats_t *channel_stats, int size);
-
-xge_hal_status_e
-xge_hal_mgmt_reg_read(xge_hal_device_h devh, int bar_id, unsigned int offset,
- u64 *value);
-
-xge_hal_status_e
-xge_hal_mgmt_reg_write(xge_hal_device_h devh, int bar_id, unsigned int offset,
- u64 value);
-
-xge_hal_status_e
-xge_hal_mgmt_pcireg_read(xge_hal_device_h devh, unsigned int offset,
- int bits, u32 *value);
-
-xge_hal_status_e
-xge_hal_mgmt_device_config(xge_hal_device_h devh,
- xge_hal_mgmt_device_config_t *dev_config, int size);
-
-xge_hal_status_e
-xge_hal_mgmt_driver_config(xge_hal_mgmt_driver_config_t *drv_config,
- int size);
-
-xge_hal_status_e
-xge_hal_mgmt_pci_config(xge_hal_device_h devh,
- xge_hal_mgmt_pci_config_t *pci_config, int size);
-
-xge_hal_status_e
-xge_hal_pma_loopback( xge_hal_device_h devh, int enable );
-
-xge_hal_status_e
-xge_hal_rldram_test(xge_hal_device_h devh, u64 * data);
-
-u16
-xge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr );
-
-xge_hal_status_e
-xge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value );
-
-u32
-xge_hal_read_xfp_current_temp(xge_hal_device_h devh);
-
-xge_hal_status_e
-xge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data);
-
-xge_hal_status_e
-xge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt);
-
-xge_hal_status_e
-xge_hal_register_test(xge_hal_device_h devh, u64 *data);
-
-xge_hal_status_e
-xge_hal_eeprom_test(xge_hal_device_h devh, u64 *data);
-
-xge_hal_status_e
-xge_hal_bist_test(xge_hal_device_h devh, u64 *data);
-
-xge_hal_status_e
-xge_hal_link_test(xge_hal_device_h devh, u64 *data);
-
-int
-xge_hal_setpause_data(xge_hal_device_h devh, int tx, int rx);
-
-void
-xge_hal_getpause_data(xge_hal_device_h devh, int *tx, int *rx);
-
-void
-__hal_updt_stats_xpak(xge_hal_device_t *hldev);
-
-void
-__hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value);
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
-xge_hal_status_e
-xge_hal_mgmt_trace_read(char *buffer, unsigned buf_size, unsigned *offset,
- unsigned *read_length);
-#endif
-
-void
-xge_hal_restore_link_led(xge_hal_device_h devh);
-
-
-void
-xge_hal_flick_link_led(xge_hal_device_h devh);
-
-/*
- * Some set of Xena3 Cards were known to have some link LED
- * Problems. This macro identifies if the card is among them
- * given its Sub system ID.
- */
-#define CARDS_WITH_FAULTY_LINK_INDICATORS(subid) \
- ((((subid >= 0x600B) && (subid <= 0x600D)) || \
- ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0)
-#define CHECKBIT(value, nbit) (value & (1 << nbit))
-
-#ifdef XGE_HAL_USE_MGMT_AUX
-#include <dev/nxge/include/xgehal-mgmtaux.h>
-#endif
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_MGMT_H */
diff --git a/sys/dev/nxge/include/xgehal-mgmtaux.h b/sys/dev/nxge/include/xgehal-mgmtaux.h
deleted file mode 100644
index ae495fee67b6..000000000000
--- a/sys/dev/nxge/include/xgehal-mgmtaux.h
+++ /dev/null
@@ -1,89 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_MGMTAUX_H
-#define XGE_HAL_MGMTAUX_H
-
-#include <dev/nxge/include/xgehal-mgmt.h>
-
-__EXTERN_BEGIN_DECLS
-
-#define XGE_HAL_AUX_SEPA ' '
-
-xge_hal_status_e xge_hal_aux_about_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_tmac_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_rmac_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_sw_dev_read(xge_hal_device_h devh,
- int bufsize, char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_pci_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_hal_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_bar0_read(xge_hal_device_h devh,
- unsigned int offset, int bufsize, char *retbuf,
- int *retsize);
-
-xge_hal_status_e xge_hal_aux_bar0_write(xge_hal_device_h devh,
- unsigned int offset, u64 value);
-
-xge_hal_status_e xge_hal_aux_bar1_read(xge_hal_device_h devh,
- unsigned int offset, int bufsize, char *retbuf,
- int *retsize);
-
-xge_hal_status_e xge_hal_aux_pci_config_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_stats_herc_enchanced(xge_hal_device_h devh,
- int bufsize, char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_channel_read(xge_hal_device_h devh, int bufsize,
- char *retbuf, int *retsize);
-
-xge_hal_status_e xge_hal_aux_device_dump(xge_hal_device_h devh);
-
-
-xge_hal_status_e xge_hal_aux_driver_config_read(int bufsize, char *retbuf,
- int *retsize);
-
-xge_hal_status_e xge_hal_aux_device_config_read(xge_hal_device_h devh,
- int bufsize, char *retbuf, int *retsize);
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_MGMTAUX_H */
diff --git a/sys/dev/nxge/include/xgehal-mm.h b/sys/dev/nxge/include/xgehal-mm.h
deleted file mode 100644
index 80111eef6176..000000000000
--- a/sys/dev/nxge/include/xgehal-mm.h
+++ /dev/null
@@ -1,168 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_MM_H
-#define XGE_HAL_MM_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-debug.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-driver.h>
-
-__EXTERN_BEGIN_DECLS
-
-typedef void* xge_hal_mempool_h;
-
-/*
- * struct xge_hal_mempool_dma_t - Represents DMA objects passed to the
- caller.
- */
-typedef struct xge_hal_mempool_dma_t {
- dma_addr_t addr;
- pci_dma_h handle;
- pci_dma_acc_h acc_handle;
-} xge_hal_mempool_dma_t;
-
-/*
- * xge_hal_mempool_item_f - Mempool item alloc/free callback
- * @mempoolh: Memory pool handle.
- * @item: Item that gets allocated or freed.
- * @index: Item's index in the memory pool.
- * @is_last: True, if this item is the last one in the pool; false - otherwise.
- * userdat: Per-pool user context.
- *
- * Memory pool allocation/deallocation callback.
- */
-typedef xge_hal_status_e (*xge_hal_mempool_item_f) (xge_hal_mempool_h mempoolh,
- void *memblock, int memblock_index,
- xge_hal_mempool_dma_t *dma_object, void *item,
- int index, int is_last, void *userdata);
-
-/*
- * struct xge_hal_mempool_t - Memory pool.
- */
-typedef struct xge_hal_mempool_t {
- xge_hal_mempool_item_f item_func_alloc;
- xge_hal_mempool_item_f item_func_free;
- void *userdata;
- void **memblocks_arr;
- void **memblocks_priv_arr;
- xge_hal_mempool_dma_t *memblocks_dma_arr;
- pci_dev_h pdev;
- int memblock_size;
- int memblocks_max;
- int memblocks_allocated;
- int item_size;
- int items_max;
- int items_initial;
- int items_current;
- int items_per_memblock;
- void **items_arr;
- void **shadow_items_arr;
- int items_priv_size;
-} xge_hal_mempool_t;
-
-/*
- * __hal_mempool_item - Returns pointer to the item in the mempool
- * items array.
- */
-static inline void*
-__hal_mempool_item(xge_hal_mempool_t *mempool, int index)
-{
- return mempool->items_arr[index];
-}
-
-/*
- * __hal_mempool_item_priv - will return pointer on per item private space
- */
-static inline void*
-__hal_mempool_item_priv(xge_hal_mempool_t *mempool, int memblock_idx,
- void *item, int *memblock_item_idx)
-{
- ptrdiff_t offset;
- void *memblock = mempool->memblocks_arr[memblock_idx];
-
- xge_assert(memblock);
-
- offset = (int)((char * )item - (char *)memblock);
- xge_assert(offset >= 0 && offset < mempool->memblock_size);
-
- (*memblock_item_idx) = (int) offset / mempool->item_size;
- xge_assert((*memblock_item_idx) < mempool->items_per_memblock);
-
- return (char*)mempool->memblocks_priv_arr[memblock_idx] +
- (*memblock_item_idx) * mempool->items_priv_size;
-}
-
-/*
- * __hal_mempool_items_arr - will return pointer to the items array in the
- * mempool.
- */
-static inline void*
-__hal_mempool_items_arr(xge_hal_mempool_t *mempool)
-{
- return mempool->items_arr;
-}
-
-/*
- * __hal_mempool_memblock - will return pointer to the memblock in the
- * mempool memblocks array.
- */
-static inline void*
-__hal_mempool_memblock(xge_hal_mempool_t *mempool, int memblock_idx)
-{
- xge_assert(mempool->memblocks_arr[memblock_idx]);
- return mempool->memblocks_arr[memblock_idx];
-}
-
-/*
- * __hal_mempool_memblock_dma - will return pointer to the dma block
- * corresponds to the memblock(identified by memblock_idx) in the mempool.
- */
-static inline xge_hal_mempool_dma_t*
-__hal_mempool_memblock_dma(xge_hal_mempool_t *mempool, int memblock_idx)
-{
- return mempool->memblocks_dma_arr + memblock_idx;
-}
-
-xge_hal_status_e __hal_mempool_grow(xge_hal_mempool_t *mempool,
- int num_allocate, int *num_allocated);
-
-xge_hal_mempool_t* __hal_mempool_create(pci_dev_h pdev, int memblock_size,
- int item_size, int private_size, int items_initial,
- int items_max, xge_hal_mempool_item_f item_func_alloc,
- xge_hal_mempool_item_f item_func_free, void *userdata);
-
-void __hal_mempool_destroy(xge_hal_mempool_t *mempool);
-
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_MM_H */
diff --git a/sys/dev/nxge/include/xgehal-regs.h b/sys/dev/nxge/include/xgehal-regs.h
deleted file mode 100644
index bfd3852a8ce7..000000000000
--- a/sys/dev/nxge/include/xgehal-regs.h
+++ /dev/null
@@ -1,1375 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_REGS_H
-#define XGE_HAL_REGS_H
-
-__EXTERN_BEGIN_DECLS
-
-typedef struct {
-
-/* General Control-Status Registers */
- u64 general_int_status;
-#define XGE_HAL_GEN_INTR_TXPIC BIT(0)
-#define XGE_HAL_GEN_INTR_TXDMA BIT(1)
-#define XGE_HAL_GEN_INTR_TXMAC BIT(2)
-#define XGE_HAL_GEN_INTR_TXXGXS BIT(3)
-#define XGE_HAL_GEN_INTR_TXTRAFFIC BIT(8)
-#define XGE_HAL_GEN_INTR_RXPIC BIT(32)
-#define XGE_HAL_GEN_INTR_RXDMA BIT(33)
-#define XGE_HAL_GEN_INTR_RXMAC BIT(34)
-#define XGE_HAL_GEN_INTR_MC BIT(35)
-#define XGE_HAL_GEN_INTR_RXXGXS BIT(36)
-#define XGE_HAL_GEN_INTR_RXTRAFFIC BIT(40)
-#define XGE_HAL_GEN_ERROR_INTR (XGE_HAL_GEN_INTR_TXPIC | \
- XGE_HAL_GEN_INTR_RXPIC | \
- XGE_HAL_GEN_INTR_TXDMA | \
- XGE_HAL_GEN_INTR_RXDMA | \
- XGE_HAL_GEN_INTR_TXMAC | \
- XGE_HAL_GEN_INTR_RXMAC | \
- XGE_HAL_GEN_INTR_TXXGXS | \
- XGE_HAL_GEN_INTR_RXXGXS | \
- XGE_HAL_GEN_INTR_MC)
-
- u64 general_int_mask;
-
- u8 unused0[0x100 - 0x10];
-
- u64 sw_reset;
-
-/* XGXS must be removed from reset only once. */
-#define XGE_HAL_SW_RESET_XENA vBIT(0xA5,0,8)
-#define XGE_HAL_SW_RESET_FLASH vBIT(0xA5,8,8)
-#define XGE_HAL_SW_RESET_EOI vBIT(0xA5,16,8)
-#define XGE_HAL_SW_RESET_XGXS vBIT(0xA5,24,8)
-#define XGE_HAL_SW_RESET_ALL (XGE_HAL_SW_RESET_XENA | \
- XGE_HAL_SW_RESET_FLASH | \
- XGE_HAL_SW_RESET_EOI | \
- XGE_HAL_SW_RESET_XGXS)
-
-/* The SW_RESET register must read this value after a successful reset. */
-#if defined(XGE_OS_HOST_BIG_ENDIAN) && !defined(XGE_OS_PIO_LITTLE_ENDIAN)
-#define XGE_HAL_SW_RESET_RAW_VAL_XENA 0xA500000000ULL
-#define XGE_HAL_SW_RESET_RAW_VAL_HERC 0xA5A500000000ULL
-#else
-#define XGE_HAL_SW_RESET_RAW_VAL_XENA 0xA5000000ULL
-#define XGE_HAL_SW_RESET_RAW_VAL_HERC 0xA5A50000ULL
-#endif
-
-
- u64 adapter_status;
-#define XGE_HAL_ADAPTER_STATUS_TDMA_READY BIT(0)
-#define XGE_HAL_ADAPTER_STATUS_RDMA_READY BIT(1)
-#define XGE_HAL_ADAPTER_STATUS_PFC_READY BIT(2)
-#define XGE_HAL_ADAPTER_STATUS_TMAC_BUF_EMPTY BIT(3)
-#define XGE_HAL_ADAPTER_STATUS_PIC_QUIESCENT BIT(5)
-#define XGE_HAL_ADAPTER_STATUS_RMAC_REMOTE_FAULT BIT(6)
-#define XGE_HAL_ADAPTER_STATUS_RMAC_LOCAL_FAULT BIT(7)
-#define XGE_HAL_ADAPTER_STATUS_RMAC_PCC_IDLE vBIT(0xFF,8,8)
-#define XGE_HAL_ADAPTER_STATUS_RMAC_PCC_4_IDLE vBIT(0x0F,8,8)
-#define XGE_HAL_ADAPTER_PCC_ENABLE_FOUR vBIT(0x0F,0,8)
-
-#define XGE_HAL_ADAPTER_STATUS_RC_PRC_QUIESCENT vBIT(0xFF,16,8)
-#define XGE_HAL_ADAPTER_STATUS_MC_DRAM_READY BIT(24)
-#define XGE_HAL_ADAPTER_STATUS_MC_QUEUES_READY BIT(25)
-#define XGE_HAL_ADAPTER_STATUS_M_PLL_LOCK BIT(30)
-#define XGE_HAL_ADAPTER_STATUS_P_PLL_LOCK BIT(31)
-
- u64 adapter_control;
-#define XGE_HAL_ADAPTER_CNTL_EN BIT(7)
-#define XGE_HAL_ADAPTER_EOI_TX_ON BIT(15)
-#define XGE_HAL_ADAPTER_LED_ON BIT(23)
-#define XGE_HAL_ADAPTER_UDPI(val) vBIT(val,36,4)
-#define XGE_HAL_ADAPTER_WAIT_INT BIT(48)
-#define XGE_HAL_ADAPTER_ECC_EN BIT(55)
-
- u64 serr_source;
-#define XGE_HAL_SERR_SOURCE_PIC BIT(0)
-#define XGE_HAL_SERR_SOURCE_TXDMA BIT(1)
-#define XGE_HAL_SERR_SOURCE_RXDMA BIT(2)
-#define XGE_HAL_SERR_SOURCE_MAC BIT(3)
-#define XGE_HAL_SERR_SOURCE_MC BIT(4)
-#define XGE_HAL_SERR_SOURCE_XGXS BIT(5)
-#define XGE_HAL_SERR_SOURCE_ANY (XGE_HAL_SERR_SOURCE_PIC | \
- XGE_HAL_SERR_SOURCE_TXDMA | \
- XGE_HAL_SERR_SOURCE_RXDMA | \
- XGE_HAL_SERR_SOURCE_MAC | \
- XGE_HAL_SERR_SOURCE_MC | \
- XGE_HAL_SERR_SOURCE_XGXS)
-
- u64 pci_info;
-#define XGE_HAL_PCI_INFO vBIT(0xF,0,4)
-#define XGE_HAL_PCI_32_BIT BIT(8)
-
- u8 unused0_1[0x160 - 0x128];
-
- u64 ric_status;
-
- u8 unused0_2[0x558 - 0x168];
-
- u64 mbist_status;
-
- u8 unused0_3[0x800 - 0x560];
-
-/* PCI-X Controller registers */
- u64 pic_int_status;
- u64 pic_int_mask;
-#define XGE_HAL_PIC_INT_TX BIT(0)
-#define XGE_HAL_PIC_INT_FLSH BIT(1)
-#define XGE_HAL_PIC_INT_MDIO BIT(2)
-#define XGE_HAL_PIC_INT_IIC BIT(3)
-#define XGE_HAL_PIC_INT_MISC BIT(4)
-#define XGE_HAL_PIC_INT_RX BIT(32)
-
- u64 txpic_int_reg;
-#define XGE_HAL_TXPIC_INT_SCHED_INTR BIT(42)
- u64 txpic_int_mask;
-#define XGE_HAL_PCIX_INT_REG_ECC_SG_ERR BIT(0)
-#define XGE_HAL_PCIX_INT_REG_ECC_DB_ERR BIT(1)
-#define XGE_HAL_PCIX_INT_REG_FLASHR_R_FSM_ERR BIT(8)
-#define XGE_HAL_PCIX_INT_REG_FLASHR_W_FSM_ERR BIT(9)
-#define XGE_HAL_PCIX_INT_REG_INI_TX_FSM_SERR BIT(10)
-#define XGE_HAL_PCIX_INT_REG_INI_TXO_FSM_ERR BIT(11)
-#define XGE_HAL_PCIX_INT_REG_TRT_FSM_SERR BIT(13)
-#define XGE_HAL_PCIX_INT_REG_SRT_FSM_SERR BIT(14)
-#define XGE_HAL_PCIX_INT_REG_PIFR_FSM_SERR BIT(15)
-#define XGE_HAL_PCIX_INT_REG_WRC_TX_SEND_FSM_SERR BIT(21)
-#define XGE_HAL_PCIX_INT_REG_RRC_TX_REQ_FSM_SERR BIT(23)
-#define XGE_HAL_PCIX_INT_REG_INI_RX_FSM_SERR BIT(48)
-#define XGE_HAL_PCIX_INT_REG_RA_RX_FSM_SERR BIT(50)
-/*
-#define XGE_HAL_PCIX_INT_REG_WRC_RX_SEND_FSM_SERR BIT(52)
-#define XGE_HAL_PCIX_INT_REG_RRC_RX_REQ_FSM_SERR BIT(54)
-#define XGE_HAL_PCIX_INT_REG_RRC_RX_SPLIT_FSM_SERR BIT(58)
-*/
- u64 txpic_alarms;
- u64 rxpic_int_reg;
-#define XGE_HAL_RX_PIC_INT_REG_SPDM_READY BIT(0)
-#define XGE_HAL_RX_PIC_INT_REG_SPDM_OVERWRITE_ERR BIT(44)
-#define XGE_HAL_RX_PIC_INT_REG_SPDM_PERR BIT(55)
- u64 rxpic_int_mask;
- u64 rxpic_alarms;
-
- u64 flsh_int_reg;
- u64 flsh_int_mask;
-#define XGE_HAL_PIC_FLSH_INT_REG_CYCLE_FSM_ERR BIT(63)
-#define XGE_HAL_PIC_FLSH_INT_REG_ERR BIT(62)
- u64 flash_alarms;
-
- u64 mdio_int_reg;
- u64 mdio_int_mask;
-#define XGE_HAL_MDIO_INT_REG_MDIO_BUS_ERR BIT(0)
-#define XGE_HAL_MDIO_INT_REG_DTX_BUS_ERR BIT(8)
-#define XGE_HAL_MDIO_INT_REG_LASI BIT(39)
- u64 mdio_alarms;
-
- u64 iic_int_reg;
- u64 iic_int_mask;
-#define XGE_HAL_IIC_INT_REG_BUS_FSM_ERR BIT(4)
-#define XGE_HAL_IIC_INT_REG_BIT_FSM_ERR BIT(5)
-#define XGE_HAL_IIC_INT_REG_CYCLE_FSM_ERR BIT(6)
-#define XGE_HAL_IIC_INT_REG_REQ_FSM_ERR BIT(7)
-#define XGE_HAL_IIC_INT_REG_ACK_ERR BIT(8)
- u64 iic_alarms;
-
- u64 msi_pending_reg;
-
- u64 misc_int_reg;
-#define XGE_HAL_MISC_INT_REG_DP_ERR_INT BIT(0)
-#define XGE_HAL_MISC_INT_REG_LINK_DOWN_INT BIT(1)
-#define XGE_HAL_MISC_INT_REG_LINK_UP_INT BIT(2)
- u64 misc_int_mask;
- u64 misc_alarms;
-
- u64 msi_triggered_reg;
-
- u64 xfp_gpio_int_reg;
- u64 xfp_gpio_int_mask;
- u64 xfp_alarms;
-
- u8 unused5[0x8E0 - 0x8C8];
-
- u64 tx_traffic_int;
-#define XGE_HAL_TX_TRAFFIC_INT_n(n) BIT(n)
- u64 tx_traffic_mask;
-
- u64 rx_traffic_int;
-#define XGE_HAL_RX_TRAFFIC_INT_n(n) BIT(n)
- u64 rx_traffic_mask;
-
-/* PIC Control registers */
- u64 pic_control;
-#define XGE_HAL_PIC_CNTL_RX_ALARM_MAP_1 BIT(0)
-#define XGE_HAL_PIC_CNTL_ONE_SHOT_TINT BIT(1)
-#define XGE_HAL_PIC_CNTL_SHARED_SPLITS(n) vBIT(n,11,4)
-
- u64 swapper_ctrl;
-#define XGE_HAL_SWAPPER_CTRL_PIF_R_FE BIT(0)
-#define XGE_HAL_SWAPPER_CTRL_PIF_R_SE BIT(1)
-#define XGE_HAL_SWAPPER_CTRL_PIF_W_FE BIT(8)
-#define XGE_HAL_SWAPPER_CTRL_PIF_W_SE BIT(9)
-#define XGE_HAL_SWAPPER_CTRL_RTH_FE BIT(10)
-#define XGE_HAL_SWAPPER_CTRL_RTH_SE BIT(11)
-#define XGE_HAL_SWAPPER_CTRL_TXP_FE BIT(16)
-#define XGE_HAL_SWAPPER_CTRL_TXP_SE BIT(17)
-#define XGE_HAL_SWAPPER_CTRL_TXD_R_FE BIT(18)
-#define XGE_HAL_SWAPPER_CTRL_TXD_R_SE BIT(19)
-#define XGE_HAL_SWAPPER_CTRL_TXD_W_FE BIT(20)
-#define XGE_HAL_SWAPPER_CTRL_TXD_W_SE BIT(21)
-#define XGE_HAL_SWAPPER_CTRL_TXF_R_FE BIT(22)
-#define XGE_HAL_SWAPPER_CTRL_TXF_R_SE BIT(23)
-#define XGE_HAL_SWAPPER_CTRL_RXD_R_FE BIT(32)
-#define XGE_HAL_SWAPPER_CTRL_RXD_R_SE BIT(33)
-#define XGE_HAL_SWAPPER_CTRL_RXD_W_FE BIT(34)
-#define XGE_HAL_SWAPPER_CTRL_RXD_W_SE BIT(35)
-#define XGE_HAL_SWAPPER_CTRL_RXF_W_FE BIT(36)
-#define XGE_HAL_SWAPPER_CTRL_RXF_W_SE BIT(37)
-#define XGE_HAL_SWAPPER_CTRL_XMSI_FE BIT(40)
-#define XGE_HAL_SWAPPER_CTRL_XMSI_SE BIT(41)
-#define XGE_HAL_SWAPPER_CTRL_STATS_FE BIT(48)
-#define XGE_HAL_SWAPPER_CTRL_STATS_SE BIT(49)
-
- u64 pif_rd_swapper_fb;
-#define XGE_HAL_IF_RD_SWAPPER_FB 0x0123456789ABCDEFULL
-
- u64 scheduled_int_ctrl;
-#define XGE_HAL_SCHED_INT_CTRL_TIMER_EN BIT(0)
-#define XGE_HAL_SCHED_INT_CTRL_ONE_SHOT BIT(1)
-#define XGE_HAL_SCHED_INT_CTRL_INT2MSI(val) vBIT(val,10,6)
-#define XGE_HAL_SCHED_INT_PERIOD(val) vBIT(val,32,32)
-#define XGE_HAL_SCHED_INT_PERIOD_MASK 0xFFFFFFFF00000000ULL
-
-
- u64 txreqtimeout;
-#define XGE_HAL_TXREQTO_VAL(val) vBIT(val,0,32)
-#define XGE_HAL_TXREQTO_EN BIT(63)
-
- u64 statsreqtimeout;
-#define XGE_HAL_STATREQTO_VAL(n) TBD
-#define XGE_HAL_STATREQTO_EN BIT(63)
-
- u64 read_retry_delay;
- u64 read_retry_acceleration;
- u64 write_retry_delay;
- u64 write_retry_acceleration;
-
- u64 xmsi_control;
-#define XGE_HAL_XMSI_EN BIT(0)
-#define XGE_HAL_XMSI_DIS_TINT_SERR BIT(1)
-#define XGE_HAL_XMSI_BYTE_COUNT(val) vBIT(val,13,3)
-
- u64 xmsi_access;
-#define XGE_HAL_XMSI_WR_RDN BIT(7)
-#define XGE_HAL_XMSI_STROBE BIT(15)
-#define XGE_HAL_XMSI_NO(val) vBIT(val,26,6)
-
- u64 xmsi_address;
- u64 xmsi_data;
-
- u64 rx_mat;
-#define XGE_HAL_SET_RX_MAT(ring, msi) vBIT(msi, (8 * ring), 8)
-
- u8 unused6[0x8];
-
- u64 tx_mat[8];
-#define XGE_HAL_SET_TX_MAT(fifo, msi) vBIT(msi, (8 * fifo), 8)
-
- u64 xmsi_mask_reg;
-
- /* Automated statistics collection */
- u64 stat_byte_cnt;
- u64 stat_cfg;
-#define XGE_HAL_STAT_CFG_STAT_EN BIT(0)
-#define XGE_HAL_STAT_CFG_ONE_SHOT_EN BIT(1)
-#define XGE_HAL_STAT_CFG_STAT_NS_EN BIT(8)
-#define XGE_HAL_STAT_CFG_STAT_RO BIT(9)
-#define XGE_HAL_XENA_PER_SEC 0x208d5
-#define XGE_HAL_SET_UPDT_PERIOD(n) vBIT(n,32,32)
-
- u64 stat_addr;
-
- /* General Configuration */
- u64 mdio_control;
-#define XGE_HAL_MDIO_CONTROL_MMD_INDX_ADDR(n) vBIT(n,0,16)
-#define XGE_HAL_MDIO_CONTROL_MMD_DEV_ADDR(n) vBIT(n,19,5)
-#define XGE_HAL_MDIO_CONTROL_MMD_PRT_ADDR(n) vBIT(n,27,5)
-#define XGE_HAL_MDIO_CONTROL_MMD_DATA(n) vBIT(n,32,16)
-#define XGE_HAL_MDIO_CONTROL_MMD_CTRL(n) vBIT(n,56,4)
-#define XGE_HAL_MDIO_CONTROL_MMD_OP(n) vBIT(n,60,2)
-#define XGE_HAL_MDIO_CONTROL_MMD_DATA_GET(n) ((n>>16)&0xFFFF)
-#define XGE_HAL_MDIO_MMD_PMA_DEV_ADDR 0x01
-#define XGE_HAL_MDIO_DOM_REG_ADDR 0xA100
-#define XGE_HAL_MDIO_ALARM_FLAGS_ADDR 0xA070
-#define XGE_HAL_MDIO_WARN_FLAGS_ADDR 0xA074
-#define XGE_HAL_MDIO_CTRL_START 0xE
-#define XGE_HAL_MDIO_OP_ADDRESS 0x0
-#define XGE_HAL_MDIO_OP_WRITE 0x1
-#define XGE_HAL_MDIO_OP_READ 0x3
-#define XGE_HAL_MDIO_OP_READ_POST_INCREMENT 0x2
-#define XGE_HAL_MDIO_ALARM_TEMPHIGH 0x0080
-#define XGE_HAL_MDIO_ALARM_TEMPLOW 0x0040
-#define XGE_HAL_MDIO_ALARM_BIASHIGH 0x0008
-#define XGE_HAL_MDIO_ALARM_BIASLOW 0x0004
-#define XGE_HAL_MDIO_ALARM_POUTPUTHIGH 0x0002
-#define XGE_HAL_MDIO_ALARM_POUTPUTLOW 0x0001
-#define XGE_HAL_MDIO_WARN_TEMPHIGH 0x0080
-#define XGE_HAL_MDIO_WARN_TEMPLOW 0x0040
-#define XGE_HAL_MDIO_WARN_BIASHIGH 0x0008
-#define XGE_HAL_MDIO_WARN_BIASLOW 0x0004
-#define XGE_HAL_MDIO_WARN_POUTPUTHIGH 0x0002
-#define XGE_HAL_MDIO_WARN_POUTPUTLOW 0x0001
-
- u64 dtx_control;
-
- u64 i2c_control;
-#define XGE_HAL_I2C_CONTROL_DEV_ID(id) vBIT(id,1,3)
-#define XGE_HAL_I2C_CONTROL_ADDR(addr) vBIT(addr,5,11)
-#define XGE_HAL_I2C_CONTROL_BYTE_CNT(cnt) vBIT(cnt,22,2)
-#define XGE_HAL_I2C_CONTROL_READ BIT(24)
-#define XGE_HAL_I2C_CONTROL_NACK BIT(25)
-#define XGE_HAL_I2C_CONTROL_CNTL_START vBIT(0xE,28,4)
-#define XGE_HAL_I2C_CONTROL_CNTL_END(val) (val & vBIT(0x1,28,4))
-#define XGE_HAL_I2C_CONTROL_GET_DATA(val) (u32)(val & 0xFFFFFFFF)
-#define XGE_HAL_I2C_CONTROL_SET_DATA(val) vBIT(val,32,32)
-
- u64 beacon_control;
- u64 misc_control;
-#define XGE_HAL_MISC_CONTROL_LINK_STABILITY_PERIOD(val) vBIT(val,29,3)
-#define XGE_HAL_MISC_CONTROL_EXT_REQ_EN BIT(1)
-#define XGE_HAL_MISC_CONTROL_LINK_FAULT BIT(0)
-
- u64 xfb_control;
- u64 gpio_control;
-#define XGE_HAL_GPIO_CTRL_GPIO_0 BIT(8)
-
- u64 txfifo_dw_mask;
- u64 split_table_line_no;
- u64 sc_timeout;
- u64 pic_control_2;
-#define XGE_HAL_TXD_WRITE_BC(n) vBIT(n, 13, 3)
- u64 ini_dperr_ctrl;
- u64 wreq_split_mask;
- u64 qw_per_rxd;
- u8 unused7[0x300 - 0x250];
-
- u64 pic_status;
- u64 txp_status;
- u64 txp_err_context;
- u64 spdm_bir_offset;
-#define XGE_HAL_SPDM_PCI_BAR_NUM(spdm_bir_offset) \
- (u8)(spdm_bir_offset >> 61)
-#define XGE_HAL_SPDM_PCI_BAR_OFFSET(spdm_bir_offset) \
- (u32)((spdm_bir_offset >> 32) & 0x1FFFFFFF)
- u64 spdm_overwrite;
-#define XGE_HAL_SPDM_OVERWRITE_ERR_SPDM_ENTRY(spdm_overwrite) \
- (u8)((spdm_overwrite >> 48) & 0xff)
-#define XGE_HAL_SPDM_OVERWRITE_ERR_SPDM_DW(spdm_overwrite) \
- (u8)((spdm_overwrite >> 40) & 0x3)
-#define XGE_HAL_SPDM_OVERWRITE_ERR_SPDM_LINE(spdm_overwrite) \
- (u8)((spdm_overwrite >> 32) & 0x7)
- u64 cfg_addr_on_dperr;
- u64 pif_addr_on_dperr;
- u64 tags_in_use;
- u64 rd_req_types;
- u64 split_table_line;
- u64 unxp_split_add_ph;
- u64 unexp_split_attr_ph;
- u64 split_message;
- u64 spdm_structure;
-#define XGE_HAL_SPDM_MAX_ENTRIES(spdm_structure) (u16)(spdm_structure >> 48)
-#define XGE_HAL_SPDM_INT_QW_PER_ENTRY(spdm_structure) \
- (u8)((spdm_structure >> 40) & 0xff)
-#define XGE_HAL_SPDM_PCI_QW_PER_ENTRY(spdm_structure) \
- (u8)((spdm_structure >> 32) & 0xff)
-
- u64 txdw_ptr_cnt_0;
- u64 txdw_ptr_cnt_1;
- u64 txdw_ptr_cnt_2;
- u64 txdw_ptr_cnt_3;
- u64 txdw_ptr_cnt_4;
- u64 txdw_ptr_cnt_5;
- u64 txdw_ptr_cnt_6;
- u64 txdw_ptr_cnt_7;
- u64 rxdw_cnt_ring_0;
- u64 rxdw_cnt_ring_1;
- u64 rxdw_cnt_ring_2;
- u64 rxdw_cnt_ring_3;
- u64 rxdw_cnt_ring_4;
- u64 rxdw_cnt_ring_5;
- u64 rxdw_cnt_ring_6;
- u64 rxdw_cnt_ring_7;
-
- u8 unused8[0x410];
-
-/* TxDMA registers */
- u64 txdma_int_status;
- u64 txdma_int_mask;
-#define XGE_HAL_TXDMA_PFC_INT BIT(0)
-#define XGE_HAL_TXDMA_TDA_INT BIT(1)
-#define XGE_HAL_TXDMA_PCC_INT BIT(2)
-#define XGE_HAL_TXDMA_TTI_INT BIT(3)
-#define XGE_HAL_TXDMA_LSO_INT BIT(4)
-#define XGE_HAL_TXDMA_TPA_INT BIT(5)
-#define XGE_HAL_TXDMA_SM_INT BIT(6)
- u64 pfc_err_reg;
-#define XGE_HAL_PFC_ECC_SG_ERR BIT(7)
-#define XGE_HAL_PFC_ECC_DB_ERR BIT(15)
-#define XGE_HAL_PFC_SM_ERR_ALARM BIT(23)
-#define XGE_HAL_PFC_MISC_0_ERR BIT(31)
-#define XGE_HAL_PFC_MISC_1_ERR BIT(32)
-#define XGE_HAL_PFC_PCIX_ERR BIT(39)
- u64 pfc_err_mask;
- u64 pfc_err_alarm;
-
- u64 tda_err_reg;
-#define XGE_HAL_TDA_Fn_ECC_SG_ERR vBIT(0xff,0,8)
-#define XGE_HAL_TDA_Fn_ECC_DB_ERR vBIT(0xff,8,8)
-#define XGE_HAL_TDA_SM0_ERR_ALARM BIT(22)
-#define XGE_HAL_TDA_SM1_ERR_ALARM BIT(23)
-#define XGE_HAL_TDA_PCIX_ERR BIT(39)
- u64 tda_err_mask;
- u64 tda_err_alarm;
-
- u64 pcc_err_reg;
-#define XGE_HAL_PCC_FB_ECC_SG_ERR vBIT(0xFF,0,8)
-#define XGE_HAL_PCC_TXB_ECC_SG_ERR vBIT(0xFF,8,8)
-#define XGE_HAL_PCC_FB_ECC_DB_ERR vBIT(0xFF,16, 8)
-#define XGE_HAL_PCC_TXB_ECC_DB_ERR vBIT(0xff,24,8)
-#define XGE_HAL_PCC_SM_ERR_ALARM vBIT(0xff,32,8)
-#define XGE_HAL_PCC_WR_ERR_ALARM vBIT(0xff,40,8)
-#define XGE_HAL_PCC_N_SERR vBIT(0xff,48,8)
-#define XGE_HAL_PCC_ENABLE_FOUR vBIT(0x0F,0,8)
-#define XGE_HAL_PCC_6_COF_OV_ERR BIT(56)
-#define XGE_HAL_PCC_7_COF_OV_ERR BIT(57)
-#define XGE_HAL_PCC_6_LSO_OV_ERR BIT(58)
-#define XGE_HAL_PCC_7_LSO_OV_ERR BIT(59)
- u64 pcc_err_mask;
- u64 pcc_err_alarm;
-
- u64 tti_err_reg;
-#define XGE_HAL_TTI_ECC_SG_ERR BIT(7)
-#define XGE_HAL_TTI_ECC_DB_ERR BIT(15)
-#define XGE_HAL_TTI_SM_ERR_ALARM BIT(23)
- u64 tti_err_mask;
- u64 tti_err_alarm;
-
- u64 lso_err_reg;
-#define XGE_HAL_LSO6_SEND_OFLOW BIT(12)
-#define XGE_HAL_LSO7_SEND_OFLOW BIT(13)
-#define XGE_HAL_LSO6_ABORT BIT(14)
-#define XGE_HAL_LSO7_ABORT BIT(15)
-#define XGE_HAL_LSO6_SM_ERR_ALARM BIT(22)
-#define XGE_HAL_LSO7_SM_ERR_ALARM BIT(23)
- u64 lso_err_mask;
- u64 lso_err_alarm;
-
- u64 tpa_err_reg;
-#define XGE_HAL_TPA_TX_FRM_DROP BIT(7)
-#define XGE_HAL_TPA_SM_ERR_ALARM BIT(23)
- u64 tpa_err_mask;
- u64 tpa_err_alarm;
-
- u64 sm_err_reg;
-#define XGE_HAL_SM_SM_ERR_ALARM BIT(15)
- u64 sm_err_mask;
- u64 sm_err_alarm;
-
- u8 unused9[0x100 - 0xB8];
-
-/* TxDMA arbiter */
- u64 tx_dma_wrap_stat;
-
-/* Tx FIFO controller */
-#define XGE_HAL_X_MAX_FIFOS 8
-#define XGE_HAL_X_FIFO_MAX_LEN 0x1FFF /*8191 */
- u64 tx_fifo_partition_0;
-#define XGE_HAL_TX_FIFO_PARTITION_EN BIT(0)
-#define XGE_HAL_TX_FIFO_PARTITION_0_PRI(val) vBIT(val,5,3)
-#define XGE_HAL_TX_FIFO_PARTITION_0_LEN(val) vBIT(val,19,13)
-#define XGE_HAL_TX_FIFO_PARTITION_1_PRI(val) vBIT(val,37,3)
-#define XGE_HAL_TX_FIFO_PARTITION_1_LEN(val) vBIT(val,51,13 )
-
- u64 tx_fifo_partition_1;
-#define XGE_HAL_TX_FIFO_PARTITION_2_PRI(val) vBIT(val,5,3)
-#define XGE_HAL_TX_FIFO_PARTITION_2_LEN(val) vBIT(val,19,13)
-#define XGE_HAL_TX_FIFO_PARTITION_3_PRI(val) vBIT(val,37,3)
-#define XGE_HAL_TX_FIFO_PARTITION_3_LEN(val) vBIT(val,51,13)
-
- u64 tx_fifo_partition_2;
-#define XGE_HAL_TX_FIFO_PARTITION_4_PRI(val) vBIT(val,5,3)
-#define XGE_HAL_TX_FIFO_PARTITION_4_LEN(val) vBIT(val,19,13)
-#define XGE_HAL_TX_FIFO_PARTITION_5_PRI(val) vBIT(val,37,3)
-#define XGE_HAL_TX_FIFO_PARTITION_5_LEN(val) vBIT(val,51,13)
-
- u64 tx_fifo_partition_3;
-#define XGE_HAL_TX_FIFO_PARTITION_6_PRI(val) vBIT(val,5,3)
-#define XGE_HAL_TX_FIFO_PARTITION_6_LEN(val) vBIT(val,19,13)
-#define XGE_HAL_TX_FIFO_PARTITION_7_PRI(val) vBIT(val,37,3)
-#define XGE_HAL_TX_FIFO_PARTITION_7_LEN(val) vBIT(val,51,13)
-
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_0 0 /* highest */
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_1 1
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_2 2
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_3 3
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_4 4
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_5 5
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_6 6
-#define XGE_HAL_TX_FIFO_PARTITION_PRI_7 7 /* lowest */
-
- u64 tx_w_round_robin_0;
- u64 tx_w_round_robin_1;
- u64 tx_w_round_robin_2;
- u64 tx_w_round_robin_3;
- u64 tx_w_round_robin_4;
-
- u64 tti_command_mem;
-#define XGE_HAL_TTI_CMD_MEM_WE BIT(7)
-#define XGE_HAL_TTI_CMD_MEM_STROBE_NEW_CMD BIT(15)
-#define XGE_HAL_TTI_CMD_MEM_STROBE_BEING_EXECUTED BIT(15)
-#define XGE_HAL_TTI_CMD_MEM_OFFSET(n) vBIT(n,26,6)
-
- u64 tti_data1_mem;
-#define XGE_HAL_TTI_DATA1_MEM_TX_TIMER_VAL(n) vBIT(n,6,26)
-#define XGE_HAL_TTI_DATA1_MEM_TX_TIMER_AC_CI(n) vBIT(n,38,2)
-#define XGE_HAL_TTI_DATA1_MEM_TX_TIMER_AC_EN BIT(38)
-#define XGE_HAL_TTI_DATA1_MEM_TX_TIMER_CI_EN BIT(39)
-#define XGE_HAL_TTI_DATA1_MEM_TX_URNG_A(n) vBIT(n,41,7)
-#define XGE_HAL_TTI_DATA1_MEM_TX_URNG_B(n) vBIT(n,49,7)
-#define XGE_HAL_TTI_DATA1_MEM_TX_URNG_C(n) vBIT(n,57,7)
-
- u64 tti_data2_mem;
-#define XGE_HAL_TTI_DATA2_MEM_TX_UFC_A(n) vBIT(n,0,16)
-#define XGE_HAL_TTI_DATA2_MEM_TX_UFC_B(n) vBIT(n,16,16)
-#define XGE_HAL_TTI_DATA2_MEM_TX_UFC_C(n) vBIT(n,32,16)
-#define XGE_HAL_TTI_DATA2_MEM_TX_UFC_D(n) vBIT(n,48,16)
-
-/* Tx Protocol assist */
- u64 tx_pa_cfg;
-#define XGE_HAL_TX_PA_CFG_IGNORE_FRM_ERR BIT(1)
-#define XGE_HAL_TX_PA_CFG_IGNORE_SNAP_OUI BIT(2)
-#define XGE_HAL_TX_PA_CFG_IGNORE_LLC_CTRL BIT(3)
-#define XGE_HAL_TX_PA_CFG_IGNORE_L2_ERR BIT(6)
-
-/* Recent add, used only debug purposes. */
- u64 pcc_enable;
-
- u64 pfc_monitor_0;
- u64 pfc_monitor_1;
- u64 pfc_monitor_2;
- u64 pfc_monitor_3;
- u64 txd_ownership_ctrl;
- u64 pfc_read_cntrl;
- u64 pfc_read_data;
-
- u8 unused10[0x1700 - 0x11B0];
-
- u64 txdma_debug_ctrl;
-
- u8 unused11[0x1800 - 0x1708];
-
-/* RxDMA Registers */
- u64 rxdma_int_status;
-#define XGE_HAL_RXDMA_RC_INT BIT(0)
-#define XGE_HAL_RXDMA_RPA_INT BIT(1)
-#define XGE_HAL_RXDMA_RDA_INT BIT(2)
-#define XGE_HAL_RXDMA_RTI_INT BIT(3)
-
- u64 rxdma_int_mask;
-#define XGE_HAL_RXDMA_INT_RC_INT_M BIT(0)
-#define XGE_HAL_RXDMA_INT_RPA_INT_M BIT(1)
-#define XGE_HAL_RXDMA_INT_RDA_INT_M BIT(2)
-#define XGE_HAL_RXDMA_INT_RTI_INT_M BIT(3)
-
- u64 rda_err_reg;
-#define XGE_HAL_RDA_RXDn_ECC_SG_ERR vBIT(0xFF,0,8)
-#define XGE_HAL_RDA_RXDn_ECC_DB_ERR vBIT(0xFF,8,8)
-#define XGE_HAL_RDA_FRM_ECC_SG_ERR BIT(23)
-#define XGE_HAL_RDA_FRM_ECC_DB_N_AERR BIT(31)
-#define XGE_HAL_RDA_SM1_ERR_ALARM BIT(38)
-#define XGE_HAL_RDA_SM0_ERR_ALARM BIT(39)
-#define XGE_HAL_RDA_MISC_ERR BIT(47)
-#define XGE_HAL_RDA_PCIX_ERR BIT(55)
-#define XGE_HAL_RDA_RXD_ECC_DB_SERR BIT(63)
- u64 rda_err_mask;
- u64 rda_err_alarm;
-
- u64 rc_err_reg;
-#define XGE_HAL_RC_PRCn_ECC_SG_ERR vBIT(0xFF,0,8)
-#define XGE_HAL_RC_PRCn_ECC_DB_ERR vBIT(0xFF,8,8)
-#define XGE_HAL_RC_FTC_ECC_SG_ERR BIT(23)
-#define XGE_HAL_RC_FTC_ECC_DB_ERR BIT(31)
-#define XGE_HAL_RC_PRCn_SM_ERR_ALARM vBIT(0xFF,32,8)
-#define XGE_HAL_RC_FTC_SM_ERR_ALARM BIT(47)
-#define XGE_HAL_RC_RDA_FAIL_WR_Rn vBIT(0xFF,48,8)
- u64 rc_err_mask;
- u64 rc_err_alarm;
-
- u64 prc_pcix_err_reg;
-#define XGE_HAL_PRC_PCI_AB_RD_Rn vBIT(0xFF,0,8)
-#define XGE_HAL_PRC_PCI_DP_RD_Rn vBIT(0xFF,8,8)
-#define XGE_HAL_PRC_PCI_AB_WR_Rn vBIT(0xFF,16,8)
-#define XGE_HAL_PRC_PCI_DP_WR_Rn vBIT(0xFF,24,8)
-#define XGE_HAL_PRC_PCI_AB_F_WR_Rn vBIT(0xFF,32,8)
-#define XGE_HAL_PRC_PCI_DP_F_WR_Rn vBIT(0xFF,40,8)
- u64 prc_pcix_err_mask;
- u64 prc_pcix_err_alarm;
-
- u64 rpa_err_reg;
-#define XGE_HAL_RPA_ECC_SG_ERR BIT(7)
-#define XGE_HAL_RPA_ECC_DB_ERR BIT(15)
-#define XGE_HAL_RPA_FLUSH_REQUEST BIT(22)
-#define XGE_HAL_RPA_SM_ERR_ALARM BIT(23)
-#define XGE_HAL_RPA_CREDIT_ERR BIT(31)
- u64 rpa_err_mask;
- u64 rpa_err_alarm;
-
- u64 rti_err_reg;
-#define XGE_HAL_RTI_ECC_SG_ERR BIT(7)
-#define XGE_HAL_RTI_ECC_DB_ERR BIT(15)
-#define XGE_HAL_RTI_SM_ERR_ALARM BIT(23)
- u64 rti_err_mask;
- u64 rti_err_alarm;
-
- u8 unused12[0x100 - 0x88];
-
-/* DMA arbiter */
- u64 rx_queue_priority;
-#define XGE_HAL_RX_QUEUE_0_PRIORITY(val) vBIT(val,5,3)
-#define XGE_HAL_RX_QUEUE_1_PRIORITY(val) vBIT(val,13,3)
-#define XGE_HAL_RX_QUEUE_2_PRIORITY(val) vBIT(val,21,3)
-#define XGE_HAL_RX_QUEUE_3_PRIORITY(val) vBIT(val,29,3)
-#define XGE_HAL_RX_QUEUE_4_PRIORITY(val) vBIT(val,37,3)
-#define XGE_HAL_RX_QUEUE_5_PRIORITY(val) vBIT(val,45,3)
-#define XGE_HAL_RX_QUEUE_6_PRIORITY(val) vBIT(val,53,3)
-#define XGE_HAL_RX_QUEUE_7_PRIORITY(val) vBIT(val,61,3)
-
-#define XGE_HAL_RX_QUEUE_PRI_0 0 /* highest */
-#define XGE_HAL_RX_QUEUE_PRI_1 1
-#define XGE_HAL_RX_QUEUE_PRI_2 2
-#define XGE_HAL_RX_QUEUE_PRI_3 3
-#define XGE_HAL_RX_QUEUE_PRI_4 4
-#define XGE_HAL_RX_QUEUE_PRI_5 5
-#define XGE_HAL_RX_QUEUE_PRI_6 6
-#define XGE_HAL_RX_QUEUE_PRI_7 7 /* lowest */
-
- u64 rx_w_round_robin_0;
- u64 rx_w_round_robin_1;
- u64 rx_w_round_robin_2;
- u64 rx_w_round_robin_3;
- u64 rx_w_round_robin_4;
-
- /* Per-ring controller regs */
-#define XGE_HAL_RX_MAX_RINGS 8
- u64 prc_rxd0_n[XGE_HAL_RX_MAX_RINGS];
- u64 prc_ctrl_n[XGE_HAL_RX_MAX_RINGS];
-#define XGE_HAL_PRC_CTRL_RC_ENABLED BIT(7)
-#define XGE_HAL_PRC_CTRL_RING_MODE (BIT(14)|BIT(15))
-#define XGE_HAL_PRC_CTRL_RING_MODE_1 vBIT(0,14,2)
-#define XGE_HAL_PRC_CTRL_RING_MODE_3 vBIT(1,14,2)
-#define XGE_HAL_PRC_CTRL_RING_MODE_5 vBIT(2,14,2)
-#define XGE_HAL_PRC_CTRL_RING_MODE_x vBIT(3,14,2)
-#define XGE_HAL_PRC_CTRL_NO_SNOOP(n) vBIT(n,22,2)
-#define XGE_HAL_PRC_CTRL_RTH_DISABLE BIT(31)
-#define XGE_HAL_PRC_CTRL_BIMODAL_INTERRUPT BIT(37)
-#define XGE_HAL_PRC_CTRL_GROUP_READS BIT(38)
-#define XGE_HAL_PRC_CTRL_RXD_BACKOFF_INTERVAL(val) vBIT(val,40,24)
-
- u64 prc_alarm_action;
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R0_STOP BIT(3)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R0_STOP BIT(7)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R1_STOP BIT(11)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R1_STOP BIT(15)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R2_STOP BIT(19)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R2_STOP BIT(23)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R3_STOP BIT(27)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R3_STOP BIT(31)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R4_STOP BIT(35)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R4_STOP BIT(39)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R5_STOP BIT(43)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R5_STOP BIT(47)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R6_STOP BIT(51)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R6_STOP BIT(55)
-#define XGE_HAL_PRC_ALARM_ACTION_RR_R7_STOP BIT(59)
-#define XGE_HAL_PRC_ALARM_ACTION_RW_R7_STOP BIT(63)
-
-/* Receive traffic interrupts */
- u64 rti_command_mem;
-#define XGE_HAL_RTI_CMD_MEM_WE BIT(7)
-#define XGE_HAL_RTI_CMD_MEM_STROBE BIT(15)
-#define XGE_HAL_RTI_CMD_MEM_STROBE_NEW_CMD BIT(15)
-#define XGE_HAL_RTI_CMD_MEM_STROBE_CMD_BEING_EXECUTED BIT(15)
-#define XGE_HAL_RTI_CMD_MEM_OFFSET(n) vBIT(n,29,3)
-
- u64 rti_data1_mem;
-#define XGE_HAL_RTI_DATA1_MEM_RX_TIMER_VAL(n) vBIT(n,3,29)
-#define XGE_HAL_RTI_DATA1_MEM_RX_TIMER_AC_EN BIT(38)
-#define XGE_HAL_RTI_DATA1_MEM_RX_TIMER_CI_EN BIT(39)
-#define XGE_HAL_RTI_DATA1_MEM_RX_URNG_A(n) vBIT(n,41,7)
-#define XGE_HAL_RTI_DATA1_MEM_RX_URNG_B(n) vBIT(n,49,7)
-#define XGE_HAL_RTI_DATA1_MEM_RX_URNG_C(n) vBIT(n,57,7)
-
- u64 rti_data2_mem;
-#define XGE_HAL_RTI_DATA2_MEM_RX_UFC_A(n) vBIT(n,0,16)
-#define XGE_HAL_RTI_DATA2_MEM_RX_UFC_B(n) vBIT(n,16,16)
-#define XGE_HAL_RTI_DATA2_MEM_RX_UFC_C(n) vBIT(n,32,16)
-#define XGE_HAL_RTI_DATA2_MEM_RX_UFC_D(n) vBIT(n,48,16)
-
- u64 rx_pa_cfg;
-#define XGE_HAL_RX_PA_CFG_IGNORE_FRM_ERR BIT(1)
-#define XGE_HAL_RX_PA_CFG_IGNORE_SNAP_OUI BIT(2)
-#define XGE_HAL_RX_PA_CFG_IGNORE_LLC_CTRL BIT(3)
-#define XGE_HAL_RX_PA_CFG_SCATTER_MODE(n) vBIT(n,6,1)
-#define XGE_HAL_RX_PA_CFG_STRIP_VLAN_TAG_MODE(n) vBIT(n,15,1)
-
- u8 unused13_0[0x8];
-
- u64 ring_bump_counter1;
- u64 ring_bump_counter2;
-#define XGE_HAL_RING_BUMP_CNT(i, val) (u16)(val >> (48 - (16 * (i % 4))))
-
- u8 unused13[0x700 - 0x1f0];
-
- u64 rxdma_debug_ctrl;
-
- u8 unused14[0x2000 - 0x1f08];
-
-/* Media Access Controller Register */
- u64 mac_int_status;
- u64 mac_int_mask;
-#define XGE_HAL_MAC_INT_STATUS_TMAC_INT BIT(0)
-#define XGE_HAL_MAC_INT_STATUS_RMAC_INT BIT(1)
-
- u64 mac_tmac_err_reg;
-#define XGE_HAL_TMAC_ECC_DB_ERR BIT(15)
-#define XGE_HAL_TMAC_TX_BUF_OVRN BIT(23)
-#define XGE_HAL_TMAC_TX_CRI_ERR BIT(31)
-#define XGE_HAL_TMAC_TX_SM_ERR BIT(39)
- u64 mac_tmac_err_mask;
- u64 mac_tmac_err_alarm;
-
- u64 mac_rmac_err_reg;
-#define XGE_HAL_RMAC_RX_BUFF_OVRN BIT(0)
-#define XGE_HAL_RMAC_RTH_SPDM_ECC_SG_ERR BIT(0)
-#define XGE_HAL_RMAC_RTS_ECC_DB_ERR BIT(0)
-#define XGE_HAL_RMAC_ECC_DB_ERR BIT(0)
-#define XGE_HAL_RMAC_RTH_SPDM_ECC_DB_ERR BIT(0)
-#define XGE_HAL_RMAC_LINK_STATE_CHANGE_INT BIT(0)
-#define XGE_HAL_RMAC_RX_SM_ERR BIT(39)
- u64 mac_rmac_err_mask;
- u64 mac_rmac_err_alarm;
-
- u8 unused15[0x100 - 0x40];
-
- u64 mac_cfg;
-#define XGE_HAL_MAC_CFG_TMAC_ENABLE BIT(0)
-#define XGE_HAL_MAC_CFG_RMAC_ENABLE BIT(1)
-#define XGE_HAL_MAC_CFG_LAN_NOT_WAN BIT(2)
-#define XGE_HAL_MAC_CFG_TMAC_LOOPBACK BIT(3)
-#define XGE_HAL_MAC_CFG_TMAC_APPEND_PAD BIT(4)
-#define XGE_HAL_MAC_CFG_RMAC_STRIP_FCS BIT(5)
-#define XGE_HAL_MAC_CFG_RMAC_STRIP_PAD BIT(6)
-#define XGE_HAL_MAC_CFG_RMAC_PROM_ENABLE BIT(7)
-#define XGE_HAL_MAC_RMAC_DISCARD_PFRM BIT(8)
-#define XGE_HAL_MAC_RMAC_BCAST_ENABLE BIT(9)
-#define XGE_HAL_MAC_RMAC_ALL_ADDR_ENABLE BIT(10)
-#define XGE_HAL_MAC_RMAC_INVLD_IPG_THR(val) vBIT(val,16,8)
-
- u64 tmac_avg_ipg;
-#define XGE_HAL_TMAC_AVG_IPG(val) vBIT(val,0,8)
-
- u64 rmac_max_pyld_len;
-#define XGE_HAL_RMAC_MAX_PYLD_LEN(val) vBIT(val,2,14)
-
- u64 rmac_err_cfg;
-#define XGE_HAL_RMAC_ERR_FCS BIT(0)
-#define XGE_HAL_RMAC_ERR_FCS_ACCEPT BIT(1)
-#define XGE_HAL_RMAC_ERR_TOO_LONG BIT(1)
-#define XGE_HAL_RMAC_ERR_TOO_LONG_ACCEPT BIT(1)
-#define XGE_HAL_RMAC_ERR_RUNT BIT(2)
-#define XGE_HAL_RMAC_ERR_RUNT_ACCEPT BIT(2)
-#define XGE_HAL_RMAC_ERR_LEN_MISMATCH BIT(3)
-#define XGE_HAL_RMAC_ERR_LEN_MISMATCH_ACCEPT BIT(3)
-
- u64 rmac_cfg_key;
-#define XGE_HAL_RMAC_CFG_KEY(val) vBIT(val,0,16)
-
-#define XGE_HAL_MAX_MAC_ADDRESSES 64
-#define XGE_HAL_MAC_MC_ALL_MC_ADDR_OFFSET 63
-#define XGE_HAL_MAX_MAC_ADDRESSES_HERC 256
-#define XGE_HAL_MAC_MC_ALL_MC_ADDR_OFFSET_HERC 255
-
- u64 rmac_addr_cmd_mem;
-#define XGE_HAL_RMAC_ADDR_CMD_MEM_WE BIT(7)
-#define XGE_HAL_RMAC_ADDR_CMD_MEM_RD 0
-#define XGE_HAL_RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD BIT(15)
-#define XGE_HAL_RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING BIT(15)
-#define XGE_HAL_RMAC_ADDR_CMD_MEM_OFFSET(n) vBIT(n,26,6)
-
- u64 rmac_addr_data0_mem;
-#define XGE_HAL_RMAC_ADDR_DATA0_MEM_ADDR(n) vBIT(n,0,48)
-#define XGE_HAL_RMAC_ADDR_DATA0_MEM_USER BIT(48)
-
- u64 rmac_addr_data1_mem;
-#define XGE_HAL_RMAC_ADDR_DATA1_MEM_MASK(n) vBIT(n,0,48)
-
- u8 unused16[0x8];
-
-/*
- u64 rmac_addr_cfg;
-#define XGE_HAL_RMAC_ADDR_UCASTn_EN(n) mBIT(0)_n(n)
-#define XGE_HAL_RMAC_ADDR_MCASTn_EN(n) mBIT(0)_n(n)
-#define XGE_HAL_RMAC_ADDR_BCAST_EN vBIT(0)_48
-#define XGE_HAL_RMAC_ADDR_ALL_ADDR_EN vBIT(0)_49
-*/
- u64 tmac_ipg_cfg;
-
- u64 rmac_pause_cfg;
-#define XGE_HAL_RMAC_PAUSE_GEN_EN BIT(0)
-#define XGE_HAL_RMAC_PAUSE_RCV_EN BIT(1)
-#define XGE_HAL_RMAC_PAUSE_HG_PTIME_DEF vBIT(0xFFFF,16,16)
-#define XGE_HAL_RMAC_PAUSE_HG_PTIME(val) vBIT(val,16,16)
-
- u64 rmac_red_cfg;
-
- u64 rmac_red_rate_q0q3;
- u64 rmac_red_rate_q4q7;
-
- u64 mac_link_util;
-#define XGE_HAL_MAC_TX_LINK_UTIL vBIT(0xFE,1,7)
-#define XGE_HAL_MAC_TX_LINK_UTIL_DISABLE vBIT(0xF, 8,4)
-#define XGE_HAL_MAC_TX_LINK_UTIL_VAL( n ) vBIT(n,8,4)
-#define XGE_HAL_MAC_RX_LINK_UTIL vBIT(0xFE,33,7)
-#define XGE_HAL_MAC_RX_LINK_UTIL_DISABLE vBIT(0xF,40,4)
-#define XGE_HAL_MAC_RX_LINK_UTIL_VAL( n ) vBIT(n,40,4)
-
-#define XGE_HAL_MAC_LINK_UTIL_DISABLE (XGE_HAL_MAC_TX_LINK_UTIL_DISABLE | \
- XGE_HAL_MAC_RX_LINK_UTIL_DISABLE)
-
- u64 rmac_invalid_ipg;
-
-/* rx traffic steering */
-#define XGE_HAL_MAC_RTS_FRM_LEN_SET(len) vBIT(len,2,14)
- u64 rts_frm_len_n[8];
-
- u64 rts_qos_steering;
-
-#define XGE_HAL_MAX_DIX_MAP 4
- u64 rts_dix_map_n[XGE_HAL_MAX_DIX_MAP];
-#define XGE_HAL_RTS_DIX_MAP_ETYPE(val) vBIT(val,0,16)
-#define XGE_HAL_RTS_DIX_MAP_SCW(val) BIT(val,21)
-
- u64 rts_q_alternates;
- u64 rts_default_q;
-#define XGE_HAL_RTS_DEFAULT_Q(n) vBIT(n,5,3)
-
- u64 rts_ctrl;
-#define XGE_HAL_RTS_CTRL_IGNORE_SNAP_OUI BIT(2)
-#define XGE_HAL_RTS_CTRL_IGNORE_LLC_CTRL BIT(3)
-#define XGE_HAL_RTS_CTRL_ENHANCED_MODE BIT(7)
-
- u64 rts_pn_cam_ctrl;
-#define XGE_HAL_RTS_PN_CAM_CTRL_WE BIT(7)
-#define XGE_HAL_RTS_PN_CAM_CTRL_STROBE_NEW_CMD BIT(15)
-#define XGE_HAL_RTS_PN_CAM_CTRL_STROBE_BEING_EXECUTED BIT(15)
-#define XGE_HAL_RTS_PN_CAM_CTRL_OFFSET(n) vBIT(n,24,8)
- u64 rts_pn_cam_data;
-#define XGE_HAL_RTS_PN_CAM_DATA_TCP_SELECT BIT(7)
-#define XGE_HAL_RTS_PN_CAM_DATA_PORT(val) vBIT(val,8,16)
-#define XGE_HAL_RTS_PN_CAM_DATA_SCW(val) vBIT(val,24,8)
-
- u64 rts_ds_mem_ctrl;
-#define XGE_HAL_RTS_DS_MEM_CTRL_WE BIT(7)
-#define XGE_HAL_RTS_DS_MEM_CTRL_STROBE_NEW_CMD BIT(15)
-#define XGE_HAL_RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED BIT(15)
-#define XGE_HAL_RTS_DS_MEM_CTRL_OFFSET(n) vBIT(n,26,6)
- u64 rts_ds_mem_data;
-#define XGE_HAL_RTS_DS_MEM_DATA(n) vBIT(n,0,8)
-
- u8 unused16_1[0x308 - 0x220];
-
- u64 rts_vid_mem_ctrl;
- u64 rts_vid_mem_data;
- u64 rts_p0_p3_map;
- u64 rts_p4_p7_map;
- u64 rts_p8_p11_map;
- u64 rts_p12_p15_map;
-
- u64 rts_mac_cfg;
-#define XGE_HAL_RTS_MAC_SECT0_EN BIT(0)
-#define XGE_HAL_RTS_MAC_SECT1_EN BIT(1)
-#define XGE_HAL_RTS_MAC_SECT2_EN BIT(2)
-#define XGE_HAL_RTS_MAC_SECT3_EN BIT(3)
-#define XGE_HAL_RTS_MAC_SECT4_EN BIT(4)
-#define XGE_HAL_RTS_MAC_SECT5_EN BIT(5)
-#define XGE_HAL_RTS_MAC_SECT6_EN BIT(6)
-#define XGE_HAL_RTS_MAC_SECT7_EN BIT(7)
-
- u8 unused16_2[0x380 - 0x340];
-
- u64 rts_rth_cfg;
-#define XGE_HAL_RTS_RTH_EN BIT(3)
-#define XGE_HAL_RTS_RTH_BUCKET_SIZE(n) vBIT(n,4,4)
-#define XGE_HAL_RTS_RTH_ALG_SEL_MS BIT(11)
-#define XGE_HAL_RTS_RTH_TCP_IPV4_EN BIT(15)
-#define XGE_HAL_RTS_RTH_UDP_IPV4_EN BIT(19)
-#define XGE_HAL_RTS_RTH_IPV4_EN BIT(23)
-#define XGE_HAL_RTS_RTH_TCP_IPV6_EN BIT(27)
-#define XGE_HAL_RTS_RTH_UDP_IPV6_EN BIT(31)
-#define XGE_HAL_RTS_RTH_IPV6_EN BIT(35)
-#define XGE_HAL_RTS_RTH_TCP_IPV6_EX_EN BIT(39)
-#define XGE_HAL_RTS_RTH_UDP_IPV6_EX_EN BIT(43)
-#define XGE_HAL_RTS_RTH_IPV6_EX_EN BIT(47)
-
- u64 rts_rth_map_mem_ctrl;
-#define XGE_HAL_RTS_RTH_MAP_MEM_CTRL_WE BIT(7)
-#define XGE_HAL_RTS_RTH_MAP_MEM_CTRL_STROBE BIT(15)
-#define XGE_HAL_RTS_RTH_MAP_MEM_CTRL_OFFSET(n) vBIT(n,24,8)
-
- u64 rts_rth_map_mem_data;
-#define XGE_HAL_RTS_RTH_MAP_MEM_DATA_ENTRY_EN BIT(3)
-#define XGE_HAL_RTS_RTH_MAP_MEM_DATA(n) vBIT(n,5,3)
-
- u64 rts_rth_spdm_mem_ctrl;
-#define XGE_HAL_RTS_RTH_SPDM_MEM_CTRL_STROBE BIT(15)
-#define XGE_HAL_RTS_RTH_SPDM_MEM_CTRL_LINE_SEL(n) vBIT(n,21,3)
-#define XGE_HAL_RTS_RTH_SPDM_MEM_CTRL_OFFSET(n) vBIT(n,24,8)
-
- u64 rts_rth_spdm_mem_data;
-
- u64 rts_rth_jhash_cfg;
-#define XGE_HAL_RTS_RTH_JHASH_GOLDEN(n) vBIT(n,0,32)
-#define XGE_HAL_RTS_RTH_JHASH_INIT_VAL(n) vBIT(n,32,32)
-
- u64 rts_rth_hash_mask[5]; /* rth mask's 0...4 */
- u64 rts_rth_hash_mask_5;
-#define XGE_HAL_RTH_HASH_MASK_5(n) vBIT(n,0,32)
-
- u64 rts_rth_status;
-#define XGE_HAL_RTH_STATUS_SPDM_USE_L4 BIT(3)
-
- u8 unused17[0x400 - 0x3E8];
-
- u64 rmac_red_fine_q0q3;
- u64 rmac_red_fine_q4q7;
- u64 rmac_pthresh_cross;
- u64 rmac_rthresh_cross;
- u64 rmac_pnum_range[32];
-
- u64 rmac_mp_crc_0;
- u64 rmac_mp_mask_a_0;
- u64 rmac_mp_mask_b_0;
-
- u64 rmac_mp_crc_1;
- u64 rmac_mp_mask_a_1;
- u64 rmac_mp_mask_b_1;
-
- u64 rmac_mp_crc_2;
- u64 rmac_mp_mask_a_2;
- u64 rmac_mp_mask_b_2;
-
- u64 rmac_mp_crc_3;
- u64 rmac_mp_mask_a_3;
- u64 rmac_mp_mask_b_3;
-
- u64 rmac_mp_crc_4;
- u64 rmac_mp_mask_a_4;
- u64 rmac_mp_mask_b_4;
-
- u64 rmac_mp_crc_5;
- u64 rmac_mp_mask_a_5;
- u64 rmac_mp_mask_b_5;
-
- u64 rmac_mp_crc_6;
- u64 rmac_mp_mask_a_6;
- u64 rmac_mp_mask_b_6;
-
- u64 rmac_mp_crc_7;
- u64 rmac_mp_mask_a_7;
- u64 rmac_mp_mask_b_7;
-
- u64 mac_ctrl;
- u64 activity_control;
-
- u8 unused17_2[0x700 - 0x5F0];
-
- u64 mac_debug_ctrl;
-#define XGE_HAL_MAC_DBG_ACTIVITY_VALUE 0x411040400000000ULL
-
- u8 unused18[0x2800 - 0x2708];
-
-/* memory controller registers */
- u64 mc_int_status;
-#define XGE_HAL_MC_INT_STATUS_MC_INT BIT(0)
- u64 mc_int_mask;
-#define XGE_HAL_MC_INT_MASK_MC_INT BIT(0)
-
- u64 mc_err_reg;
-#define XGE_HAL_MC_ERR_REG_ITQ_ECC_SG_ERR_L BIT(2) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_ITQ_ECC_SG_ERR_U BIT(3) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_RLD_ECC_SG_ERR_L BIT(4) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_RLD_ECC_SG_ERR_U BIT(5) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_ETQ_ECC_SG_ERR_L BIT(6)
-#define XGE_HAL_MC_ERR_REG_ETQ_ECC_SG_ERR_U BIT(7)
-#define XGE_HAL_MC_ERR_REG_ITQ_ECC_DB_ERR_L BIT(10) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_ITQ_ECC_DB_ERR_U BIT(11) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_RLD_ECC_DB_ERR_L BIT(12) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_RLD_ECC_DB_ERR_U BIT(13) /* non-Xena */
-#define XGE_HAL_MC_ERR_REG_ETQ_ECC_DB_ERR_L BIT(14)
-#define XGE_HAL_MC_ERR_REG_ETQ_ECC_DB_ERR_U BIT(15)
-#define XGE_HAL_MC_ERR_REG_MIRI_ECC_SG_ERR_0 BIT(17)
-#define XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_0 BIT(18) /* Xena: reset */
-#define XGE_HAL_MC_ERR_REG_MIRI_ECC_SG_ERR_1 BIT(19)
-#define XGE_HAL_MC_ERR_REG_MIRI_ECC_DB_ERR_1 BIT(20) /* Xena: reset */
-#define XGE_HAL_MC_ERR_REG_MIRI_CRI_ERR_0 BIT(22)
-#define XGE_HAL_MC_ERR_REG_MIRI_CRI_ERR_1 BIT(23)
-#define XGE_HAL_MC_ERR_REG_SM_ERR BIT(31)
-#define XGE_HAL_MC_ERR_REG_PL_LOCK_N BIT(39)
-
- u64 mc_err_mask;
- u64 mc_err_alarm;
-
- u8 unused19[0x100 - 0x28];
-
-/* MC configuration */
- u64 rx_queue_cfg;
-#define XGE_HAL_RX_QUEUE_CFG_Q0_SZ(n) vBIT(n,0,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q1_SZ(n) vBIT(n,8,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q2_SZ(n) vBIT(n,16,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q3_SZ(n) vBIT(n,24,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q4_SZ(n) vBIT(n,32,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q5_SZ(n) vBIT(n,40,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q6_SZ(n) vBIT(n,48,8)
-#define XGE_HAL_RX_QUEUE_CFG_Q7_SZ(n) vBIT(n,56,8)
-
- u64 mc_rldram_mrs;
-#define XGE_HAL_MC_RLDRAM_QUEUE_SIZE_ENABLE BIT(39)
-#define XGE_HAL_MC_RLDRAM_MRS_ENABLE BIT(47)
-
- u64 mc_rldram_interleave;
-
- u64 mc_pause_thresh_q0q3;
- u64 mc_pause_thresh_q4q7;
-
- u64 mc_red_thresh_q[8];
-
- u8 unused20[0x200 - 0x168];
- u64 mc_rldram_ref_per;
- u8 unused21[0x220 - 0x208];
- u64 mc_rldram_test_ctrl;
-#define XGE_HAL_MC_RLDRAM_TEST_MODE BIT(47)
-#define XGE_HAL_MC_RLDRAM_TEST_WRITE BIT(7)
-#define XGE_HAL_MC_RLDRAM_TEST_GO BIT(15)
-#define XGE_HAL_MC_RLDRAM_TEST_DONE BIT(23)
-#define XGE_HAL_MC_RLDRAM_TEST_PASS BIT(31)
-
- u8 unused22[0x240 - 0x228];
- u64 mc_rldram_test_add;
- u8 unused23[0x260 - 0x248];
- u64 mc_rldram_test_d0;
- u8 unused24[0x280 - 0x268];
- u64 mc_rldram_test_d1;
- u8 unused25[0x300 - 0x288];
- u64 mc_rldram_test_d2;
- u8 unused26_1[0x2C00 - 0x2B08];
- u64 mc_rldram_test_read_d0;
- u8 unused26_2[0x20 - 0x8];
- u64 mc_rldram_test_read_d1;
- u8 unused26_3[0x40 - 0x28];
- u64 mc_rldram_test_read_d2;
- u8 unused26_4[0x60 - 0x48];
- u64 mc_rldram_test_add_bkg;
- u8 unused26_5[0x80 - 0x68];
- u64 mc_rldram_test_d0_bkg;
- u8 unused26_6[0xD00 - 0xC88];
- u64 mc_rldram_test_d1_bkg;
- u8 unused26_7[0x20 - 0x8];
- u64 mc_rldram_test_d2_bkg;
- u8 unused26_8[0x40 - 0x28];
- u64 mc_rldram_test_read_d0_bkg;
- u8 unused26_9[0x60 - 0x48];
- u64 mc_rldram_test_read_d1_bkg;
- u8 unused26_10[0x80 - 0x68];
- u64 mc_rldram_test_read_d2_bkg;
- u8 unused26_11[0xE00 - 0xD88];
- u64 mc_rldram_generation;
- u8 unused26_12[0x20 - 0x8];
- u64 mc_driver;
- u8 unused26_13[0x40 - 0x28];
- u64 mc_rldram_ref_per_herc;
-#define XGE_HAL_MC_RLDRAM_SET_REF_PERIOD(n) vBIT(n, 0, 16)
- u8 unused26_14[0x660 - 0x648];
- u64 mc_rldram_mrs_herc;
-#define XGE_HAL_MC_RLDRAM_MRS(n) vBIT(n, 14, 17)
- u8 unused26_15[0x700 - 0x668];
- u64 mc_debug_ctrl;
-
- u8 unused27[0x3000 - 0x2f08];
-
-/* XGXG */
- /* XGXS control registers */
-
- u64 xgxs_int_status;
-#define XGE_HAL_XGXS_INT_STATUS_TXGXS BIT(0)
-#define XGE_HAL_XGXS_INT_STATUS_RXGXS BIT(1)
- u64 xgxs_int_mask;
-#define XGE_HAL_XGXS_INT_MASK_TXGXS BIT(0)
-#define XGE_HAL_XGXS_INT_MASK_RXGXS BIT(1)
-
- u64 xgxs_txgxs_err_reg;
-#define XGE_HAL_TXGXS_ECC_SG_ERR BIT(7)
-#define XGE_HAL_TXGXS_ECC_DB_ERR BIT(15)
-#define XGE_HAL_TXGXS_ESTORE_UFLOW BIT(31)
-#define XGE_HAL_TXGXS_TX_SM_ERR BIT(39)
- u64 xgxs_txgxs_err_mask;
- u64 xgxs_txgxs_err_alarm;
-
- u64 xgxs_rxgxs_err_reg;
-#define XGE_HAL_RXGXS_ESTORE_OFLOW BIT(7)
-#define XGE_HAL_RXGXS_RX_SM_ERR BIT(39)
- u64 xgxs_rxgxs_err_mask;
- u64 xgxs_rxgxs_err_alarm;
-
- u64 spi_err_reg;
- u64 spi_err_mask;
- u64 spi_err_alarm;
-
- u8 unused28[0x100 - 0x58];
-
- u64 xgxs_cfg;
- u64 xgxs_status;
-
- u64 xgxs_cfg_key;
- u64 xgxs_efifo_cfg; /* CHANGED */
- u64 rxgxs_ber_0; /* CHANGED */
- u64 rxgxs_ber_1; /* CHANGED */
-
- u64 spi_control;
- u64 spi_data;
- u64 spi_write_protect;
-
- u8 unused29[0x80 - 0x48];
-
- u64 xgxs_cfg_1;
-} xge_hal_pci_bar0_t;
-
-/* Using this strcture to calculate offsets */
-typedef struct xge_hal_pci_config_le_t {
- u16 vendor_id; // 0x00
- u16 device_id; // 0x02
-
- u16 command; // 0x04
- u16 status; // 0x06
-
- u8 revision; // 0x08
- u8 pciClass[3]; // 0x09
-
- u8 cache_line_size; // 0x0c
- u8 latency_timer; // 0x0d
- u8 header_type; // 0x0e
- u8 bist; // 0x0f
-
- u32 base_addr0_lo; // 0x10
- u32 base_addr0_hi; // 0x14
-
- u32 base_addr1_lo; // 0x18
- u32 base_addr1_hi; // 0x1C
-
- u32 not_Implemented1; // 0x20
- u32 not_Implemented2; // 0x24
-
- u32 cardbus_cis_pointer; // 0x28
-
- u16 subsystem_vendor_id; // 0x2c
- u16 subsystem_id; // 0x2e
-
- u32 rom_base; // 0x30
- u8 capabilities_pointer; // 0x34
- u8 rsvd_35[3]; // 0x35
- u32 rsvd_38; // 0x38
-
- u8 interrupt_line; // 0x3c
- u8 interrupt_pin; // 0x3d
- u8 min_grant; // 0x3e
- u8 max_latency; // 0x3f
-
- u8 msi_cap_id; // 0x40
- u8 msi_next_ptr; // 0x41
- u16 msi_control; // 0x42
- u32 msi_lower_address; // 0x44
- u32 msi_higher_address; // 0x48
- u16 msi_data; // 0x4c
- u16 msi_unused; // 0x4e
-
- u8 vpd_cap_id; // 0x50
- u8 vpd_next_cap; // 0x51
- u16 vpd_addr; // 0x52
- u32 vpd_data; // 0x54
-
- u8 rsvd_b0[8]; // 0x58
-
- u8 pcix_cap; // 0x60
- u8 pcix_next_cap; // 0x61
- u16 pcix_command; // 0x62
-
- u32 pcix_status; // 0x64
-
- u8 rsvd_b1[XGE_HAL_PCI_XFRAME_CONFIG_SPACE_SIZE-0x68];
-} xge_hal_pci_config_le_t; // 0x100
-
-typedef struct xge_hal_pci_config_t {
-#ifdef XGE_OS_HOST_BIG_ENDIAN
- u16 device_id; // 0x02
- u16 vendor_id; // 0x00
-
- u16 status; // 0x06
- u16 command; // 0x04
-
- u8 pciClass[3]; // 0x09
- u8 revision; // 0x08
-
- u8 bist; // 0x0f
- u8 header_type; // 0x0e
- u8 latency_timer; // 0x0d
- u8 cache_line_size; // 0x0c
-
- u32 base_addr0_lo; // 0x10
- u32 base_addr0_hi; // 0x14
-
- u32 base_addr1_lo; // 0x18
- u32 base_addr1_hi; // 0x1C
-
- u32 not_Implemented1; // 0x20
- u32 not_Implemented2; // 0x24
-
- u32 cardbus_cis_pointer; // 0x28
-
- u16 subsystem_id; // 0x2e
- u16 subsystem_vendor_id; // 0x2c
-
- u32 rom_base; // 0x30
- u8 rsvd_35[3]; // 0x35
- u8 capabilities_pointer; // 0x34
- u32 rsvd_38; // 0x38
-
- u8 max_latency; // 0x3f
- u8 min_grant; // 0x3e
- u8 interrupt_pin; // 0x3d
- u8 interrupt_line; // 0x3c
-
- u16 msi_control; // 0x42
- u8 msi_next_ptr; // 0x41
- u8 msi_cap_id; // 0x40
- u32 msi_lower_address; // 0x44
- u32 msi_higher_address; // 0x48
- u16 msi_unused; // 0x4e
- u16 msi_data; // 0x4c
-
- u16 vpd_addr; // 0x52
- u8 vpd_next_cap; // 0x51
- u8 vpd_cap_id; // 0x50
- u32 vpd_data; // 0x54
-
- u8 rsvd_b0[8]; // 0x58
-
- u16 pcix_command; // 0x62
- u8 pcix_next_cap; // 0x61
- u8 pcix_cap; // 0x60
-
- u32 pcix_status; // 0x64
-#else
- u16 vendor_id; // 0x00
- u16 device_id; // 0x02
-
- u16 command; // 0x04
- u16 status; // 0x06
-
- u8 revision; // 0x08
- u8 pciClass[3]; // 0x09
-
- u8 cache_line_size; // 0x0c
- u8 latency_timer; // 0x0d
- u8 header_type; // 0x0e
- u8 bist; // 0x0f
-
- u32 base_addr0_lo; // 0x10
- u32 base_addr0_hi; // 0x14
-
- u32 base_addr1_lo; // 0x18
- u32 base_addr1_hi; // 0x1C
-
- u32 not_Implemented1; // 0x20
- u32 not_Implemented2; // 0x24
-
- u32 cardbus_cis_pointer; // 0x28
-
- u16 subsystem_vendor_id; // 0x2c
- u16 subsystem_id; // 0x2e
-
- u32 rom_base; // 0x30
- u8 capabilities_pointer; // 0x34
- u8 rsvd_35[3]; // 0x35
- u32 rsvd_38; // 0x38
-
- u8 interrupt_line; // 0x3c
- u8 interrupt_pin; // 0x3d
- u8 min_grant; // 0x3e
- u8 max_latency; // 0x3f
-
- u8 msi_cap_id; // 0x40
- u8 msi_next_ptr; // 0x41
- u16 msi_control; // 0x42
- u32 msi_lower_address; // 0x44
- u32 msi_higher_address; // 0x48
- u16 msi_data; // 0x4c
- u16 msi_unused; // 0x4e
-
- u8 vpd_cap_id; // 0x50
- u8 vpd_next_cap; // 0x51
- u16 vpd_addr; // 0x52
- u32 vpd_data; // 0x54
-
- u8 rsvd_b0[8]; // 0x58
-
- u8 pcix_cap; // 0x60
- u8 pcix_next_cap; // 0x61
- u16 pcix_command; // 0x62
-
- u32 pcix_status; // 0x64
-
-#endif
- u8 rsvd_b1[XGE_HAL_PCI_XFRAME_CONFIG_SPACE_SIZE-0x68];
-} xge_hal_pci_config_t; // 0x100
-
-#define XGE_HAL_REG_SPACE sizeof(xge_hal_pci_bar0_t)
-#define XGE_HAL_EEPROM_SIZE (0x01 << 11)
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_REGS_H */
diff --git a/sys/dev/nxge/include/xgehal-ring.h b/sys/dev/nxge/include/xgehal-ring.h
deleted file mode 100644
index 811fdccbc685..000000000000
--- a/sys/dev/nxge/include/xgehal-ring.h
+++ /dev/null
@@ -1,467 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_RING_H
-#define XGE_HAL_RING_H
-
-#include <dev/nxge/include/xgehal-channel.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-mm.h>
-
-__EXTERN_BEGIN_DECLS
-
-/* HW ring configuration */
-#define XGE_HAL_RING_RXDBLOCK_SIZE 0x1000
-
-#define XGE_HAL_RXD_T_CODE_OK 0x0
-#define XGE_HAL_RXD_T_CODE_PARITY 0x1
-#define XGE_HAL_RXD_T_CODE_ABORT 0x2
-#define XGE_HAL_RXD_T_CODE_PARITY_ABORT 0x3
-#define XGE_HAL_RXD_T_CODE_RDA_FAILURE 0x4
-#define XGE_HAL_RXD_T_CODE_UNKNOWN_PROTO 0x5
-#define XGE_HAL_RXD_T_CODE_BAD_FCS 0x6
-#define XGE_HAL_RXD_T_CODE_BUFF_SIZE 0x7
-#define XGE_HAL_RXD_T_CODE_BAD_ECC 0x8
-#define XGE_HAL_RXD_T_CODE_UNUSED_C 0xC
-#define XGE_HAL_RXD_T_CODE_UNKNOWN 0xF
-
-#define XGE_HAL_RING_USE_MTU -1
-
-/* control_1 and control_2 formatting - same for all buffer modes */
-#define XGE_HAL_RXD_GET_L3_CKSUM(control_1) ((u16)(control_1>>16) & 0xFFFF)
-#define XGE_HAL_RXD_GET_L4_CKSUM(control_1) ((u16)(control_1 & 0xFFFF))
-
-#define XGE_HAL_RXD_MASK_VLAN_TAG vBIT(0xFFFF,48,16)
-#define XGE_HAL_RXD_SET_VLAN_TAG(control_2, val) control_2 |= (u16)val
-#define XGE_HAL_RXD_GET_VLAN_TAG(control_2) ((u16)(control_2 & 0xFFFF))
-
-#define XGE_HAL_RXD_POSTED_4_XFRAME BIT(7) /* control_1 */
-#define XGE_HAL_RXD_NOT_COMPLETED BIT(0) /* control_2 */
-#define XGE_HAL_RXD_T_CODE (BIT(12)|BIT(13)|BIT(14)|BIT(15))
-#define XGE_HAL_RXD_GET_T_CODE(control_1) \
- ((control_1 & XGE_HAL_RXD_T_CODE)>>48)
-#define XGE_HAL_RXD_SET_T_CODE(control_1, val) \
- (control_1 |= (((u64)val & 0xF) << 48))
-
-#define XGE_HAL_RXD_MASK_FRAME_TYPE vBIT(0x3,25,2)
-#define XGE_HAL_RXD_MASK_FRAME_PROTO vBIT(0xFFFF,24,8)
-#define XGE_HAL_RXD_GET_FRAME_TYPE(control_1) \
- (u8)(0x3 & ((control_1 & XGE_HAL_RXD_MASK_FRAME_TYPE) >> 37))
-#define XGE_HAL_RXD_GET_FRAME_PROTO(control_1) \
- (u8)((control_1 & XGE_HAL_RXD_MASK_FRAME_PROTO) >> 32)
-#define XGE_HAL_RXD_FRAME_PROTO_VLAN_TAGGED BIT(24)
-#define XGE_HAL_RXD_FRAME_PROTO_IPV4 BIT(27)
-#define XGE_HAL_RXD_FRAME_PROTO_IPV6 BIT(28)
-#define XGE_HAL_RXD_FRAME_PROTO_IP_FRAGMENTED BIT(29)
-#define XGE_HAL_RXD_FRAME_PROTO_TCP BIT(30)
-#define XGE_HAL_RXD_FRAME_PROTO_UDP BIT(31)
-#define XGE_HAL_RXD_FRAME_TCP_OR_UDP (XGE_HAL_RXD_FRAME_PROTO_TCP | \
- XGE_HAL_RXD_FRAME_PROTO_UDP)
-
-/**
- * enum xge_hal_frame_type_e - Ethernet frame format.
- * @XGE_HAL_FRAME_TYPE_DIX: DIX (Ethernet II) format.
- * @XGE_HAL_FRAME_TYPE_LLC: LLC format.
- * @XGE_HAL_FRAME_TYPE_SNAP: SNAP format.
- * @XGE_HAL_FRAME_TYPE_IPX: IPX format.
- *
- * Ethernet frame format.
- */
-typedef enum xge_hal_frame_type_e {
- XGE_HAL_FRAME_TYPE_DIX = 0x0,
- XGE_HAL_FRAME_TYPE_LLC = 0x1,
- XGE_HAL_FRAME_TYPE_SNAP = 0x2,
- XGE_HAL_FRAME_TYPE_IPX = 0x3,
-} xge_hal_frame_type_e;
-
-/**
- * enum xge_hal_frame_proto_e - Higher-layer ethernet protocols.
- * @XGE_HAL_FRAME_PROTO_VLAN_TAGGED: VLAN.
- * @XGE_HAL_FRAME_PROTO_IPV4: IPv4.
- * @XGE_HAL_FRAME_PROTO_IPV6: IPv6.
- * @XGE_HAL_FRAME_PROTO_IP_FRAGMENTED: IP fragmented.
- * @XGE_HAL_FRAME_PROTO_TCP: TCP.
- * @XGE_HAL_FRAME_PROTO_UDP: UDP.
- * @XGE_HAL_FRAME_PROTO_TCP_OR_UDP: TCP or UDP.
- *
- * Higher layer ethernet protocols and options.
- */
-typedef enum xge_hal_frame_proto_e {
- XGE_HAL_FRAME_PROTO_VLAN_TAGGED = 0x80,
- XGE_HAL_FRAME_PROTO_IPV4 = 0x10,
- XGE_HAL_FRAME_PROTO_IPV6 = 0x08,
- XGE_HAL_FRAME_PROTO_IP_FRAGMENTED = 0x04,
- XGE_HAL_FRAME_PROTO_TCP = 0x02,
- XGE_HAL_FRAME_PROTO_UDP = 0x01,
- XGE_HAL_FRAME_PROTO_TCP_OR_UDP = (XGE_HAL_FRAME_PROTO_TCP | \
- XGE_HAL_FRAME_PROTO_UDP)
-} xge_hal_frame_proto_e;
-
-/*
- * xge_hal_ring_rxd_1_t
- */
-typedef struct {
- u64 host_control;
- u64 control_1;
- u64 control_2;
-#define XGE_HAL_RXD_1_MASK_BUFFER0_SIZE vBIT(0xFFFF,0,16)
-#define XGE_HAL_RXD_1_SET_BUFFER0_SIZE(val) vBIT(val,0,16)
-#define XGE_HAL_RXD_1_GET_BUFFER0_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,0,16))>>48)
-#define XGE_HAL_RXD_1_GET_RTH_VALUE(Control_2) \
- (u32)((Control_2 & vBIT(0xFFFFFFFF,16,32))>>16)
- u64 buffer0_ptr;
-} xge_hal_ring_rxd_1_t;
-
-/*
- * xge_hal_ring_rxd_3_t
- */
-typedef struct {
- u64 host_control;
- u64 control_1;
-
- u64 control_2;
-#define XGE_HAL_RXD_3_MASK_BUFFER0_SIZE vBIT(0xFF,8,8)
-#define XGE_HAL_RXD_3_SET_BUFFER0_SIZE(val) vBIT(val,8,8)
-#define XGE_HAL_RXD_3_MASK_BUFFER1_SIZE vBIT(0xFFFF,16,16)
-#define XGE_HAL_RXD_3_SET_BUFFER1_SIZE(val) vBIT(val,16,16)
-#define XGE_HAL_RXD_3_MASK_BUFFER2_SIZE vBIT(0xFFFF,32,16)
-#define XGE_HAL_RXD_3_SET_BUFFER2_SIZE(val) vBIT(val,32,16)
-
-
-#define XGE_HAL_RXD_3_GET_BUFFER0_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFF,8,8))>>48)
-#define XGE_HAL_RXD_3_GET_BUFFER1_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,16,16))>>32)
-#define XGE_HAL_RXD_3_GET_BUFFER2_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,32,16))>>16)
-
- u64 buffer0_ptr;
- u64 buffer1_ptr;
- u64 buffer2_ptr;
-} xge_hal_ring_rxd_3_t;
-
-/*
- * xge_hal_ring_rxd_5_t
- */
-typedef struct {
-#ifdef XGE_OS_HOST_BIG_ENDIAN
- u32 host_control;
- u32 control_3;
-#else
- u32 control_3;
- u32 host_control;
-#endif
-
-
-#define XGE_HAL_RXD_5_MASK_BUFFER3_SIZE vBIT(0xFFFF,32,16)
-#define XGE_HAL_RXD_5_SET_BUFFER3_SIZE(val) vBIT(val,32,16)
-#define XGE_HAL_RXD_5_MASK_BUFFER4_SIZE vBIT(0xFFFF,48,16)
-#define XGE_HAL_RXD_5_SET_BUFFER4_SIZE(val) vBIT(val,48,16)
-
-#define XGE_HAL_RXD_5_GET_BUFFER3_SIZE(Control_3) \
- (int)((Control_3 & vBIT(0xFFFF,32,16))>>16)
-#define XGE_HAL_RXD_5_GET_BUFFER4_SIZE(Control_3) \
- (int)((Control_3 & vBIT(0xFFFF,48,16)))
-
- u64 control_1;
- u64 control_2;
-
-#define XGE_HAL_RXD_5_MASK_BUFFER0_SIZE vBIT(0xFFFF,0,16)
-#define XGE_HAL_RXD_5_SET_BUFFER0_SIZE(val) vBIT(val,0,16)
-#define XGE_HAL_RXD_5_MASK_BUFFER1_SIZE vBIT(0xFFFF,16,16)
-#define XGE_HAL_RXD_5_SET_BUFFER1_SIZE(val) vBIT(val,16,16)
-#define XGE_HAL_RXD_5_MASK_BUFFER2_SIZE vBIT(0xFFFF,32,16)
-#define XGE_HAL_RXD_5_SET_BUFFER2_SIZE(val) vBIT(val,32,16)
-
-
-#define XGE_HAL_RXD_5_GET_BUFFER0_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,0,16))>>48)
-#define XGE_HAL_RXD_5_GET_BUFFER1_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,16,16))>>32)
-#define XGE_HAL_RXD_5_GET_BUFFER2_SIZE(Control_2) \
- (int)((Control_2 & vBIT(0xFFFF,32,16))>>16)
- u64 buffer0_ptr;
- u64 buffer1_ptr;
- u64 buffer2_ptr;
- u64 buffer3_ptr;
- u64 buffer4_ptr;
-} xge_hal_ring_rxd_5_t;
-
-#define XGE_HAL_RXD_GET_RTH_SPDM_HIT(Control_1) \
- (u8)((Control_1 & BIT(18))>>45)
-#define XGE_HAL_RXD_GET_RTH_IT_HIT(Control_1) \
- (u8)((Control_1 & BIT(19))>>44)
-#define XGE_HAL_RXD_GET_RTH_HASH_TYPE(Control_1) \
- (u8)((Control_1 & vBIT(0xF,20,4))>>40)
-
-#define XGE_HAL_RXD_HASH_TYPE_NONE 0x0
-#define XGE_HAL_RXD_HASH_TYPE_TCP_IPV4 0x1
-#define XGE_HAL_RXD_HASH_TYPE_UDP_IPV4 0x2
-#define XGE_HAL_RXD_HASH_TYPE_IPV4 0x3
-#define XGE_HAL_RXD_HASH_TYPE_TCP_IPV6 0x4
-#define XGE_HAL_RXD_HASH_TYPE_UDP_IPV6 0x5
-#define XGE_HAL_RXD_HASH_TYPE_IPV6 0x6
-#define XGE_HAL_RXD_HASH_TYPE_TCP_IPV6_EX 0x7
-#define XGE_HAL_RXD_HASH_TYPE_UDP_IPV6_EX 0x8
-#define XGE_HAL_RXD_HASH_TYPE_IPV6_EX 0x9
-
-typedef u8 xge_hal_ring_block_t[XGE_HAL_RING_RXDBLOCK_SIZE];
-
-#define XGE_HAL_RING_NEXT_BLOCK_POINTER_OFFSET 0xFF8
-#define XGE_HAL_RING_MEMBLOCK_IDX_OFFSET 0xFF0
-
-#define XGE_HAL_RING_RXD_SIZEOF(n) \
- (n==1 ? sizeof(xge_hal_ring_rxd_1_t) : \
- (n==3 ? sizeof(xge_hal_ring_rxd_3_t) : \
- sizeof(xge_hal_ring_rxd_5_t)))
-
-#define XGE_HAL_RING_RXDS_PER_BLOCK(n) \
- (n==1 ? 127 : (n==3 ? 85 : 63))
-
-/**
- * struct xge_hal_ring_rxd_priv_t - Receive descriptor HAL-private data.
- * @dma_addr: DMA (mapped) address of _this_ descriptor.
- * @dma_handle: DMA handle used to map the descriptor onto device.
- * @dma_offset: Descriptor's offset in the memory block. HAL allocates
- * descriptors in memory blocks of
- * %XGE_HAL_RING_RXDBLOCK_SIZE
- * bytes. Each memblock is contiguous DMA-able memory. Each
- * memblock contains 1 or more 4KB RxD blocks visible to the
- * Xframe hardware.
- * @dma_object: DMA address and handle of the memory block that contains
- * the descriptor. This member is used only in the "checked"
- * version of the HAL (to enforce certain assertions);
- * otherwise it gets compiled out.
- * @allocated: True if the descriptor is reserved, 0 otherwise. Internal usage.
- *
- * Per-receive decsriptor HAL-private data. HAL uses the space to keep DMA
- * information associated with the descriptor. Note that ULD can ask HAL
- * to allocate additional per-descriptor space for its own (ULD-specific)
- * purposes.
- */
-typedef struct xge_hal_ring_rxd_priv_t {
- dma_addr_t dma_addr;
- pci_dma_h dma_handle;
- ptrdiff_t dma_offset;
-#ifdef XGE_DEBUG_ASSERT
- xge_hal_mempool_dma_t *dma_object;
-#endif
-#ifdef XGE_OS_MEMORY_CHECK
- int allocated;
-#endif
-} xge_hal_ring_rxd_priv_t;
-
-/**
- * struct xge_hal_ring_t - Ring channel.
- * @channel: Channel "base" of this ring, the common part of all HAL
- * channels.
- * @buffer_mode: 1, 3, or 5. The value specifies a receive buffer mode,
- * as per Xframe User Guide.
- * @indicate_max_pkts: Maximum number of packets processed within a single
- * interrupt. Can be used to limit the time spent inside hw
- * interrupt.
- * @config: Ring configuration, part of device configuration
- * (see xge_hal_device_config_t{}).
- * @rxd_size: RxD sizes for 1-, 3- or 5- buffer modes. As per Xframe spec,
- * 1-buffer mode descriptor is 32 byte long, etc.
- * @rxd_priv_size: Per RxD size reserved (by HAL) for ULD to keep per-descriptor
- * data (e.g., DMA handle for Solaris)
- * @rxds_per_block: Number of descriptors per hardware-defined RxD
- * block. Depends on the (1-,3-,5-) buffer mode.
- * @mempool: Memory pool, the pool from which descriptors get allocated.
- * (See xge_hal_mm.h).
- * @rxdblock_priv_size: Reserved at the end of each RxD block. HAL internal
- * usage. Not to confuse with @rxd_priv_size.
- * @reserved_rxds_arr: Array of RxD pointers. At any point in time each
- * entry in this array is available for allocation
- * (via xge_hal_ring_dtr_reserve()) and posting.
- * @cmpl_cnt: Completion counter. Is reset to zero upon entering the ISR.
- * Used in conjunction with @indicate_max_pkts.
- * Ring channel.
- *
- * Note: The structure is cache line aligned to better utilize
- * CPU cache performance.
- */
-typedef struct xge_hal_ring_t {
- xge_hal_channel_t channel;
- int buffer_mode;
- int indicate_max_pkts;
- xge_hal_ring_config_t *config;
- int rxd_size;
- int rxd_priv_size;
- int rxds_per_block;
- xge_hal_mempool_t *mempool;
- int rxdblock_priv_size;
- void **reserved_rxds_arr;
- int cmpl_cnt;
-} __xge_os_attr_cacheline_aligned xge_hal_ring_t;
-
-/**
- * struct xge_hal_dtr_info_t - Extended information associated with a
- * completed ring descriptor.
- * @l3_cksum: Result of IP checksum check (by Xframe hardware).
- * This field containing XGE_HAL_L3_CKSUM_OK would mean that
- * the checksum is correct, otherwise - the datagram is
- * corrupted.
- * @l4_cksum: Result of TCP/UDP checksum check (by Xframe hardware).
- * This field containing XGE_HAL_L4_CKSUM_OK would mean that
- * the checksum is correct. Otherwise - the packet is
- * corrupted.
- * @frame: See xge_hal_frame_type_e{}.
- * @proto: Reporting bits for various higher-layer protocols, including (but
- * note restricted to) TCP and UDP. See xge_hal_frame_proto_e{}.
- * @vlan: VLAN tag extracted from the received frame.
- * @rth_value: Receive Traffic Hashing(RTH) hash value. Produced by Xframe II
- * hardware if RTH is enabled.
- * @rth_it_hit: Set, If RTH hash value calculated by the Xframe II hardware
- * has a matching entry in the Indirection table.
- * @rth_spdm_hit: Set, If RTH hash value calculated by the Xframe II hardware
- * has a matching entry in the Socket Pair Direct Match table.
- * @rth_hash_type: RTH hash code of the function used to calculate the hash.
- * @reserved_pad: Unused byte.
- */
-typedef struct xge_hal_dtr_info_t {
- int l3_cksum;
- int l4_cksum;
- int frame; /* zero or more of xge_hal_frame_type_e flags */
- int proto; /* zero or more of xge_hal_frame_proto_e flags */
- int vlan;
- u32 rth_value;
- u8 rth_it_hit;
- u8 rth_spdm_hit;
- u8 rth_hash_type;
- u8 reserved_pad;
-} xge_hal_dtr_info_t;
-
-/* ========================== RING PRIVATE API ============================ */
-
-xge_hal_status_e __hal_ring_open(xge_hal_channel_h channelh,
- xge_hal_channel_attr_t *attr);
-
-void __hal_ring_close(xge_hal_channel_h channelh);
-
-void __hal_ring_hw_initialize(xge_hal_device_h devh);
-
-void __hal_ring_mtu_set(xge_hal_device_h devh, int new_mtu);
-
-void __hal_ring_prc_enable(xge_hal_channel_h channelh);
-
-void __hal_ring_prc_disable(xge_hal_channel_h channelh);
-
-xge_hal_status_e __hal_ring_initial_replenish(xge_hal_channel_t *channel,
- xge_hal_channel_reopen_e reopen);
-
-#if defined(XGE_DEBUG_FP) && (XGE_DEBUG_FP & XGE_DEBUG_FP_RING)
-#define __HAL_STATIC_RING
-#define __HAL_INLINE_RING
-
-__HAL_STATIC_RING __HAL_INLINE_RING int
-__hal_ring_block_memblock_idx(xge_hal_ring_block_t *block);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-__hal_ring_block_memblock_idx_set(xge_hal_ring_block_t*block, int memblock_idx);
-
-__HAL_STATIC_RING __HAL_INLINE_RING dma_addr_t
-__hal_ring_block_next_pointer(xge_hal_ring_block_t *block);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-__hal_ring_block_next_pointer_set(xge_hal_ring_block_t*block,
- dma_addr_t dma_next);
-
-__HAL_STATIC_RING __HAL_INLINE_RING xge_hal_ring_rxd_priv_t*
-__hal_ring_rxd_priv(xge_hal_ring_t *ring, xge_hal_dtr_h dtrh);
-
-/* =========================== RING PUBLIC API ============================ */
-
-__HAL_STATIC_RING __HAL_INLINE_RING xge_hal_status_e
-xge_hal_ring_dtr_reserve(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void*
-xge_hal_ring_dtr_private(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_1b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointer, int size);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_info_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- xge_hal_dtr_info_t *ext_info);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_1b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- dma_addr_t *dma_pointer, int *pkt_length);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_3b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[],
- int sizes[]);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_3b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- dma_addr_t dma_pointers[], int sizes[]);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_5b_set(xge_hal_dtr_h dtrh, dma_addr_t dma_pointers[],
- int sizes[]);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_5b_get(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- dma_addr_t dma_pointer[], int sizes[]);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_pre_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_post_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_post_post_wmb(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING xge_hal_status_e
-xge_hal_ring_dtr_next_completed(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh,
- u8 *t_code);
-
-__HAL_STATIC_RING __HAL_INLINE_RING void
-xge_hal_ring_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh);
-
-__HAL_STATIC_RING __HAL_INLINE_RING xge_hal_status_e
-xge_hal_ring_is_next_dtr_completed(xge_hal_channel_h channelh);
-
-#else /* XGE_FASTPATH_EXTERN */
-#define __HAL_STATIC_RING static
-#define __HAL_INLINE_RING inline
-#include <dev/nxge/xgehal/xgehal-ring-fp.c>
-#endif /* XGE_FASTPATH_INLINE */
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_RING_H */
diff --git a/sys/dev/nxge/include/xgehal-stats.h b/sys/dev/nxge/include/xgehal-stats.h
deleted file mode 100644
index c3847d4161f9..000000000000
--- a/sys/dev/nxge/include/xgehal-stats.h
+++ /dev/null
@@ -1,1566 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_STATS_H
-#define XGE_HAL_STATS_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-debug.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-config.h>
-
-__EXTERN_BEGIN_DECLS
-
-/**
- * struct xge_hal_stats_hw_info_t - Xframe hardware statistics.
- * Transmit MAC Statistics:
- *
- * @tmac_frms: Count of successfully transmitted MAC
- * frames Note that this statistic may be inaccurate. The correct statistic may
- * be derived by calcualating (tmac_ttl_octets - tmac_ttl_less_fb_octets) / 8
- *
- * @tmac_data_octets: Count of data and padding octets of successfully
- * transmitted frames.
- *
- * @tmac_drop_frms: Count of frames that could not be sent for no other reason
- * than internal MAC processing. Increments once whenever the
- * transmit buffer is flushed (due to an ECC error on a memory descriptor).
- *
- * @tmac_mcst_frms: Count of successfully transmitted frames to a multicast
- * address. Does not include frames sent to the broadcast address.
- *
- * @tmac_bcst_frms: Count of successfully transmitted frames to the broadcast
- * address.
- *
- * @tmac_pause_ctrl_frms: Count of MAC PAUSE control frames that are
- * transmitted. Since, the only control frames supported by this device
- * are PAUSE frames, this register is a count of all transmitted MAC control
- * frames.
- *
- * @tmac_ttl_octets: Count of total octets of transmitted frames, including
- * framing characters.
- *
- * @tmac_ucst_frms: Count of transmitted frames containing a unicast address.
- * @tmac_nucst_frms: Count of transmitted frames containing a non-unicast
- * (broadcast, multicast) address.
- *
- * @tmac_any_err_frms: Count of transmitted frames containing any error that
- * prevents them from being passed to the network. Increments if there is an ECC
- * while reading the frame out of the transmit buffer.
- *
- * @tmac_ttl_less_fb_octets: Count of total octets of transmitted
- * frames, not including framing characters (i.e. less framing bits)
- *
- * @tmac_vld_ip_octets: Count of total octets of transmitted IP datagrams that
- * were passed to the network. Frames that are padded by the host have
- * their padding counted as part of the IP datagram.
- *
- * @tmac_vld_ip: Count of transmitted IP datagrams that were passed to the
- * network.
- *
- * @tmac_drop_ip: Count of transmitted IP datagrams that could not be passed to
- * the network. Increments because of 1) an internal processing error (such as
- * an uncorrectable ECC error); 2) a frame parsing error during IP checksum
- * calculation.
- *
- * @tmac_icmp: Count of transmitted ICMP messages. Includes messages not sent
- * due to problems within ICMP.
- *
- * @tmac_rst_tcp: Count of transmitted TCP segments containing the RST flag.
- *
- * @tmac_tcp: Count of transmitted TCP segments. Note that Xena has
- * no knowledge of retransmission.
- *
- * @tmac_udp: Count of transmitted UDP datagrams.
- * @reserved_0: Reserved.
- *
- * Receive MAC Statistics:
- * @rmac_vld_frms: Count of successfully received MAC frames. Does not include
- * frames received with frame-too-long, FCS, or length errors.
- *
- * @rmac_data_octets: Count of data and padding octets of successfully received
- * frames. Does not include frames received with frame-too-long, FCS, or length
- * errors.
- *
- * @rmac_fcs_err_frms: Count of received MAC frames that do not pass FCS. Does
- * not include frames received with frame-too-long or frame-too-short error.
- *
- * @rmac_drop_frms: Count of received frames that could not be passed to the
- * host because of 1) Random Early Discard (RED); 2) Frame steering algorithm
- * found no available queue; 3) Receive ingress buffer overflow.
- *
- * @rmac_vld_mcst_frms: Count of successfully received MAC frames containing a
- * multicast address. Does not include frames received with frame-too-long, FCS,
- * or length errors.
- *
- * @rmac_vld_bcst_frms: Count of successfully received MAC frames containing a
- * broadcast address. Does not include frames received with frame-too-long, FCS,
- * or length errors.
- *
- * @rmac_in_rng_len_err_frms: Count of received frames with a length/type field
- * value between 46 (42 for VLANtagged frames) and 1500 (also 1500 for
- * VLAN-tagged frames), inclusive, that does not match the number of data octets
- * (including pad) received. Also contains a count of received frames with a
- * length/type field less than 46 (42 for VLAN-tagged frames) and the number of
- * data octets (including pad) received is greater than 46 (42 for VLAN-tagged
- * frames).
- *
- * @rmac_out_rng_len_err_frms: Count of received frames with length/type field
- * between 1501 and 1535 decimal, inclusive.
- *
- * @rmac_long_frms: Count of received frames that are longer than
- * rmac_max_pyld_len + 18 bytes (+22 bytes if VLAN-tagged).
- *
- * @rmac_pause_ctrl_frms: Count of received MAC PAUSE control frames.
- *
- * @rmac_unsup_ctrl_frms: Count of received MAC control frames
- * that do not contain the PAUSE opcode. The sum of MAC_PAUSE_CTRL_FRMS and this
- * register is a count of all received MAC control frames.
- *
- * @rmac_ttl_octets: Count of total octets of received frames, including framing
- * characters.
- *
- * @rmac_accepted_ucst_frms: Count of successfully received frames
- * containing a unicast address. Only includes frames that are passed to the
- * system.
- *
- * @rmac_accepted_nucst_frms: Count of successfully received frames
- * containing a non-unicast (broadcast or multicast) address. Only includes
- * frames that are passed to the system. Could include, for instance,
- * non-unicast frames that contain FCS errors if the MAC_ERROR_CFG register is
- * set to pass FCSerrored frames to the host.
- *
- * @rmac_discarded_frms: Count of received frames containing any error that
- * prevents them from being passed to the system. Includes, for example,
- * received pause frames that are discarded by the MAC and frames discarded
- * because of their destination address.
- *
- * @rmac_drop_events: Because the RMAC drops one frame at a time, this stat
- * matches rmac_drop_frms.
- *
- * @reserved_1: Reserved.
- * @rmac_ttl_less_fb_octets: Count of total octets of received frames,
- * not including framing characters (i.e. less framing bits).
- *
- * @rmac_ttl_frms: Count of all received MAC frames, including frames received
- * with frame-too-long, FCS, or length errors.
- *
- * @reserved_2: Reserved.
- * @reserved_3: Reserved.
- * @rmac_usized_frms: Count of received frames of length (including FCS, but not
- * framing bits) less than 64 octets, that are otherwise well-formed.
- *
- * @rmac_osized_frms: Count of received frames of length (including FCS, but not
- * framing bits) more than 1518 octets, that are otherwise well-formed.
- *
- * @rmac_frag_frms: Count of received frames of length (including FCS, but not
- * framing bits) less than 64 octets that had bad FCS. In other words, counts
- * fragments (i.e. runts).
- *
- * @rmac_jabber_frms: Count of received frames of length (including FCS, but not
- * framing bits) more than MTU octets that had bad FCS. In other words, counts
- * jabbers.
- *
- * @reserved_4: Reserved.
- * @rmac_ttl_64_frms: Count of all received MAC frames with length (including
- * FCS, but not framing bits) of exactly 64 octets. Includes frames received
- * with frame-too-long, FCS, or length errors.
- *
- * @rmac_ttl_65_127_frms: Count of all received MAC frames with length
- * (including FCS, but not framing bits) of between 65 and 127 octets
- * inclusive. Includes frames received with frame-too-long, FCS, or length
- * errors.
- * @reserved_5: Reserved.
- * @rmac_ttl_128_255_frms: Count of all received MAC frames with length
- * (including FCS, but not framing bits) of between 128 and 255 octets
- * inclusive. Includes frames received with frame-too-long, FCS, or length
- * errors.
- *
- * @rmac_ttl_256_511_frms: Count of all received MAC frames with length
- * (including FCS, but not framing bits) of between 256 and 511 octets
- * inclusive. Includes frames received with frame-too-long, FCS, or length
- * errors.
- *
- * @reserved_6: Reserved.
- * @rmac_ttl_512_1023_frms: Count of all received MAC frames with length
- * (including FCS, but not framing bits) of between 512 and 1023 octets
- * inclusive. Includes frames received with frame-too-long, FCS, or length
- * errors.
- *
- * @rmac_ttl_1024_1518_frms: Count of all received MAC frames with length
- * (including FCS, but not framing bits) of between 1024 and 1518 octets
- * inclusive. Includes frames received with frame-too-long, FCS, or length
- * errors.
- * @reserved_7: Reserved.
- * @rmac_ip: Count of received IP datagrams. Includes errored IP datagrams.
- *
- * @rmac_ip_octets: Count of number of octets in received IP datagrams. Includes
- * errored IP datagrams.
- *
- * @rmac_hdr_err_ip: Count of received IP datagrams that are discarded due to IP
- * header errors.
- *
- * @rmac_drop_ip: Count of received IP datagrams that could not be passed to the
- * host because of 1) Random Early Discard (RED); 2) Frame steering algorithm
- * found no available queue; 3) Receive ingress buffer overflow.
- * @rmac_icmp: Count of received ICMP messages. Includes errored ICMP messages
- * (due to ICMP checksum fail).
- *
- * @reserved_8: Reserved.
- * @rmac_tcp: Count of received TCP segments. Since Xena is unaware of
- * connection context, counts all received TCP segments, regardless of whether
- * or not they pertain to an established connection.
- *
- * @rmac_udp: Count of received UDP datagrams.
- * @rmac_err_drp_udp: Count of received UDP datagrams that were not delivered to
- * the system because of 1) Random Early Discard (RED); 2) Frame steering
- * algorithm found no available queue; 3) Receive ingress buffer overflow.
- *
- * @rmac_xgmii_err_sym: Count of the number of symbol errors in the received
- * XGMII data (i.e. PHY indicates "Receive Error" on the XGMII). Only includes
- * symbol errors that are observed between the XGMII Start Frame Delimiter
- * and End Frame Delimiter, inclusive. And only increments the count by one for
- * each frame.
- *
- * @rmac_frms_q0: Count of number of frames that pass through queue 0 of receive
- * buffer.
- * @rmac_frms_q1: Count of number of frames that pass through queue 1 of receive
- * buffer.
- * @rmac_frms_q2: Count of number of frames that pass through queue 2 of receive
- * buffer.
- * @rmac_frms_q3: Count of number of frames that pass through queue 3 of receive
- * buffer.
- * @rmac_frms_q4: Count of number of frames that pass through queue 4 of receive
- * buffer.
- * @rmac_frms_q5: Count of number of frames that pass through queue 5 of receive
- * buffer.
- * @rmac_frms_q6: Count of number of frames that pass through queue 6 of receive
- * buffer.
- * @rmac_frms_q7: Count of number of frames that pass through queue 7 of receive
- * buffer.
- * @rmac_full_q0: Count of number of times that receive buffer queue 0 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q1: Count of number of times that receive buffer queue 1 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q2: Count of number of times that receive buffer queue 2 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q3: Count of number of times that receive buffer queue 3 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q4: Count of number of times that receive buffer queue 4 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q5: Count of number of times that receive buffer queue 5 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q6: Count of number of times that receive buffer queue 6 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_full_q7: Count of number of times that receive buffer queue 7 has
- * filled up. If a queue is size 0, then this stat is incremented to a value of
- * 1 when MAC receives its first frame.
- *
- * @rmac_pause_cnt: Count of number of pause quanta that the MAC has been in the
- * paused state. Recall, one pause quantum equates to 512 bit times.
- * @reserved_9: Reserved.
- * @rmac_xgmii_data_err_cnt: This counter is incremented when either 1) The
- * Reconcilliation Sublayer (RS) is expecting one control character and gets
- * another (i.e. expecting Start control character and gets another control
- * character); 2) Start control character is not in lane 0 or lane 4; 3) The RS
- * gets a Start control character, but the start frame delimiter is not found in
- * the correct location.
- * @rmac_xgmii_ctrl_err_cnt: Maintains a count of unexpected or
- * misplaced control characters occuring outside of normal data transmission
- * (i.e. not included in RMAC_XGMII_DATA_ERR_CNT).
- *
- * @rmac_accepted_ip: Count of received IP datagrams that were passed to the
- * system.
- *
- * @rmac_err_tcp: Count of received TCP segments containing errors. For example,
- * bad TCP checksum.
- *
- * PCI (bus) Statistics:
- * @rd_req_cnt: Counts the total number of read requests made by the device.
- * @new_rd_req_cnt: Counts the requests made for a new read sequence (request
- * made for the same sequence after a retry or disconnect response are not
- * counted).
- * @new_rd_req_rtry_cnt: Counts the Retry responses received on the start of
- * the new read sequences.
- * @rd_rtry_cnt: Counts the Retry responses received for read requests.
- * @wr_rtry_rd_ack_cnt: Increments whenever a read request is accepted by
- * the target after a write request was terminated with retry.
- * @wr_req_cnt: Counts the total number of Write requests made by the device.
- * @new_wr_req_cnt: Counts the requests made for a new write sequence (request
- * made for the same sequence after a retry or disconnect response are not
- * counted).
- * @new_wr_req_rtry_cnt: Counts the requests made for a new write sequence
- * (request made for the same sequence after a retry or disconnect response are
- * not counted).
- *
- * @wr_rtry_cnt: Counts the Retry responses received for write requests.
- * @wr_disc_cnt: Write Disconnect. Counts the target initiated disconnects
- * on write transactions.
- * @rd_rtry_wr_ack_cnt: Increments whenever a write request is accepted by the
- * target after a read request was terminated with retry.
- *
- * @txp_wr_cnt: Counts the host write transactions to the Tx Pointer
- * FIFOs.
- * @txd_rd_cnt: Count of the Transmit Descriptor (TxD) read requests.
- * @txd_wr_cnt: Count of the TxD write requests.
- * @rxd_rd_cnt: Count of the Receive Descriptor (RxD) read requests.
- * @rxd_wr_cnt: Count of the RxD write requests.
- * @txf_rd_cnt: Count of transmit frame read requests. This will not
- * equal the number of frames transmitted, as frame data is typically spread
- * across multiple PCI transactions.
- * @rxf_wr_cnt: Count of receive frame write requests.
- *
- * @tmac_frms_oflow: tbd
- * @tmac_data_octets_oflow: tbd
- * @tmac_mcst_frms_oflow: tbd
- * @tmac_bcst_frms_oflow: tbd
- * @tmac_ttl_octets_oflow: tbd
- * @tmac_ucst_frms_oflow: tbd
- * @tmac_nucst_frms_oflow: tbd
- * @tmac_any_err_frms_oflow: tbd
- * @tmac_vlan_frms: tbd
- * @tmac_vld_ip_oflow: tbd
- * @tmac_drop_ip_oflow: tbd
- * @tmac_icmp_oflow: tbd
- * @tmac_rst_tcp_oflow: tbd
- * @tmac_udp_oflow: tbd
- * @reserved_10: tbd
- * @tpa_unknown_protocol: tbd
- * @tpa_parse_failure: tbd
- * @rmac_vld_frms_oflow: tbd
- * @rmac_data_octets_oflow: tbd
- * @rmac_vld_mcst_frms_oflow: tbd
- * @rmac_vld_bcst_frms_oflow: tbd
- * @rmac_ttl_octets_oflow: tbd
- * @rmac_accepted_ucst_frms_oflow: tbd
- * @rmac_accepted_nucst_frms_oflow: tbd
- * @rmac_discarded_frms_oflow: tbd
- * @rmac_drop_events_oflow: tbd
- * @rmac_usized_frms_oflow: tbd
- * @rmac_osized_frms_oflow: tbd
- * @rmac_frag_frms_oflow: tbd
- * @rmac_jabber_frms_oflow: tbd
- * @rmac_ip_oflow: tbd
- * @rmac_drop_ip_oflow: tbd
- * @rmac_icmp_oflow: tbd
- * @rmac_udp_oflow: tbd
- * @reserved_11: tbd
- * @rmac_err_drp_udp_oflow: tbd
- * @rmac_pause_cnt_oflow: tbd
- * @rmac_ttl_1519_4095_frms: tbd
- * @rmac_ttl_4096_8191_frms: tbd
- * @rmac_ttl_8192_max_frms: tbd
- * @rmac_ttl_gt_max_frms: tbd
- * @rmac_osized_alt_frms: tbd
- * @rmac_jabber_alt_frms: tbd
- * @rmac_gt_max_alt_frms: tbd
- * @rmac_vlan_frms: tbd
- * @rmac_fcs_discard: tbd
- * @rmac_len_discard: tbd
- * @rmac_da_discard: tbd
- * @rmac_pf_discard: tbd
- * @rmac_rts_discard: tbd
- * @rmac_wol_discard: tbd
- * @rmac_red_discard: tbd
- * @rmac_ingm_full_discard: tbd
- * @rmac_accepted_ip_oflow: tbd
- * @reserved_12: tbd
- * @link_fault_cnt: TBD
- * @reserved_13: tbd
- * Xframe hardware statistics.
- */
-typedef struct xge_hal_stats_hw_info_t {
-#ifdef XGE_OS_HOST_BIG_ENDIAN
-/* Tx MAC statistics counters. */
- u32 tmac_frms;
- u32 tmac_data_octets;
- u64 tmac_drop_frms;
- u32 tmac_mcst_frms;
- u32 tmac_bcst_frms;
- u64 tmac_pause_ctrl_frms;
- u32 tmac_ttl_octets;
- u32 tmac_ucst_frms;
- u32 tmac_nucst_frms;
- u32 tmac_any_err_frms;
- u64 tmac_ttl_less_fb_octets;
- u64 tmac_vld_ip_octets;
- u32 tmac_vld_ip;
- u32 tmac_drop_ip;
- u32 tmac_icmp;
- u32 tmac_rst_tcp;
- u64 tmac_tcp;
- u32 tmac_udp;
- u32 reserved_0;
-
-/* Rx MAC Statistics counters. */
- u32 rmac_vld_frms;
- u32 rmac_data_octets;
- u64 rmac_fcs_err_frms;
- u64 rmac_drop_frms;
- u32 rmac_vld_mcst_frms;
- u32 rmac_vld_bcst_frms;
- u32 rmac_in_rng_len_err_frms;
- u32 rmac_out_rng_len_err_frms;
- u64 rmac_long_frms;
- u64 rmac_pause_ctrl_frms;
- u64 rmac_unsup_ctrl_frms;
- u32 rmac_ttl_octets;
- u32 rmac_accepted_ucst_frms;
- u32 rmac_accepted_nucst_frms;
- u32 rmac_discarded_frms;
- u32 rmac_drop_events;
- u32 reserved_1;
- u64 rmac_ttl_less_fb_octets;
- u64 rmac_ttl_frms;
- u64 reserved_2;
- u32 reserved_3;
- u32 rmac_usized_frms;
- u32 rmac_osized_frms;
- u32 rmac_frag_frms;
- u32 rmac_jabber_frms;
- u32 reserved_4;
- u64 rmac_ttl_64_frms;
- u64 rmac_ttl_65_127_frms;
- u64 reserved_5;
- u64 rmac_ttl_128_255_frms;
- u64 rmac_ttl_256_511_frms;
- u64 reserved_6;
- u64 rmac_ttl_512_1023_frms;
- u64 rmac_ttl_1024_1518_frms;
- u32 reserved_7;
- u32 rmac_ip;
- u64 rmac_ip_octets;
- u32 rmac_hdr_err_ip;
- u32 rmac_drop_ip;
- u32 rmac_icmp;
- u32 reserved_8;
- u64 rmac_tcp;
- u32 rmac_udp;
- u32 rmac_err_drp_udp;
- u64 rmac_xgmii_err_sym;
- u64 rmac_frms_q0;
- u64 rmac_frms_q1;
- u64 rmac_frms_q2;
- u64 rmac_frms_q3;
- u64 rmac_frms_q4;
- u64 rmac_frms_q5;
- u64 rmac_frms_q6;
- u64 rmac_frms_q7;
- u16 rmac_full_q0;
- u16 rmac_full_q1;
- u16 rmac_full_q2;
- u16 rmac_full_q3;
- u16 rmac_full_q4;
- u16 rmac_full_q5;
- u16 rmac_full_q6;
- u16 rmac_full_q7;
- u32 rmac_pause_cnt;
- u32 reserved_9;
- u64 rmac_xgmii_data_err_cnt;
- u64 rmac_xgmii_ctrl_err_cnt;
- u32 rmac_accepted_ip;
- u32 rmac_err_tcp;
-
-/* PCI/PCI-X Read transaction statistics. */
- u32 rd_req_cnt;
- u32 new_rd_req_cnt;
- u32 new_rd_req_rtry_cnt;
- u32 rd_rtry_cnt;
- u32 wr_rtry_rd_ack_cnt;
-
-/* PCI/PCI-X write transaction statistics. */
- u32 wr_req_cnt;
- u32 new_wr_req_cnt;
- u32 new_wr_req_rtry_cnt;
- u32 wr_rtry_cnt;
- u32 wr_disc_cnt;
- u32 rd_rtry_wr_ack_cnt;
-
-/* DMA Transaction statistics. */
- u32 txp_wr_cnt;
- u32 txd_rd_cnt;
- u32 txd_wr_cnt;
- u32 rxd_rd_cnt;
- u32 rxd_wr_cnt;
- u32 txf_rd_cnt;
- u32 rxf_wr_cnt;
-
-/* Enhanced Herc statistics */
- u32 tmac_frms_oflow;
- u32 tmac_data_octets_oflow;
- u32 tmac_mcst_frms_oflow;
- u32 tmac_bcst_frms_oflow;
- u32 tmac_ttl_octets_oflow;
- u32 tmac_ucst_frms_oflow;
- u32 tmac_nucst_frms_oflow;
- u32 tmac_any_err_frms_oflow;
- u64 tmac_vlan_frms;
- u32 tmac_vld_ip_oflow;
- u32 tmac_drop_ip_oflow;
- u32 tmac_icmp_oflow;
- u32 tmac_rst_tcp_oflow;
- u32 tmac_udp_oflow;
- u32 tpa_unknown_protocol;
- u32 tpa_parse_failure;
- u32 reserved_10;
- u32 rmac_vld_frms_oflow;
- u32 rmac_data_octets_oflow;
- u32 rmac_vld_mcst_frms_oflow;
- u32 rmac_vld_bcst_frms_oflow;
- u32 rmac_ttl_octets_oflow;
- u32 rmac_accepted_ucst_frms_oflow;
- u32 rmac_accepted_nucst_frms_oflow;
- u32 rmac_discarded_frms_oflow;
- u32 rmac_drop_events_oflow;
- u32 rmac_usized_frms_oflow;
- u32 rmac_osized_frms_oflow;
- u32 rmac_frag_frms_oflow;
- u32 rmac_jabber_frms_oflow;
- u32 rmac_ip_oflow;
- u32 rmac_drop_ip_oflow;
- u32 rmac_icmp_oflow;
- u32 rmac_udp_oflow;
- u32 rmac_err_drp_udp_oflow;
- u32 rmac_pause_cnt_oflow;
- u32 reserved_11;
- u64 rmac_ttl_1519_4095_frms;
- u64 rmac_ttl_4096_8191_frms;
- u64 rmac_ttl_8192_max_frms;
- u64 rmac_ttl_gt_max_frms;
- u64 rmac_osized_alt_frms;
- u64 rmac_jabber_alt_frms;
- u64 rmac_gt_max_alt_frms;
- u64 rmac_vlan_frms;
- u32 rmac_fcs_discard;
- u32 rmac_len_discard;
- u32 rmac_da_discard;
- u32 rmac_pf_discard;
- u32 rmac_rts_discard;
- u32 rmac_wol_discard;
- u32 rmac_red_discard;
- u32 rmac_ingm_full_discard;
- u32 rmac_accepted_ip_oflow;
- u32 reserved_12;
- u32 link_fault_cnt;
- u32 reserved_13;
-#else
-/* Tx MAC statistics counters. */
- u32 tmac_data_octets;
- u32 tmac_frms;
- u64 tmac_drop_frms;
- u32 tmac_bcst_frms;
- u32 tmac_mcst_frms;
- u64 tmac_pause_ctrl_frms;
- u32 tmac_ucst_frms;
- u32 tmac_ttl_octets;
- u32 tmac_any_err_frms;
- u32 tmac_nucst_frms;
- u64 tmac_ttl_less_fb_octets;
- u64 tmac_vld_ip_octets;
- u32 tmac_drop_ip;
- u32 tmac_vld_ip;
- u32 tmac_rst_tcp;
- u32 tmac_icmp;
- u64 tmac_tcp;
- u32 reserved_0;
- u32 tmac_udp;
-
-/* Rx MAC Statistics counters. */
- u32 rmac_data_octets;
- u32 rmac_vld_frms;
- u64 rmac_fcs_err_frms;
- u64 rmac_drop_frms;
- u32 rmac_vld_bcst_frms;
- u32 rmac_vld_mcst_frms;
- u32 rmac_out_rng_len_err_frms;
- u32 rmac_in_rng_len_err_frms;
- u64 rmac_long_frms;
- u64 rmac_pause_ctrl_frms;
- u64 rmac_unsup_ctrl_frms;
- u32 rmac_accepted_ucst_frms;
- u32 rmac_ttl_octets;
- u32 rmac_discarded_frms;
- u32 rmac_accepted_nucst_frms;
- u32 reserved_1;
- u32 rmac_drop_events;
- u64 rmac_ttl_less_fb_octets;
- u64 rmac_ttl_frms;
- u64 reserved_2;
- u32 rmac_usized_frms;
- u32 reserved_3;
- u32 rmac_frag_frms;
- u32 rmac_osized_frms;
- u32 reserved_4;
- u32 rmac_jabber_frms;
- u64 rmac_ttl_64_frms;
- u64 rmac_ttl_65_127_frms;
- u64 reserved_5;
- u64 rmac_ttl_128_255_frms;
- u64 rmac_ttl_256_511_frms;
- u64 reserved_6;
- u64 rmac_ttl_512_1023_frms;
- u64 rmac_ttl_1024_1518_frms;
- u32 rmac_ip;
- u32 reserved_7;
- u64 rmac_ip_octets;
- u32 rmac_drop_ip;
- u32 rmac_hdr_err_ip;
- u32 reserved_8;
- u32 rmac_icmp;
- u64 rmac_tcp;
- u32 rmac_err_drp_udp;
- u32 rmac_udp;
- u64 rmac_xgmii_err_sym;
- u64 rmac_frms_q0;
- u64 rmac_frms_q1;
- u64 rmac_frms_q2;
- u64 rmac_frms_q3;
- u64 rmac_frms_q4;
- u64 rmac_frms_q5;
- u64 rmac_frms_q6;
- u64 rmac_frms_q7;
- u16 rmac_full_q3;
- u16 rmac_full_q2;
- u16 rmac_full_q1;
- u16 rmac_full_q0;
- u16 rmac_full_q7;
- u16 rmac_full_q6;
- u16 rmac_full_q5;
- u16 rmac_full_q4;
- u32 reserved_9;
- u32 rmac_pause_cnt;
- u64 rmac_xgmii_data_err_cnt;
- u64 rmac_xgmii_ctrl_err_cnt;
- u32 rmac_err_tcp;
- u32 rmac_accepted_ip;
-
-/* PCI/PCI-X Read transaction statistics. */
- u32 new_rd_req_cnt;
- u32 rd_req_cnt;
- u32 rd_rtry_cnt;
- u32 new_rd_req_rtry_cnt;
-
-/* PCI/PCI-X Write/Read transaction statistics. */
- u32 wr_req_cnt;
- u32 wr_rtry_rd_ack_cnt;
- u32 new_wr_req_rtry_cnt;
- u32 new_wr_req_cnt;
- u32 wr_disc_cnt;
- u32 wr_rtry_cnt;
-
-/* PCI/PCI-X Write / DMA Transaction statistics. */
- u32 txp_wr_cnt;
- u32 rd_rtry_wr_ack_cnt;
- u32 txd_wr_cnt;
- u32 txd_rd_cnt;
- u32 rxd_wr_cnt;
- u32 rxd_rd_cnt;
- u32 rxf_wr_cnt;
- u32 txf_rd_cnt;
-
-/* Enhanced Herc statistics */
- u32 tmac_data_octets_oflow;
- u32 tmac_frms_oflow;
- u32 tmac_bcst_frms_oflow;
- u32 tmac_mcst_frms_oflow;
- u32 tmac_ucst_frms_oflow;
- u32 tmac_ttl_octets_oflow;
- u32 tmac_any_err_frms_oflow;
- u32 tmac_nucst_frms_oflow;
- u64 tmac_vlan_frms;
- u32 tmac_drop_ip_oflow;
- u32 tmac_vld_ip_oflow;
- u32 tmac_rst_tcp_oflow;
- u32 tmac_icmp_oflow;
- u32 tpa_unknown_protocol;
- u32 tmac_udp_oflow;
- u32 reserved_10;
- u32 tpa_parse_failure;
- u32 rmac_data_octets_oflow;
- u32 rmac_vld_frms_oflow;
- u32 rmac_vld_bcst_frms_oflow;
- u32 rmac_vld_mcst_frms_oflow;
- u32 rmac_accepted_ucst_frms_oflow;
- u32 rmac_ttl_octets_oflow;
- u32 rmac_discarded_frms_oflow;
- u32 rmac_accepted_nucst_frms_oflow;
- u32 rmac_usized_frms_oflow;
- u32 rmac_drop_events_oflow;
- u32 rmac_frag_frms_oflow;
- u32 rmac_osized_frms_oflow;
- u32 rmac_ip_oflow;
- u32 rmac_jabber_frms_oflow;
- u32 rmac_icmp_oflow;
- u32 rmac_drop_ip_oflow;
- u32 rmac_err_drp_udp_oflow;
- u32 rmac_udp_oflow;
- u32 reserved_11;
- u32 rmac_pause_cnt_oflow;
- u64 rmac_ttl_1519_4095_frms;
- u64 rmac_ttl_4096_8191_frms;
- u64 rmac_ttl_8192_max_frms;
- u64 rmac_ttl_gt_max_frms;
- u64 rmac_osized_alt_frms;
- u64 rmac_jabber_alt_frms;
- u64 rmac_gt_max_alt_frms;
- u64 rmac_vlan_frms;
- u32 rmac_len_discard;
- u32 rmac_fcs_discard;
- u32 rmac_pf_discard;
- u32 rmac_da_discard;
- u32 rmac_wol_discard;
- u32 rmac_rts_discard;
- u32 rmac_ingm_full_discard;
- u32 rmac_red_discard;
- u32 reserved_12;
- u32 rmac_accepted_ip_oflow;
- u32 reserved_13;
- u32 link_fault_cnt;
-#endif
-} xge_hal_stats_hw_info_t;
-
-/**
- * struct xge_hal_stats_channel_into_t - HAL channel statistics.
- * @full_cnt: TBD
- * @usage_max: TBD
- * @reserve_free_swaps_cnt: Reserve/free swap counter. Internal usage.
- * @max_compl_per_intr_cnt: Maximum number of completions per interrupt.
- * @avg_compl_per_intr_cnt: Average number of completions per interrupt.
- * Note that a total number of completed descriptors
- * for the given channel can be calculated as
- * (@traffic_intr_cnt * @avg_compl_per_intr_cnt).
- * @total_compl_cnt: Total completion count.
- * @total_compl_cnt == (@traffic_intr_cnt * @avg_compl_per_intr_cnt).
- * @total_posts: Total number of descriptor postings on the channel.
- * Counts the number of xge_hal_ring_dtr_post()
- * or xge_hal_fifo_dtr_post() calls by ULD, for ring and fifo
- * channel, respectively.
- * @total_posts_many: Total number of posts on the channel that involved
- * more than one descriptor. Counts the number of
- * xge_hal_fifo_dtr_post_many() calls performed by ULD.
- * @total_buffers: Total number of buffers posted on the channel.
- * @copied_frags: TBD
- * @copied_buffers: TBD
- * @avg_buffers_per_post: Average number of buffers transferred in a single
- * post operation.
- * Calculated as @total_buffers/@total_posts.
- * @avg_buffer_size: Average buffer size transferred by a single post
- * operation on a fifo channel. The counter is not supported for a ring
- * channel. Calculated as a total number of transmitted octets divided
- * by @total_buffers.
- * @avg_post_size: Average amount of data transferred by a single post.
- * Calculated as a total number of transmitted octets divided by
- * @total_posts.
- * @ring_bump_cnt: Ring "bump" count. Number of times the hardware could
- * not post receive data (and had to continue keeping it on-board)
- * because of unavailable receive descriptor(s).
- * @total_posts_dtrs_many: Total number of posts on the channel that involving
- * more than one descriptor.
- * @total_posts_frags_many: Total number of fragments posted on the channel
- * during post requests of multiple descriptors.
- * @total_posts_dang_dtrs: Total number of posts on the channel involving
- * dangling descriptors.
- * @total_posts_dang_frags: Total number of dangling fragments posted on the channel
- * during post request containing multiple descriptors.
- *
- * HAL channel counters.
- * See also: xge_hal_stats_device_info_t{}.
- */
-typedef struct xge_hal_stats_channel_info_t {
- u32 full_cnt;
- u32 usage_max;
- u32 reserve_free_swaps_cnt;
- u32 avg_compl_per_intr_cnt;
- u32 total_compl_cnt;
- u32 total_posts;
- u32 total_posts_many;
- u32 total_buffers;
- u32 copied_frags;
- u32 copied_buffers;
- u32 avg_buffers_per_post;
- u32 avg_buffer_size;
- u32 avg_post_size;
- u32 ring_bump_cnt;
- u32 total_posts_dtrs_many;
- u32 total_posts_frags_many;
- u32 total_posts_dang_dtrs;
- u32 total_posts_dang_frags;
-} xge_hal_stats_channel_info_t;
-
-/**
- * struct xge_hal_xpak_counter_t - HAL xpak error counters
- * @excess_temp: excess transceiver_temperature count
- * @excess_bias_current: excess laser_bias_current count
- * @excess_laser_output: excess laser_output_power count
- * @tick_period: tick count for each cycle
- */
-typedef struct xge_hal_xpak_counter_t {
- u32 excess_temp;
- u32 excess_bias_current;
- u32 excess_laser_output;
- u32 tick_period;
-} xge_hal_xpak_counter_t;
-
-/**
- * struct xge_hal_stats_xpak_t - HAL xpak stats
- * @alarm_transceiver_temp_high: alarm_transceiver_temp_high count value
- * @alarm_transceiver_temp_low : alarm_transceiver_temp_low count value
- * @alarm_laser_bias_current_high: alarm_laser_bias_current_high count value
- * @alarm_laser_bias_current_low: alarm_laser_bias_current_low count value
- * @alarm_laser_output_power_high: alarm_laser_output_power_high count value
- * @alarm_laser_output_power_low: alarm_laser_output_power_low count value
- * @warn_transceiver_temp_high: warn_transceiver_temp_high count value
- * @warn_transceiver_temp_low: warn_transceiver_temp_low count value
- * @warn_laser_bias_current_high: warn_laser_bias_current_high count value
- * @warn_laser_bias_current_low: warn_laser_bias_current_low count value
- * @warn_laser_output_power_high: warn_laser_output_power_high count value
- * @warn_laser_output_power_low: warn_laser_output_power_low count value
- */
-typedef struct xge_hal_stats_xpak_t {
- u16 alarm_transceiver_temp_high;
- u16 alarm_transceiver_temp_low;
- u16 alarm_laser_bias_current_high;
- u16 alarm_laser_bias_current_low;
- u16 alarm_laser_output_power_high;
- u16 alarm_laser_output_power_low;
- u16 warn_transceiver_temp_high;
- u16 warn_transceiver_temp_low;
- u16 warn_laser_bias_current_high;
- u16 warn_laser_bias_current_low;
- u16 warn_laser_output_power_high;
- u16 warn_laser_output_power_low;
-} xge_hal_stats_xpak_t;
-
-
-
-/**
- * struct xge_hal_stats_sw_err_t - HAL device error statistics.
- * @sm_err_cnt: TBD
- * @single_ecc_err_cnt: TBD
- * @double_ecc_err_cnt: TBD
- * @ecc_err_cnt: ECC error count.
- * @parity_err_cnt: Parity error count.
- * @serr_cnt: Number of exceptions indicated to the host via PCI SERR#.
- * @rxd_t_code_err_cnt: Array of receive transfer codes. The position
- * (index) in this array reflects the transfer code type, for instance
- * 0x7 - for "invalid receive buffer size", or 0x8 - for ECC.
- * Value rxd_t_code_err_cnt[i] reflects the
- * number of times the corresponding transfer code was encountered.
- *
- * @txd_t_code_err_cnt: Array of transmit transfer codes. The position
- * (index) in this array reflects the transfer code type, for instance
- * 0xA - "loss of link".
- * Value txd_t_code_err_cnt[i] reflects the
- * number of times the corresponding transfer code was encountered.
- * @stats_xpak: TBD
- * @xpak_counter: TBD
- */
-typedef struct xge_hal_stats_sw_err_t {
- u32 sm_err_cnt;
- u32 single_ecc_err_cnt;
- u32 double_ecc_err_cnt;
- u32 ecc_err_cnt;
- u32 parity_err_cnt;
- u32 serr_cnt;
- u32 rxd_t_code_err_cnt[16];
- u32 txd_t_code_err_cnt[16];
- xge_hal_stats_xpak_t stats_xpak;
- xge_hal_xpak_counter_t xpak_counter;
-} xge_hal_stats_sw_err_t;
-
-/**
- * struct xge_hal_stats_device_info_t - HAL own per-device statistics.
- *
- * @rx_traffic_intr_cnt: TBD
- * @tx_traffic_intr_cnt: TBD
- * @txpic_intr_cnt: TBD
- * @txdma_intr_cnt: TBD
- * @txmac_intr_cnt: TBD
- * @txxgxs_intr_cnt: TBD
- * @rxpic_intr_cnt: TBD
- * @rxdma_intr_cnt: TBD
- * @rxmac_intr_cnt: TBD
- * @rxxgxs_intr_cnt: TBD
- * @mc_intr_cnt: TBD
- * @not_traffic_intr_cnt: Number of times the host was interrupted
- * without new completions.
- * "Non-traffic interrupt counter".
- * @not_xge_intr_cnt: TBD
- * @traffic_intr_cnt: Number of traffic interrupts for the device.
- * @total_intr_cnt: Total number of traffic interrupts for the device.
- * @total_intr_cnt == @traffic_intr_cnt +
- * @not_traffic_intr_cnt
- * @soft_reset_cnt: Number of times soft reset is done on this device.
- * @rxufca_hi_adjust_cnt: TODO
- * @rxufca_lo_adjust_cnt: TODO
- * @bimodal_hi_adjust_cnt: TODO
- * @bimodal_lo_adjust_cnt: TODO
- *
- * @tot_frms_lroised: TBD
- * @tot_lro_sessions: TBD
- * @lro_frm_len_exceed_cnt: TBD
- * @lro_sg_exceed_cnt: TBD
- * @lro_out_of_seq_pkt_cnt: TBD
- * @lro_dup_pkt_cnt: TBD
- *
- * HAL per-device statistics.
- * See also: xge_hal_stats_channel_info_t{}.
- */
-typedef struct xge_hal_stats_device_info_t {
- u32 rx_traffic_intr_cnt;
- u32 tx_traffic_intr_cnt;
- u32 txpic_intr_cnt;
- u32 txdma_intr_cnt;
- u32 pfc_err_cnt;
- u32 tda_err_cnt;
- u32 pcc_err_cnt;
- u32 tti_err_cnt;
- u32 lso_err_cnt;
- u32 tpa_err_cnt;
- u32 sm_err_cnt;
- u32 txmac_intr_cnt;
- u32 mac_tmac_err_cnt;
- u32 txxgxs_intr_cnt;
- u32 xgxs_txgxs_err_cnt;
- u32 rxpic_intr_cnt;
- u32 rxdma_intr_cnt;
- u32 rc_err_cnt;
- u32 rpa_err_cnt;
- u32 rda_err_cnt;
- u32 rti_err_cnt;
- u32 rxmac_intr_cnt;
- u32 mac_rmac_err_cnt;
- u32 rxxgxs_intr_cnt;
- u32 xgxs_rxgxs_err_cnt;
- u32 mc_intr_cnt;
- u32 not_traffic_intr_cnt;
- u32 not_xge_intr_cnt;
- u32 traffic_intr_cnt;
- u32 total_intr_cnt;
- u32 soft_reset_cnt;
- u32 rxufca_hi_adjust_cnt;
- u32 rxufca_lo_adjust_cnt;
- u32 bimodal_hi_adjust_cnt;
- u32 bimodal_lo_adjust_cnt;
-#ifdef XGE_HAL_CONFIG_LRO
- u32 tot_frms_lroised;
- u32 tot_lro_sessions;
- u32 lro_frm_len_exceed_cnt;
- u32 lro_sg_exceed_cnt;
- u32 lro_out_of_seq_pkt_cnt;
- u32 lro_dup_pkt_cnt;
-#endif
-} xge_hal_stats_device_info_t;
-
-/* ========================== XFRAME ER STATISTICS ======================== */
-#define XGE_HAL_MAC_LINKS 3
-#define XGE_HAL_MAC_AGGREGATORS 2
-#define XGE_HAL_VPATHS 17
-/**
- * struct xge_hal_stats_link_info_t - XGMAC statistics for a link
- *
- * @tx_frms: Count of transmitted MAC frames for mac the link.
- * @tx_ttl_eth_octets: Count of total octets of transmitted frames
- * for mac the link.
- * @tx_data_octets: Count of data and padding octets of transmitted
- * frames for mac the link.
- * @tx_mcst_frms: Count of multicast MAC frames for mac the link.
- * @tx_bcst_frms: Count of broadcast MAC frames for mac the link.
- * @tx_ucst_frms: Count of unicast MAC frames for mac the link.
- * @tx_tagged_frms: Count of transmitted frames containing a VLAN tag
- * for mac the link.
- * @tx_vld_ip: Count of transmitted IP datagrams for mac the link.
- * @tx_vld_ip_octets: Count of transmitted IP octets for mac the link.
- * @tx_icmp: Count of transmitted ICMP messages for mac the link.
- * @tx_tcp: Count of transmitted TCP segments for mac the link.
- * @tx_rst_tcp: Count of transmitted TCP segments containing the RST
- * flag mac the link.
- * @tx_udp: Count of transmitted UDP datagrams for mac the link.
- * @tx_unknown_protocol: Count of transmitted packets of unknown
- * protocol for mac the link.
- * @tx_parse_error: Count of transmitted packets with parsing errors
- * for mac the link.
- * @tx_pause_ctrl_frms: Count of MAC PAUSE control frames for mac
- * the link.
- * @tx_lacpdu_frms: Count of LACPDUs transmitted for mac the link.
- * @tx_marker_pdu_frms: Count of Marker PDUs transmitted for mac the
- * link.
- * @tx_marker_resp_pdu_frms: Count of Marker Response PDUs transmitted
- * for mac the link.
- * @tx_drop_ip: Count of dropped IP packets from the transmission path
- * for mac the link.
- * @tx_xgmii_char1_match: Count of the number of transmitted XGMII
- * characters that match first pattern, for mac the link.
- * @tx_xgmii_char2_match: Count of the number of transmitted XGMII
- * characters that match second pattern, for mac the link.
- * @tx_xgmii_column1_match: Count of the number of transmitted XGMII
- * columns that match first pattern, for mac the link.
- * @tx_xgmii_column2_match: Count of the number of transmitted XGMII
- * columns that match second pattern, for mac the link.
- * @tx_drop_frms: Count of frames dropped due to internal errors during
- * transmission for mac the link.
- * @tx_any_err_frms: Count of frames dropped due to any error during
- * transmission for mac the link.
- * @rx_ttl_frms: Count of all received MAC frames for mac the link.
- * @rx_vld_frms: Count of all successfully received MAC frames for mac
- * the link.
- * @rx_offld_frms: Count of all offloaded received MAC frames for mac
- * the link.
- * @rx_ttl_eth_octets: Count of total octets of received frames, not
- * including framing characters for mac the link.
- * @rx_data_octets: Count of data and padding octets of successfully
- * received frames for mac the link.
- * @rx_offld_octets: Count of total octets, not including framing
- * characters, of offloaded received frames for mac the link.
- * @rx_vld_mcst_frms: Count of successfully received multicast MAC
- * frames for mac the link.
- * @rx_vld_bcst_frms: Count of successfully received broadcast MAC
- * frames for mac the link.
- * @rx_accepted_ucst_frms: Count of successfully received unicast MAC
- * frames for mac the link.
- * @rx_accepted_nucst_frms: Count of successfully received non-unicast
- * MAC frames for mac the link.
- * @rx_tagged_frms: Count of received frames containing a VLAN tag for
- * mac the link.
- * @rx_long_frms: Count of received frames that are longer than
- * RX_MAX_PYLD_LEN + 18 bytes (+ 22 bytes if VLAN-tagged) for mac the link.
- * @rx_usized_frms: Count of received frames of length less than 64
- * octets, for mac the link.
- * @rx_osized_frms: Count of received frames of length more than 1518
- * octets for mac the link.
- * @rx_frag_frms: Count of received frames of length less than 64
- * octets that had bad FCS, for mac the link.
- * @rx_jabber_frms: Count of received frames of length more than 1518
- * octets that had bad FCS, for mac the link.
- * @rx_ttl_64_frms: Count of all received MAC frames with length of
- * exactly 64 octets, for mac the link.
- * @rx_ttl_65_127_frms: Count of all received MAC frames with length
- * of between 65 and 127 octets inclusive, for mac the link.
- * @rx_ttl_128_255_frms: Count of all received MAC frames with length
- * of between 128 and 255 octets inclusive, for mac the link.
- * @rx_ttl_256_511_frms: Count of all received MAC frames with length
- * of between 246 and 511 octets inclusive, for mac the link.
- * @rx_ttl_512_1023_frms: Count of all received MAC frames with length
- * of between 512 and 1023 octets inclusive, for mac the link.
- * @rx_ttl_1024_1518_frms: Count of all received MAC frames with length
- * of between 1024 and 1518 octets inclusive, for mac the link.
- * @rx_ttl_1519_4095_frms: Count of all received MAC frames with length
- * of between 1519 and 4095 octets inclusive, for mac the link.
- * @rx_ttl_40956_8191_frms: Count of all received MAC frames with length
- * of between 4096 and 8191 octets inclusive, for mac the link.
- * @rx_ttl_8192_max_frms: Count of all received MAC frames with length
- * of between 8192 and RX_MAX_PYLD_LEN+18 octets inclusive, for mac the link.
- * @rx_ttl_gt_max_frms: Count of all received MAC frames with length
- * exceeding RX_MAX_PYLD_LEN+18 octets inclusive, for mac the link.
- * @rx_ip: Count of received IP datagrams, for mac the link.
- * @rx_accepted_ip: Count of received and accepted IP datagrams,
- * for mac the link.
- * @rx_ip_octets: Count of number of octets in received IP datagrams,
- * for mac the link.
- * @rx_hdr_err_ip: Count of received IP datagrams that are discarded
- * due to IP header errors, for mac the link.
- * @rx_icmp: Count of received ICMP messages for mac the link.
- * @rx_tcp: Count of received TCP segments for mac the link.
- * @rx_udp: Count of received UDP datagrams for mac the link.
- * @rx_err_tcp: Count of received TCP segments containing errors for
- * mac the link.
- * @rx_pause_cnt: Count of number of pause quanta that the MAC has
- * been in the paused state, for mac the link.
- * @rx_pause_ctrl_frms: Count of received MAC PAUSE control frames for
- * mac the link.
- * @rx_unsup_ctrl_frms: Count of received MAC control frames that do
- * not contain the PAUSE opcode for mac the link.
- * @rx_fcs_err_frms: Count of received MAC frames that do not pass FCS
- * for mac the link.
- * @rx_in_rng_len_err_frms: Count of received frames with a length/type
- * field value between 46 and 1500 inclusive, that does not match the number
- * of data octets received, for mac the link.
- * @rx_out_rng_len_err_frms: Count of received frames with length/type
- * field between 1501 and 1535 decimal, inclusive. for mac the link.
- * @rx_drop_frms: Count of dropped frames from receive path for mac
- * the link.
- * @rx_discarded_frms: Count of discarded frames from receive path for
- * mac the link.
- * @rx_drop_ip: Count of droppen IP datagrams from receive path for
- * mac the link.
- * @rx_err_drp_udp: Count of droppen UDP datagrams from receive path
- * for mac the link.
- * @rx_lacpdu_frms: Count of valid LACPDUs received for mac the link.
- * @rx_marker_pdu_frms: Count of valid Marker PDUs received for mac
- * the link.
- * @rx_marker_resp_pdu_frms: Count of valid Marker Response PDUs
- * received for mac the link.
- * @rx_unknown_pdu_frms: Count of unknown PDUs received for mac the link.
- * @rx_illegal_pdu_frms: Count of illegal PDUs received for mac the link.
- * @rx_fcs_discard: Count of discarded PDUs received for mac the link.
- * @rx_len_discard: Count of received frames that were discarded
- * because of an invalid frame length, for mac the link.
- * @rx_len_discard: Count of received frames that were discarded
- * because of an invalid destination MAC address, for mac the link.
- * @rx_pf_discard: Count of received frames that were discarded for
- * mac the link.
- * @rx_trash_discard: Count of received frames that were steered to the
- * trash queue for mac the link.
- * @rx_rts_discard: Count of received frames that were discarded by RTS
- * logic for mac the link.
- * @rx_wol_discard: Count of received frames that were discarded by WOL
- * logic for mac the link.
- * @rx_red_discard: Count of received frames that were discarded by RED
- * logic for mac the link.
- * @rx_ingm_full_discard: Count of received frames that were discarded
- * because the internal ingress memory was full for mac the link.
- * @rx_xgmii_data_err_cnt: Count of unexpected control characters
- * during normal data transmission for mac the link.
- * @rx_xgmii_ctrl_err_cnt: Count of unexpected or misplaced control
- * characters occuring between times of normal data transmission for mac
- * the link.
- * @rx_xgmii_err_sym: Count of the number of symbol errors in the
- * received XGMII data for mac the link.
- * @rx_xgmii_char1_match: Count of the number of XGMII characters
- * that match first pattern defined in MAC_STATS_RX_XGMII_CHAR_LINK_N.
- * @rx_xgmii_char2_match: Count of the number of XGMII characters
- * that match second pattern defined in MAC_STATS_RX_XGMII_CHAR_LINK_N.
- * @rx_xgmii_column1_match: Count of the number of XGMII columns
- * that match a pattern defined in MAC_STATS_RX_XGMII_COLUMN1_LINK_N.
- * @rx_xgmii_column2_match: Count of the number of XGMII columns
- * that match a pattern defined in MAC_STATS_RX_XGMII_COLUMN1_LINK_N.
- * @rx_local_fault: Count of the number of local faults for mac the link.
- * @rx_remote_fault: Count of the number of remote faults for mac the
- * link.
- * @rx_queue_full: Count of the number of frame destined for a full
- * queue for mac the link.
- */
-typedef struct xge_hal_stats_link_info_t {
- u64 tx_frms;
- u64 tx_ttl_eth_octets;
- u64 tx_data_octets;
- u64 tx_mcst_frms;
- u64 tx_bcst_frms;
- u64 tx_ucst_frms;
- u64 tx_tagged_frms;
- u64 tx_vld_ip;
- u64 tx_vld_ip_octets;
- u64 tx_icmp;
- u64 tx_tcp;
- u64 tx_rst_tcp;
- u64 tx_udp;
- u64 tx_unknown_protocol;
- u64 tx_parse_error;
- u64 tx_pause_ctrl_frms;
- u64 tx_lacpdu_frms;
- u64 tx_marker_pdu_frms;
- u64 tx_marker_resp_pdu_frms;
- u64 tx_drop_ip;
- u64 tx_xgmii_char1_match;
- u64 tx_xgmii_char2_match;
- u64 tx_xgmii_column1_match;
- u64 tx_xgmii_column2_match;
- u64 tx_drop_frms;
- u64 tx_any_err_frms;
- u64 rx_ttl_frms;
- u64 rx_vld_frms;
- u64 rx_offld_frms;
- u64 rx_ttl_eth_octets;
- u64 rx_data_octets;
- u64 rx_offld_octets;
- u64 rx_vld_mcst_frms;
- u64 rx_vld_bcst_frms;
- u64 rx_accepted_ucst_frms;
- u64 rx_accepted_nucst_frms;
- u64 rx_tagged_frms;
- u64 rx_long_frms;
- u64 rx_usized_frms;
- u64 rx_osized_frms;
- u64 rx_frag_frms;
- u64 rx_jabber_frms;
- u64 rx_ttl_64_frms;
- u64 rx_ttl_65_127_frms;
- u64 rx_ttl_128_255_frms;
- u64 rx_ttl_256_511_frms;
- u64 rx_ttl_512_1023_frms;
- u64 rx_ttl_1024_1518_frms;
- u64 rx_ttl_1519_4095_frms;
- u64 rx_ttl_40956_8191_frms;
- u64 rx_ttl_8192_max_frms;
- u64 rx_ttl_gt_max_frms;
- u64 rx_ip;
- u64 rx_ip_octets;
- u64 rx_hdr_err_ip;
- u64 rx_icmp;
- u64 rx_tcp;
- u64 rx_udp;
- u64 rx_err_tcp;
- u64 rx_pause_cnt;
- u64 rx_pause_ctrl_frms;
- u64 rx_unsup_ctrl_frms;
- u64 rx_in_rng_len_err_frms;
- u64 rx_out_rng_len_err_frms;
- u64 rx_drop_frms;
- u64 rx_discarded_frms;
- u64 rx_drop_ip;
- u64 rx_err_drp_udp;
- u64 rx_lacpdu_frms;
- u64 rx_marker_pdu_frms;
- u64 rx_marker_resp_pdu_frms;
- u64 rx_unknown_pdu_frms;
- u64 rx_illegal_pdu_frms;
- u64 rx_fcs_discard;
- u64 rx_len_discard;
- u64 rx_pf_discard;
- u64 rx_trash_discard;
- u64 rx_rts_discard;
- u64 rx_wol_discard;
- u64 rx_red_discard;
- u64 rx_ingm_full_discard;
- u64 rx_xgmii_data_err_cnt;
- u64 rx_xgmii_ctrl_err_cnt;
- u64 rx_xgmii_err_sym;
- u64 rx_xgmii_char1_match;
- u64 rx_xgmii_char2_match;
- u64 rx_xgmii_column1_match;
- u64 rx_xgmii_column2_match;
- u64 rx_local_fault;
- u64 rx_remote_fault;
- u64 rx_queue_full;
-}xge_hal_stats_link_info_t;
-
-/**
- * struct xge_hal_stats_aggr_info_t - XGMAC statistics for an aggregator
- *
- * @tx_frms: Count of data frames transmitted for the aggregator.
- * @tx_mcst_frms: Count of multicast data frames transmitted for
- * the aggregator.
- * @tx_bcst_frms: Count of broadcast data frames transmitted for
- * the aggregator.
- * @tx_discarded_frms: Count of discarded data frames transmitted for
- * the aggregator.
- * @tx_errored_frms: Count of errored data frames transmitted for
- * the aggregator.
- * @rx_frms: Count of received frames for aggregators
- * @rx_data_octets: Count of data and padding octets of frames received
- * the aggregator.
- * @rx_mcst_frms: Count of multicast frames received the aggregator.
- * @rx_bcst_frms: Count of broadast frames received the aggregator.
- * @rx_discarded_frms: Count of discarded frames received the aggregator.
- * @rx_errored_frms: Count of errored frames received the aggregator.
- * @rx_unknown_protocol_frms: Count of unknown protocol frames received
- * the aggregator.
-*/
-typedef struct xge_hal_stats_aggr_info_t {
- u64 tx_frms;
- u64 tx_mcst_frms;
- u64 tx_bcst_frms;
- u64 tx_discarded_frms;
- u64 tx_errored_frms;
- u64 rx_frms;
- u64 rx_data_octets;
- u64 rx_mcst_frms;
- u64 rx_bcst_frms;
- u64 rx_discarded_frms;
- u64 rx_errored_frms;
- u64 rx_unknown_protocol_frms;
-}xge_hal_stats_aggr_info_t;
-
-/**
- * struct xge_hal_stats_vpath_info_t - XGMAC statistics for a vpath.
- *
- * @tx_frms: Count of transmitted MAC frames for the vpath.
- * @tx_ttl_eth_octets: Count of total octets of transmitted frames
- * for the vpath.
- * @tx_data_octets: Count of data and padding octets of transmitted
- * frames for the vpath.
- * @tx_mcst_frms: Count of multicast MAC frames for the vpath.
- * @tx_bcst_frms: Count of broadcast MAC frames for the vpath.
- * @tx_ucst_frms: Count of unicast MAC frames for the vpath.
- * @tx_tagged_frms: Count of transmitted frames containing a VLAN
- * tag for the vpath.
- * @tx_vld_ip: Count of transmitted IP datagrams for the vpath.
- * @tx_vld_ip_octets: Count of transmitted IP octets for the vpath.
- * @tx_icmp: Count of transmitted ICMP messages for the vpath.
- * @tx_tcp: Count of transmitted TCP segments for the vpath.
- * @tx_rst_tcp: Count of transmitted TCP segments containing the RST
- * flag the vpath.
- * @tx_udp: Count of transmitted UDP datagrams for the vpath.
- * @tx_unknown_protocol: Count of transmitted packets of unknown
- * protocol for the vpath.
- * @tx_parse_error: Count of transmitted packets with parsing errors
- * for the vpath.
- * @rx_ttl_frms: Count of all received MAC frames for the vpath.
- * @rx_vld_frms: Count of all successfully received MAC frames for
- * the vpath.
- * @rx_offld_frms: Count of all offloaded received MAC frames for
- * the vpath.
- * @rx_ttl_eth_octets: Count of total octets of received frames, not
- * including framing characters for the vpath.
- * @rx_data_octets: Count of data and padding octets of successfully
- * received frames for the vpath.
- * @rx_offld_octets: Count of total octets, not including framing
- * characters, of offloaded received frames for the vpath.
- * @rx_vld_mcst_frms: Count of successfully received multicast MAC
- * frames for the vpath.
- * @rx_vld_bcst_frms: Count of successfully received broadcast MAC
- * frames for the vpath.
- * @rx_accepted_ucst_frms: Count of successfully received unicast
- * MAC frames for the vpath.
- * @rx_accepted_nucst_frms: Count of successfully received
- * non-unicast MAC frames for the vpath.
- * @rx_tagged_frms: Count of received frames containing a VLAN tag
- * for the vpath.
- * @rx_long_frms: Count of received frames that are longer than
- * RX_MAX_PYLD_LEN + 18 bytes (+ 22 bytes if VLAN-tagged) for the vpath.
- * @rx_usized_frms: Count of received frames of length less than 64
- * octets, for the vpath.
- * @rx_usized_frms: Count of received frames of length more than
- * 1518 octets, for the vpath.
- * @rx_osized_frms: Count of received frames of length more than
- * 1518 octets for the vpath.
- * @rx_frag_frms: Count of received frames of length less than 64
- * octets that had bad FCS, for the vpath.
- * @rx_jabber_frms: Count of received frames of length more than
- * 1518 octets that had bad FCS, for the vpath.
- * @rx_ttl_64_frms: Count of all received MAC frames with length of
- * exactly 64 octets, for the vpath.
- * @rx_ttl_65_127_frms: Count of all received MAC frames with length
- * of between 65 and 127 octets inclusive, for the vpath.
- * @rx_ttl_128_255_frms: Count of all received MAC frames with
- * length of between 128 and 255 octets inclusive, for the vpath.
- * @rx_ttl_256_511_frms: Count of all received MAC frames with
- * length of between 246 and 511 octets inclusive, for the vpath.
- * @rx_ttl_512_1023_frms: Count of all received MAC frames with
- * length of between 512 and 1023 octets inclusive, for the vpath.
- * @rx_ttl_1024_1518_frms: Count of all received MAC frames with
- * length of between 1024 and 1518 octets inclusive, for the vpath.
- * @rx_ttl_1519_4095_frms: Count of all received MAC frames with
- * length of between 1519 and 4095 octets inclusive, for the vpath.
- * @rx_ttl_40956_8191_frms: Count of all received MAC frames with
- * of between 4096 and 8191 octets inclusive, for the vpath.
- * @rx_ttl_8192_max_frms: Count of all received MAC frames with
- * length of between 8192 and RX_MAX_PYLD_LEN+18 octets inclusive, for the
- * vpath.
- * @rx_ttl_gt_max_frms: Count of all received MAC frames with length
- * exceeding RX_MAX_PYLD_LEN+18 octets inclusive, for the vpath.
- * @rx_ip: Count of received IP datagrams, for the vpath.
- * @rx_accepted_ip: Count of received and accepted IP datagrams,
- * for the vpath.
- * @rx_ip_octets: Count of number of octets in received IP datagrams
- * for the vpath.
- * @rx_hdr_err_ip: Count of received IP datagrams that are discarded
- * due to IP header errors, for the vpath.
- * @rx_icmp: Count of received ICMP messages for the vpath.
- * @rx_tcp: Count of received TCP segments for the vpath.
- * @rx_udp: Count of received UDP datagrams for the vpath.
- * @rx_err_tcp: Count of received TCP segments containing errors for
- * the vpath.
- * @rx_mpa_ok_frms: Count of received frames that pass the MPA
- * checks for vptah.
- * @rx_mpa_crc_fail_frms: Count of received frames that fail the MPA
- * CRC check for the vpath.
- * @rx_mpa_mrk_fail_frms: Count of received frames that fail the
- * MPA marker check for the vpath.
- * @rx_mpa_len_fail_frms: Count of received frames that fail the MPA
- * length check for the vpath.
- * @rx_wol_frms: Count of received "magic packet" frames for
- * the vpath.
- */
-typedef struct xge_hal_stats_vpath_info_t {
- u64 tx_frms;
- u64 tx_ttl_eth_octets;
- u64 tx_data_octets;
- u64 tx_mcst_frms;
- u64 tx_bcst_frms;
- u64 tx_ucst_frms;
- u64 tx_tagged_frms;
- u64 tx_vld_ip;
- u64 tx_vld_ip_octets;
- u64 tx_icmp;
- u64 tx_tcp;
- u64 tx_rst_tcp;
- u64 tx_udp;
- u64 tx_unknown_protocol;
- u64 tx_parse_error;
- u64 rx_ttl_frms;
- u64 rx_vld_frms;
- u64 rx_offld_frms;
- u64 rx_ttl_eth_octets;
- u64 rx_data_octets;
- u64 rx_offld_octets;
- u64 rx_vld_mcst_frms;
- u64 rx_vld_bcst_frms;
- u64 rx_accepted_ucst_frms;
- u64 rx_accepted_nucst_frms;
- u64 rx_tagged_frms;
- u64 rx_long_frms;
- u64 rx_usized_frms;
- u64 rx_osized_frms;
- u64 rx_frag_frms;
- u64 rx_jabber_frms;
- u64 rx_ttl_64_frms;
- u64 rx_ttl_65_127_frms;
- u64 rx_ttl_128_255_frms;
- u64 rx_ttl_256_511_frms;
- u64 rx_ttl_512_1023_frms;
- u64 rx_ttl_1024_1518_frms;
- u64 rx_ttl_1519_4095_frms;
- u64 rx_ttl_40956_8191_frms;
- u64 rx_ttl_8192_max_frms;
- u64 rx_ttl_gt_max_frms;
- u64 rx_ip;
- u64 rx_accepted_ip;
- u64 rx_ip_octets;
- u64 rx_hdr_err_ip;
- u64 rx_icmp;
- u64 rx_tcp;
- u64 rx_udp;
- u64 rx_err_tcp;
- u64 rx_mpa_ok_frms;
- u64 rx_mpa_crc_fail_frms;
- u64 rx_mpa_mrk_fail_frms;
- u64 rx_mpa_len_fail_frms;
- u64 rx_wol_frms;
-}xge_hal_stats_vpath_info_t;
-
-/**
- * struct xge_hal_stats_pcim_info_t - Contains PCIM statistics
- *
- * @link_info: PCIM links info for link 0, 1, and 2.
- * @aggr_info: PCIM aggregators info for aggregator 0 and 1.
- * See also: xge_hal_stats_link_info_t{}, xge_hal_stats_aggr_info_t{}.
- */
-typedef struct xge_hal_stats_pcim_info_t {
- xge_hal_stats_link_info_t link_info[XGE_HAL_MAC_LINKS];
- xge_hal_stats_aggr_info_t aggr_info[XGE_HAL_MAC_AGGREGATORS];
-}xge_hal_stats_pcim_info_t;
-
-/**
- * struct xge_hal_stats_t - Contains HAL per-device statistics,
- * including hw.
- * @devh: HAL device handle.
- * @dma_addr: DMA addres of the %hw_info. Given to device to fill-in the stats.
- * @hw_info_dmah: DMA handle used to map hw statistics onto the device memory
- * space.
- * @hw_info_dma_acch: One more DMA handle used subsequently to free the
- * DMA object. Note that this and the previous handle have
- * physical meaning for Solaris; on Windows and Linux the
- * corresponding value will be simply pointer to PCI device.
- *
- * @hw_info: Xframe statistics maintained by the hardware.
- * @hw_info_saved: TBD
- * @hw_info_latest: TBD
- * @pcim_info: Xframe PCIM statistics maintained by the hardware.
- * @pcim_info_saved: TBD
- * @pcim_info_latest: TBD
- * @sw_dev_info_stats: HAL's "soft" device informational statistics, e.g. number
- * of completions per interrupt.
- * @sw_dev_err_stats: HAL's "soft" device error statistics.
- *
- * @is_initialized: True, if all the subordinate structures are allocated and
- * initialized.
- * @is_enabled: True, if device stats collection is enabled.
- *
- * Structure-container of HAL per-device statistics. Note that per-channel
- * statistics are kept in separate structures under HAL's fifo and ring
- * channels.
- * See also: xge_hal_stats_hw_info_t{}, xge_hal_stats_sw_err_t{},
- * xge_hal_stats_device_info_t{}.
- * See also: xge_hal_stats_channel_info_t{}.
- */
-typedef struct xge_hal_stats_t {
- /* handles */
- xge_hal_device_h devh;
- dma_addr_t dma_addr;
- pci_dma_h hw_info_dmah;
- pci_dma_acc_h hw_info_dma_acch;
-
- /* HAL device hardware statistics */
- xge_hal_stats_hw_info_t *hw_info;
- xge_hal_stats_hw_info_t hw_info_saved;
- xge_hal_stats_hw_info_t hw_info_latest;
-
- /* HAL device hardware statistics for XFRAME ER */
- xge_hal_stats_pcim_info_t *pcim_info;
- xge_hal_stats_pcim_info_t *pcim_info_saved;
- xge_hal_stats_pcim_info_t *pcim_info_latest;
-
- /* HAL device "soft" stats */
- xge_hal_stats_sw_err_t sw_dev_err_stats;
- xge_hal_stats_device_info_t sw_dev_info_stats;
-
- /* flags */
- int is_initialized;
- int is_enabled;
-} xge_hal_stats_t;
-
-/* ========================== STATS PRIVATE API ========================= */
-
-xge_hal_status_e __hal_stats_initialize(xge_hal_stats_t *stats,
- xge_hal_device_h devh);
-
-void __hal_stats_terminate(xge_hal_stats_t *stats);
-
-void __hal_stats_enable(xge_hal_stats_t *stats);
-
-void __hal_stats_disable(xge_hal_stats_t *stats);
-
-void __hal_stats_soft_reset(xge_hal_device_h devh, int reset_all);
-
-/* ========================== STATS PUBLIC API ========================= */
-
-xge_hal_status_e xge_hal_stats_hw(xge_hal_device_h devh,
- xge_hal_stats_hw_info_t **hw_info);
-
-xge_hal_status_e xge_hal_stats_pcim(xge_hal_device_h devh,
- xge_hal_stats_pcim_info_t **pcim_info);
-
-xge_hal_status_e xge_hal_stats_device(xge_hal_device_h devh,
- xge_hal_stats_device_info_t **device_info);
-
-xge_hal_status_e xge_hal_stats_channel(xge_hal_channel_h channelh,
- xge_hal_stats_channel_info_t **channel_info);
-
-xge_hal_status_e xge_hal_stats_reset(xge_hal_device_h devh);
-
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_STATS_H */
diff --git a/sys/dev/nxge/include/xgehal-types.h b/sys/dev/nxge/include/xgehal-types.h
deleted file mode 100644
index a73bfa1633d2..000000000000
--- a/sys/dev/nxge/include/xgehal-types.h
+++ /dev/null
@@ -1,609 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_TYPES_H
-#define XGE_HAL_TYPES_H
-
-#include <dev/nxge/include/xge-os-pal.h>
-
-__EXTERN_BEGIN_DECLS
-
-/*
- * BIT(loc) - set bit at offset
- */
-#define BIT(loc) (0x8000000000000000ULL >> (loc))
-
-/*
- * vBIT(val, loc, sz) - set bits at offset
- */
-#define vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz)))
-#define vBIT32(val, loc, sz) (((u32)(val)) << (32-(loc)-(sz)))
-
-/*
- * bVALx(bits, loc) - Get the value of x bits at location
- */
-#define bVAL1(bits, loc) ((((u64)bits) >> (64-(loc+1))) & 0x1)
-#define bVAL2(bits, loc) ((((u64)bits) >> (64-(loc+2))) & 0x3)
-#define bVAL3(bits, loc) ((((u64)bits) >> (64-(loc+3))) & 0x7)
-#define bVAL4(bits, loc) ((((u64)bits) >> (64-(loc+4))) & 0xF)
-#define bVAL5(bits, loc) ((((u64)bits) >> (64-(loc+5))) & 0x1F)
-#define bVAL6(bits, loc) ((((u64)bits) >> (64-(loc+6))) & 0x3F)
-#define bVAL7(bits, loc) ((((u64)bits) >> (64-(loc+7))) & 0x7F)
-#define bVAL8(bits, loc) ((((u64)bits) >> (64-(loc+8))) & 0xFF)
-#define bVAL12(bits, loc) ((((u64)bits) >> (64-(loc+12))) & 0xFFF)
-#define bVAL14(bits, loc) ((((u64)bits) >> (64-(loc+14))) & 0x3FFF)
-#define bVAL16(bits, loc) ((((u64)bits) >> (64-(loc+16))) & 0xFFFF)
-#define bVAL20(bits, loc) ((((u64)bits) >> (64-(loc+20))) & 0xFFFFF)
-#define bVAL22(bits, loc) ((((u64)bits) >> (64-(loc+22))) & 0x3FFFFF)
-#define bVAL24(bits, loc) ((((u64)bits) >> (64-(loc+24))) & 0xFFFFFF)
-#define bVAL28(bits, loc) ((((u64)bits) >> (64-(loc+28))) & 0xFFFFFFF)
-#define bVAL32(bits, loc) ((((u64)bits) >> (64-(loc+32))) & 0xFFFFFFFF)
-#define bVAL36(bits, loc) ((((u64)bits) >> (64-(loc+36))) & 0xFFFFFFFFF)
-#define bVAL40(bits, loc) ((((u64)bits) >> (64-(loc+40))) & 0xFFFFFFFFFF)
-#define bVAL44(bits, loc) ((((u64)bits) >> (64-(loc+44))) & 0xFFFFFFFFFFF)
-#define bVAL48(bits, loc) ((((u64)bits) >> (64-(loc+48))) & 0xFFFFFFFFFFFF)
-#define bVAL52(bits, loc) ((((u64)bits) >> (64-(loc+52))) & 0xFFFFFFFFFFFFF)
-#define bVAL56(bits, loc) ((((u64)bits) >> (64-(loc+56))) & 0xFFFFFFFFFFFFFF)
-#define bVAL60(bits, loc) ((((u64)bits) >> (64-(loc+60))) & 0xFFFFFFFFFFFFFFF)
-
-#define XGE_HAL_BASE_INF 100
-#define XGE_HAL_BASE_ERR 200
-#define XGE_HAL_BASE_BADCFG 300
-
-#define XGE_HAL_ALL_FOXES 0xFFFFFFFFFFFFFFFFULL
-
-/**
- * enum xge_hal_status_e - HAL return codes.
- * @XGE_HAL_OK: Success.
- * @XGE_HAL_FAIL: Failure.
- * @XGE_HAL_COMPLETIONS_REMAIN: There are more completions on a channel.
- * (specific to polling mode completion processing).
- * @XGE_HAL_INF_NO_MORE_COMPLETED_DESCRIPTORS: No more completed
- * descriptors. See xge_hal_fifo_dtr_next_completed().
- * @XGE_HAL_INF_OUT_OF_DESCRIPTORS: Out of descriptors. Channel
- * descriptors
- * are reserved (via xge_hal_fifo_dtr_reserve(),
- * xge_hal_fifo_dtr_reserve())
- * and not yet freed (via xge_hal_fifo_dtr_free(),
- * xge_hal_ring_dtr_free()).
- * @XGE_HAL_INF_CHANNEL_IS_NOT_READY: Channel is not ready for
- * operation.
- * @XGE_HAL_INF_MEM_STROBE_CMD_EXECUTING: Indicates that host needs to
- * poll until PIO is executed.
- * @XGE_HAL_INF_STATS_IS_NOT_READY: Cannot retrieve statistics because
- * HAL and/or device is not yet initialized.
- * @XGE_HAL_INF_NO_MORE_FREED_DESCRIPTORS: No descriptors left to
- * reserve. Internal use only.
- * @XGE_HAL_INF_IRQ_POLLING_CONTINUE: Returned by the ULD channel
- * callback when instructed to exit descriptor processing loop
- * prematurely. Typical usage: polling mode of processing completed
- * descriptors.
- * Upon getting LRO_ISED, ll driver shall
- * 1) initialise lro struct with mbuf if sg_num == 1.
- * 2) else it will update m_data_ptr_of_mbuf to tcp pointer and
- * append the new mbuf to the tail of mbuf chain in lro struct.
- *
- * @XGE_HAL_INF_LRO_BEGIN: Returned by ULD LRO module, when new LRO is
- * being initiated.
- * @XGE_HAL_INF_LRO_CONT: Returned by ULD LRO module, when new frame
- * is appended at the end of existing LRO.
- * @XGE_HAL_INF_LRO_UNCAPABLE: Returned by ULD LRO module, when new
- * frame is not LRO capable.
- * @XGE_HAL_INF_LRO_END_1: Returned by ULD LRO module, when new frame
- * triggers LRO flush.
- * @XGE_HAL_INF_LRO_END_2: Returned by ULD LRO module, when new
- * frame triggers LRO flush. Lro frame should be flushed first then
- * new frame should be flushed next.
- * @XGE_HAL_INF_LRO_END_3: Returned by ULD LRO module, when new
- * frame triggers close of current LRO session and opening of new LRO session
- * with the frame.
- * @XGE_HAL_INF_LRO_SESSIONS_XCDED: Returned by ULD LRO module, when no
- * more LRO sessions can be added.
- * @XGE_HAL_INF_NOT_ENOUGH_HW_CQES: TBD
- * @XGE_HAL_ERR_DRIVER_NOT_INITIALIZED: HAL is not initialized.
- * @XGE_HAL_ERR_OUT_OF_MEMORY: Out of memory (example, when and
- * allocating descriptors).
- * @XGE_HAL_ERR_CHANNEL_NOT_FOUND: xge_hal_channel_open will return this
- * error if corresponding channel is not configured.
- * @XGE_HAL_ERR_WRONG_IRQ: Returned by HAL's ISR when the latter is
- * invoked not because of the Xframe-generated interrupt.
- * @XGE_HAL_ERR_OUT_OF_MAC_ADDRESSES: Returned when user tries to
- * configure more than XGE_HAL_MAX_MAC_ADDRESSES mac addresses.
- * @XGE_HAL_ERR_BAD_DEVICE_ID: Unknown device PCI ID.
- * @XGE_HAL_ERR_OUT_ALIGNED_FRAGS: Too many unaligned fragments
- * in a scatter-gather list.
- * @XGE_HAL_ERR_DEVICE_NOT_INITIALIZED: Device is not initialized.
- * Typically means wrong sequence of API calls.
- * @XGE_HAL_ERR_SWAPPER_CTRL: Error during device initialization: failed
- * to set Xframe byte swapper in accordnace with the host
- * endian-ness.
- * @XGE_HAL_ERR_DEVICE_IS_NOT_QUIESCENT: Failed to restore the device to
- * a "quiescent" state.
- * @XGE_HAL_ERR_INVALID_MTU_SIZE: Returned when MTU size specified by
- * caller is not in the (64, 9600) range.
- * @XGE_HAL_ERR_OUT_OF_MAPPING: Failed to map DMA-able memory.
- * @XGE_HAL_ERR_BAD_SUBSYSTEM_ID: Bad PCI subsystem ID. (Currently we
- * check for zero/non-zero only.)
- * @XGE_HAL_ERR_INVALID_BAR_ID: Invalid BAR ID. Xframe supports two Base
- * Address Register Spaces: BAR0 (id=0) and BAR1 (id=1).
- * @XGE_HAL_ERR_INVALID_OFFSET: Invalid offset. Example, attempt to read
- * register value (with offset) outside of the BAR0 space.
- * @XGE_HAL_ERR_INVALID_DEVICE: Invalid device. The HAL device handle
- * (passed by ULD) is invalid.
- * @XGE_HAL_ERR_OUT_OF_SPACE: Out-of-provided-buffer-space. Returned by
- * management "get" routines when the retrieved information does
- * not fit into the provided buffer.
- * @XGE_HAL_ERR_INVALID_VALUE_BIT_SIZE: Invalid bit size.
- * @XGE_HAL_ERR_VERSION_CONFLICT: Upper-layer driver and HAL (versions)
- * are not compatible.
- * @XGE_HAL_ERR_INVALID_MAC_ADDRESS: Invalid MAC address.
- * @XGE_HAL_ERR_SPDM_NOT_ENABLED: SPDM support is not enabled.
- * @XGE_HAL_ERR_SPDM_TABLE_FULL: SPDM table is full.
- * @XGE_HAL_ERR_SPDM_INVALID_ENTRY: Invalid SPDM entry.
- * @XGE_HAL_ERR_SPDM_ENTRY_NOT_FOUND: Unable to locate the entry in the
- * SPDM table.
- * @XGE_HAL_ERR_SPDM_TABLE_DATA_INCONSISTENT: Local SPDM table is not in
- * synch ith the actual one.
- * @XGE_HAL_ERR_INVALID_PCI_INFO: Invalid or unrecognized PCI frequency,
- * and or width, and or mode (Xframe-II only, see UG on PCI_INFO register).
- * @XGE_HAL_ERR_CRITICAL: Critical error. Returned by HAL APIs
- * (including xge_hal_device_handle_tcode()) on: ECC, parity, SERR.
- * Also returned when PIO read does not go through ("all-foxes")
- * because of "slot-freeze".
- * @XGE_HAL_ERR_RESET_FAILED: Failed to soft-reset the device.
- * Returned by xge_hal_device_reset(). One circumstance when it could
- * happen: slot freeze by the system (see @XGE_HAL_ERR_CRITICAL).
- * @XGE_HAL_ERR_TOO_MANY: This error is returned if there were laready
- * maximum number of sessions or queues allocated
- * @XGE_HAL_ERR_PKT_DROP: TBD
- * @XGE_HAL_BADCFG_TX_URANGE_A: Invalid Tx link utilization range A. See
- * the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_UFC_A: Invalid frame count for Tx link utilization
- * range A. See the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_URANGE_B: Invalid Tx link utilization range B. See
- * the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_UFC_B: Invalid frame count for Tx link utilization
- * range B. See the strucuture xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_URANGE_C: Invalid Tx link utilization range C. See
- * the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_UFC_C: Invalid frame count for Tx link utilization
- * range C. See the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_UFC_D: Invalid frame count for Tx link utilization
- * range D. See the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_TIMER_VAL: Invalid Tx timer value. See the
- * structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_TX_TIMER_CI_EN: Invalid Tx timer continuous interrupt
- * enable. See the structure xge_hal_tti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_URANGE_A: Invalid Rx link utilization range A. See
- * the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_UFC_A: Invalid frame count for Rx link utilization
- * range A. See the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_URANGE_B: Invalid Rx link utilization range B. See
- * the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_UFC_B: Invalid frame count for Rx link utilization
- * range B. See the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_URANGE_C: Invalid Rx link utilization range C. See
- * the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_UFC_C: Invalid frame count for Rx link utilization
- * range C. See the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_UFC_D: Invalid frame count for Rx link utilization
- * range D. See the structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RX_TIMER_VAL: Invalid Rx timer value. See the
- * structure xge_hal_rti_config_t{} for valid values.
- * @XGE_HAL_BADCFG_FIFO_QUEUE_INITIAL_LENGTH: Invalid initial fifo queue
- * length. See the structure xge_hal_fifo_queue_t for valid values.
- * @XGE_HAL_BADCFG_FIFO_QUEUE_MAX_LENGTH: Invalid fifo queue max length.
- * See the structure xge_hal_fifo_queue_t for valid values.
- * @XGE_HAL_BADCFG_FIFO_QUEUE_INTR: Invalid fifo queue interrupt mode.
- * See the structure xge_hal_fifo_queue_t for valid values.
- * @XGE_HAL_BADCFG_RING_QUEUE_INITIAL_BLOCKS: Invalid Initial number of
- * RxD blocks for the ring. See the structure xge_hal_ring_queue_t for
- * valid values.
- * @XGE_HAL_BADCFG_RING_QUEUE_MAX_BLOCKS: Invalid maximum number of RxD
- * blocks for the ring. See the structure xge_hal_ring_queue_t for
- * valid values.
- * @XGE_HAL_BADCFG_RING_QUEUE_BUFFER_MODE: Invalid ring buffer mode. See
- * the structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_RING_QUEUE_SIZE: Invalid ring queue size. See the
- * structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_BACKOFF_INTERVAL_US: Invalid backoff timer interval
- * for the ring. See the structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_MAX_FRM_LEN: Invalid ring max frame length. See the
- * structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_RING_PRIORITY: Invalid ring priority. See the
- * structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_TMAC_UTIL_PERIOD: Invalid tmac util period. See the
- * structure xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RMAC_UTIL_PERIOD: Invalid rmac util period. See the
- * structure xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RMAC_BCAST_EN: Invalid rmac brodcast enable. See the
- * structure xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RMAC_HIGH_PTIME: Invalid rmac pause time. See the
- * structure xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q0Q3: Invalid threshold for pause
- * frame generation for queues 0 through 3. See the structure
- * xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q4Q7:Invalid threshold for pause
- * frame generation for queues 4 through 7. See the structure
- * xge_hal_mac_config_t{} for valid values.
- * @XGE_HAL_BADCFG_FIFO_FRAGS: Invalid fifo max fragments length. See
- * the structure xge_hal_fifo_config_t{} for valid values.
- * @XGE_HAL_BADCFG_FIFO_RESERVE_THRESHOLD: Invalid fifo reserve
- * threshold. See the structure xge_hal_fifo_config_t{} for valid values.
- * @XGE_HAL_BADCFG_FIFO_MEMBLOCK_SIZE: Invalid fifo descriptors memblock
- * size. See the structure xge_hal_fifo_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RING_MEMBLOCK_SIZE: Invalid ring descriptors memblock
- * size. See the structure xge_hal_ring_config_t{} for valid values.
- * @XGE_HAL_BADCFG_MAX_MTU: Invalid max mtu for the device. See the
- * structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_ISR_POLLING_CNT: Invalid isr polling count. See the
- * structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_LATENCY_TIMER: Invalid Latency timer. See the
- * structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_MAX_SPLITS_TRANS: Invalid maximum number of pci-x
- * split transactions. See the structure xge_hal_device_config_t{} for valid
- * values.
- * @XGE_HAL_BADCFG_MMRB_COUNT: Invalid mmrb count. See the structure
- * xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_SHARED_SPLITS: Invalid number of outstanding split
- * transactions that is shared by Tx and Rx requests. See the structure
- * xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_STATS_REFRESH_TIME: Invalid time interval for
- * automatic statistics transfer to the host. See the structure
- * xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_PCI_FREQ_MHERZ: Invalid pci clock frequency. See the
- * structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_PCI_MODE: Invalid pci mode. See the structure
- * xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_INTR_MODE: Invalid interrupt mode. See the structure
- * xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_SCHED_TIMER_US: Invalid scheduled timer interval to
- * generate interrupt. See the structure xge_hal_device_config_t{}
- * for valid values.
- * @XGE_HAL_BADCFG_SCHED_TIMER_ON_SHOT: Invalid scheduled timer one
- * shot. See the structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_BADCFG_QUEUE_SIZE_INITIAL: Invalid driver queue initial
- * size. See the structure xge_hal_driver_config_t{} for valid values.
- * @XGE_HAL_BADCFG_QUEUE_SIZE_MAX: Invalid driver queue max size. See
- * the structure xge_hal_driver_config_t{} for valid values.
- * @XGE_HAL_BADCFG_RING_RTH_EN: Invalid value of RTH-enable. See
- * the structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_RING_INDICATE_MAX_PKTS: Invalid value configured for
- * indicate_max_pkts variable.
- * @XGE_HAL_BADCFG_TX_TIMER_AC_EN: Invalid value for Tx timer
- * auto-cancel. See xge_hal_tti_config_t{}.
- * @XGE_HAL_BADCFG_RX_TIMER_AC_EN: Invalid value for Rx timer
- * auto-cancel. See xge_hal_rti_config_t{}.
- * @XGE_HAL_BADCFG_RXUFCA_INTR_THRES: TODO
- * @XGE_HAL_BADCFG_RXUFCA_LO_LIM: TODO
- * @XGE_HAL_BADCFG_RXUFCA_HI_LIM: TODO
- * @XGE_HAL_BADCFG_RXUFCA_LBOLT_PERIOD: TODO
- * @XGE_HAL_BADCFG_TRACEBUF_SIZE: Bad configuration: the size of the circular
- * (in memory) trace buffer either too large or too small. See the
- * the corresponding header file or README for the acceptable range.
- * @XGE_HAL_BADCFG_LINK_VALID_CNT: Bad configuration: the link-valid
- * counter cannot have the specified value. Note that the link-valid
- * counting is done only at device-open time, to determine with the
- * specified certainty that the link is up. See the
- * the corresponding header file or README for the acceptable range.
- * See also @XGE_HAL_BADCFG_LINK_RETRY_CNT.
- * @XGE_HAL_BADCFG_LINK_RETRY_CNT: Bad configuration: the specified
- * link-up retry count is out of the valid range. Note that the link-up
- * retry counting is done only at device-open time.
- * See also xge_hal_device_config_t{}.
- * @XGE_HAL_BADCFG_LINK_STABILITY_PERIOD: Invalid link stability period.
- * @XGE_HAL_BADCFG_DEVICE_POLL_MILLIS: Invalid device poll interval.
- * @XGE_HAL_BADCFG_RMAC_PAUSE_GEN_EN: TBD
- * @XGE_HAL_BADCFG_RMAC_PAUSE_RCV_EN: TBD
- * @XGE_HAL_BADCFG_MEDIA: TBD
- * @XGE_HAL_BADCFG_NO_ISR_EVENTS: TBD
- * See the structure xge_hal_device_config_t{} for valid values.
- * @XGE_HAL_EOF_TRACE_BUF: End of the circular (in memory) trace buffer.
- * Returned by xge_hal_mgmt_trace_read(), when user tries to read the trace
- * past the buffer limits. Used to enable user to load the trace in two
- * or more reads.
- * @XGE_HAL_BADCFG_RING_RTS_MAC_EN: Invalid value of RTS_MAC_EN enable. See
- * the structure xge_hal_ring_queue_t for valid values.
- * @XGE_HAL_BADCFG_LRO_SG_SIZE : Invalid value of LRO scatter gatter size.
- * See the structure xge_hal_device_config_t for valid values.
- * @XGE_HAL_BADCFG_LRO_FRM_LEN : Invalid value of LRO frame length.
- * See the structure xge_hal_device_config_t for valid values.
- * @XGE_HAL_BADCFG_WQE_NUM_ODS: TBD
- * @XGE_HAL_BADCFG_BIMODAL_INTR: Invalid value to configure bimodal interrupts
- * Enumerates status and error codes returned by HAL public
- * API functions.
- * @XGE_HAL_BADCFG_BIMODAL_TIMER_LO_US: TBD
- * @XGE_HAL_BADCFG_BIMODAL_TIMER_HI_US: TBD
- * @XGE_HAL_BADCFG_BIMODAL_XENA_NOT_ALLOWED: TBD
- * @XGE_HAL_BADCFG_RTS_QOS_EN: TBD
- * @XGE_HAL_BADCFG_FIFO_QUEUE_INTR_VECTOR: TBD
- * @XGE_HAL_BADCFG_RING_QUEUE_INTR_VECTOR: TBD
- * @XGE_HAL_BADCFG_RTS_PORT_EN: TBD
- * @XGE_HAL_BADCFG_RING_RTS_PORT_EN: TBD
- *
- */
-typedef enum xge_hal_status_e {
- XGE_HAL_OK = 0,
- XGE_HAL_FAIL = 1,
- XGE_HAL_COMPLETIONS_REMAIN = 2,
-
- XGE_HAL_INF_NO_MORE_COMPLETED_DESCRIPTORS = XGE_HAL_BASE_INF + 1,
- XGE_HAL_INF_OUT_OF_DESCRIPTORS = XGE_HAL_BASE_INF + 2,
- XGE_HAL_INF_CHANNEL_IS_NOT_READY = XGE_HAL_BASE_INF + 3,
- XGE_HAL_INF_MEM_STROBE_CMD_EXECUTING = XGE_HAL_BASE_INF + 4,
- XGE_HAL_INF_STATS_IS_NOT_READY = XGE_HAL_BASE_INF + 5,
- XGE_HAL_INF_NO_MORE_FREED_DESCRIPTORS = XGE_HAL_BASE_INF + 6,
- XGE_HAL_INF_IRQ_POLLING_CONTINUE = XGE_HAL_BASE_INF + 7,
- XGE_HAL_INF_LRO_BEGIN = XGE_HAL_BASE_INF + 8,
- XGE_HAL_INF_LRO_CONT = XGE_HAL_BASE_INF + 9,
- XGE_HAL_INF_LRO_UNCAPABLE = XGE_HAL_BASE_INF + 10,
- XGE_HAL_INF_LRO_END_1 = XGE_HAL_BASE_INF + 11,
- XGE_HAL_INF_LRO_END_2 = XGE_HAL_BASE_INF + 12,
- XGE_HAL_INF_LRO_END_3 = XGE_HAL_BASE_INF + 13,
- XGE_HAL_INF_LRO_SESSIONS_XCDED = XGE_HAL_BASE_INF + 14,
- XGE_HAL_INF_NOT_ENOUGH_HW_CQES = XGE_HAL_BASE_INF + 15,
- XGE_HAL_ERR_DRIVER_NOT_INITIALIZED = XGE_HAL_BASE_ERR + 1,
- XGE_HAL_ERR_OUT_OF_MEMORY = XGE_HAL_BASE_ERR + 4,
- XGE_HAL_ERR_CHANNEL_NOT_FOUND = XGE_HAL_BASE_ERR + 5,
- XGE_HAL_ERR_WRONG_IRQ = XGE_HAL_BASE_ERR + 6,
- XGE_HAL_ERR_OUT_OF_MAC_ADDRESSES = XGE_HAL_BASE_ERR + 7,
- XGE_HAL_ERR_SWAPPER_CTRL = XGE_HAL_BASE_ERR + 8,
- XGE_HAL_ERR_DEVICE_IS_NOT_QUIESCENT = XGE_HAL_BASE_ERR + 9,
- XGE_HAL_ERR_INVALID_MTU_SIZE = XGE_HAL_BASE_ERR + 10,
- XGE_HAL_ERR_OUT_OF_MAPPING = XGE_HAL_BASE_ERR + 11,
- XGE_HAL_ERR_BAD_SUBSYSTEM_ID = XGE_HAL_BASE_ERR + 12,
- XGE_HAL_ERR_INVALID_BAR_ID = XGE_HAL_BASE_ERR + 13,
- XGE_HAL_ERR_INVALID_OFFSET = XGE_HAL_BASE_ERR + 14,
- XGE_HAL_ERR_INVALID_DEVICE = XGE_HAL_BASE_ERR + 15,
- XGE_HAL_ERR_OUT_OF_SPACE = XGE_HAL_BASE_ERR + 16,
- XGE_HAL_ERR_INVALID_VALUE_BIT_SIZE = XGE_HAL_BASE_ERR + 17,
- XGE_HAL_ERR_VERSION_CONFLICT = XGE_HAL_BASE_ERR + 18,
- XGE_HAL_ERR_INVALID_MAC_ADDRESS = XGE_HAL_BASE_ERR + 19,
- XGE_HAL_ERR_BAD_DEVICE_ID = XGE_HAL_BASE_ERR + 20,
- XGE_HAL_ERR_OUT_ALIGNED_FRAGS = XGE_HAL_BASE_ERR + 21,
- XGE_HAL_ERR_DEVICE_NOT_INITIALIZED = XGE_HAL_BASE_ERR + 22,
- XGE_HAL_ERR_SPDM_NOT_ENABLED = XGE_HAL_BASE_ERR + 23,
- XGE_HAL_ERR_SPDM_TABLE_FULL = XGE_HAL_BASE_ERR + 24,
- XGE_HAL_ERR_SPDM_INVALID_ENTRY = XGE_HAL_BASE_ERR + 25,
- XGE_HAL_ERR_SPDM_ENTRY_NOT_FOUND = XGE_HAL_BASE_ERR + 26,
- XGE_HAL_ERR_SPDM_TABLE_DATA_INCONSISTENT= XGE_HAL_BASE_ERR + 27,
- XGE_HAL_ERR_INVALID_PCI_INFO = XGE_HAL_BASE_ERR + 28,
- XGE_HAL_ERR_CRITICAL = XGE_HAL_BASE_ERR + 29,
- XGE_HAL_ERR_RESET_FAILED = XGE_HAL_BASE_ERR + 30,
- XGE_HAL_ERR_TOO_MANY = XGE_HAL_BASE_ERR + 32,
- XGE_HAL_ERR_PKT_DROP = XGE_HAL_BASE_ERR + 33,
-
- XGE_HAL_BADCFG_TX_URANGE_A = XGE_HAL_BASE_BADCFG + 1,
- XGE_HAL_BADCFG_TX_UFC_A = XGE_HAL_BASE_BADCFG + 2,
- XGE_HAL_BADCFG_TX_URANGE_B = XGE_HAL_BASE_BADCFG + 3,
- XGE_HAL_BADCFG_TX_UFC_B = XGE_HAL_BASE_BADCFG + 4,
- XGE_HAL_BADCFG_TX_URANGE_C = XGE_HAL_BASE_BADCFG + 5,
- XGE_HAL_BADCFG_TX_UFC_C = XGE_HAL_BASE_BADCFG + 6,
- XGE_HAL_BADCFG_TX_UFC_D = XGE_HAL_BASE_BADCFG + 8,
- XGE_HAL_BADCFG_TX_TIMER_VAL = XGE_HAL_BASE_BADCFG + 9,
- XGE_HAL_BADCFG_TX_TIMER_CI_EN = XGE_HAL_BASE_BADCFG + 10,
- XGE_HAL_BADCFG_RX_URANGE_A = XGE_HAL_BASE_BADCFG + 11,
- XGE_HAL_BADCFG_RX_UFC_A = XGE_HAL_BASE_BADCFG + 12,
- XGE_HAL_BADCFG_RX_URANGE_B = XGE_HAL_BASE_BADCFG + 13,
- XGE_HAL_BADCFG_RX_UFC_B = XGE_HAL_BASE_BADCFG + 14,
- XGE_HAL_BADCFG_RX_URANGE_C = XGE_HAL_BASE_BADCFG + 15,
- XGE_HAL_BADCFG_RX_UFC_C = XGE_HAL_BASE_BADCFG + 16,
- XGE_HAL_BADCFG_RX_UFC_D = XGE_HAL_BASE_BADCFG + 17,
- XGE_HAL_BADCFG_RX_TIMER_VAL = XGE_HAL_BASE_BADCFG + 18,
- XGE_HAL_BADCFG_FIFO_QUEUE_INITIAL_LENGTH= XGE_HAL_BASE_BADCFG + 19,
- XGE_HAL_BADCFG_FIFO_QUEUE_MAX_LENGTH = XGE_HAL_BASE_BADCFG + 20,
- XGE_HAL_BADCFG_FIFO_QUEUE_INTR = XGE_HAL_BASE_BADCFG + 21,
- XGE_HAL_BADCFG_RING_QUEUE_INITIAL_BLOCKS=XGE_HAL_BASE_BADCFG + 22,
- XGE_HAL_BADCFG_RING_QUEUE_MAX_BLOCKS = XGE_HAL_BASE_BADCFG + 23,
- XGE_HAL_BADCFG_RING_QUEUE_BUFFER_MODE = XGE_HAL_BASE_BADCFG + 24,
- XGE_HAL_BADCFG_RING_QUEUE_SIZE = XGE_HAL_BASE_BADCFG + 25,
- XGE_HAL_BADCFG_BACKOFF_INTERVAL_US = XGE_HAL_BASE_BADCFG + 26,
- XGE_HAL_BADCFG_MAX_FRM_LEN = XGE_HAL_BASE_BADCFG + 27,
- XGE_HAL_BADCFG_RING_PRIORITY = XGE_HAL_BASE_BADCFG + 28,
- XGE_HAL_BADCFG_TMAC_UTIL_PERIOD = XGE_HAL_BASE_BADCFG + 29,
- XGE_HAL_BADCFG_RMAC_UTIL_PERIOD = XGE_HAL_BASE_BADCFG + 30,
- XGE_HAL_BADCFG_RMAC_BCAST_EN = XGE_HAL_BASE_BADCFG + 31,
- XGE_HAL_BADCFG_RMAC_HIGH_PTIME = XGE_HAL_BASE_BADCFG + 32,
- XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q0Q3 = XGE_HAL_BASE_BADCFG +33,
- XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q4Q7 = XGE_HAL_BASE_BADCFG + 34,
- XGE_HAL_BADCFG_FIFO_FRAGS = XGE_HAL_BASE_BADCFG + 35,
- XGE_HAL_BADCFG_FIFO_RESERVE_THRESHOLD = XGE_HAL_BASE_BADCFG + 37,
- XGE_HAL_BADCFG_FIFO_MEMBLOCK_SIZE = XGE_HAL_BASE_BADCFG + 38,
- XGE_HAL_BADCFG_RING_MEMBLOCK_SIZE = XGE_HAL_BASE_BADCFG + 39,
- XGE_HAL_BADCFG_MAX_MTU = XGE_HAL_BASE_BADCFG + 40,
- XGE_HAL_BADCFG_ISR_POLLING_CNT = XGE_HAL_BASE_BADCFG + 41,
- XGE_HAL_BADCFG_LATENCY_TIMER = XGE_HAL_BASE_BADCFG + 42,
- XGE_HAL_BADCFG_MAX_SPLITS_TRANS = XGE_HAL_BASE_BADCFG + 43,
- XGE_HAL_BADCFG_MMRB_COUNT = XGE_HAL_BASE_BADCFG + 44,
- XGE_HAL_BADCFG_SHARED_SPLITS = XGE_HAL_BASE_BADCFG + 45,
- XGE_HAL_BADCFG_STATS_REFRESH_TIME = XGE_HAL_BASE_BADCFG + 46,
- XGE_HAL_BADCFG_PCI_FREQ_MHERZ = XGE_HAL_BASE_BADCFG + 47,
- XGE_HAL_BADCFG_PCI_MODE = XGE_HAL_BASE_BADCFG + 48,
- XGE_HAL_BADCFG_INTR_MODE = XGE_HAL_BASE_BADCFG + 49,
- XGE_HAL_BADCFG_SCHED_TIMER_US = XGE_HAL_BASE_BADCFG + 50,
- XGE_HAL_BADCFG_SCHED_TIMER_ON_SHOT = XGE_HAL_BASE_BADCFG + 51,
- XGE_HAL_BADCFG_QUEUE_SIZE_INITIAL = XGE_HAL_BASE_BADCFG + 52,
- XGE_HAL_BADCFG_QUEUE_SIZE_MAX = XGE_HAL_BASE_BADCFG + 53,
- XGE_HAL_BADCFG_RING_RTH_EN = XGE_HAL_BASE_BADCFG + 54,
- XGE_HAL_BADCFG_RING_INDICATE_MAX_PKTS = XGE_HAL_BASE_BADCFG + 55,
- XGE_HAL_BADCFG_TX_TIMER_AC_EN = XGE_HAL_BASE_BADCFG + 56,
- XGE_HAL_BADCFG_RX_TIMER_AC_EN = XGE_HAL_BASE_BADCFG + 57,
- XGE_HAL_BADCFG_RXUFCA_INTR_THRES = XGE_HAL_BASE_BADCFG + 58,
- XGE_HAL_BADCFG_RXUFCA_LO_LIM = XGE_HAL_BASE_BADCFG + 59,
- XGE_HAL_BADCFG_RXUFCA_HI_LIM = XGE_HAL_BASE_BADCFG + 60,
- XGE_HAL_BADCFG_RXUFCA_LBOLT_PERIOD = XGE_HAL_BASE_BADCFG + 61,
- XGE_HAL_BADCFG_TRACEBUF_SIZE = XGE_HAL_BASE_BADCFG + 62,
- XGE_HAL_BADCFG_LINK_VALID_CNT = XGE_HAL_BASE_BADCFG + 63,
- XGE_HAL_BADCFG_LINK_RETRY_CNT = XGE_HAL_BASE_BADCFG + 64,
- XGE_HAL_BADCFG_LINK_STABILITY_PERIOD = XGE_HAL_BASE_BADCFG + 65,
- XGE_HAL_BADCFG_DEVICE_POLL_MILLIS = XGE_HAL_BASE_BADCFG + 66,
- XGE_HAL_BADCFG_RMAC_PAUSE_GEN_EN = XGE_HAL_BASE_BADCFG + 67,
- XGE_HAL_BADCFG_RMAC_PAUSE_RCV_EN = XGE_HAL_BASE_BADCFG + 68,
- XGE_HAL_BADCFG_MEDIA = XGE_HAL_BASE_BADCFG + 69,
- XGE_HAL_BADCFG_NO_ISR_EVENTS = XGE_HAL_BASE_BADCFG + 70,
- XGE_HAL_BADCFG_RING_RTS_MAC_EN = XGE_HAL_BASE_BADCFG + 71,
- XGE_HAL_BADCFG_LRO_SG_SIZE = XGE_HAL_BASE_BADCFG + 72,
- XGE_HAL_BADCFG_LRO_FRM_LEN = XGE_HAL_BASE_BADCFG + 73,
- XGE_HAL_BADCFG_WQE_NUM_ODS = XGE_HAL_BASE_BADCFG + 74,
- XGE_HAL_BADCFG_BIMODAL_INTR = XGE_HAL_BASE_BADCFG + 75,
- XGE_HAL_BADCFG_BIMODAL_TIMER_LO_US = XGE_HAL_BASE_BADCFG + 76,
- XGE_HAL_BADCFG_BIMODAL_TIMER_HI_US = XGE_HAL_BASE_BADCFG + 77,
- XGE_HAL_BADCFG_BIMODAL_XENA_NOT_ALLOWED = XGE_HAL_BASE_BADCFG + 78,
- XGE_HAL_BADCFG_RTS_QOS_EN = XGE_HAL_BASE_BADCFG + 79,
- XGE_HAL_BADCFG_FIFO_QUEUE_INTR_VECTOR = XGE_HAL_BASE_BADCFG + 80,
- XGE_HAL_BADCFG_RING_QUEUE_INTR_VECTOR = XGE_HAL_BASE_BADCFG + 81,
- XGE_HAL_BADCFG_RTS_PORT_EN = XGE_HAL_BASE_BADCFG + 82,
- XGE_HAL_BADCFG_RING_RTS_PORT_EN = XGE_HAL_BASE_BADCFG + 83,
- XGE_HAL_BADCFG_TRACEBUF_TIMESTAMP = XGE_HAL_BASE_BADCFG + 84,
- XGE_HAL_EOF_TRACE_BUF = -1
-} xge_hal_status_e;
-
-#define XGE_HAL_ETH_ALEN 6
-typedef u8 macaddr_t[XGE_HAL_ETH_ALEN];
-
-#define XGE_HAL_PCI_XFRAME_CONFIG_SPACE_SIZE 0x100
-
-/* frames sizes */
-#define XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE 14
-#define XGE_HAL_HEADER_802_2_SIZE 3
-#define XGE_HAL_HEADER_SNAP_SIZE 5
-#define XGE_HAL_HEADER_VLAN_SIZE 4
-#define XGE_HAL_MAC_HEADER_MAX_SIZE \
- (XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE + \
- XGE_HAL_HEADER_802_2_SIZE + \
- XGE_HAL_HEADER_SNAP_SIZE)
-
-#define XGE_HAL_TCPIP_HEADER_MAX_SIZE (64 + 64)
-
-/* 32bit alignments */
-#define XGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN 2
-#define XGE_HAL_HEADER_802_2_SNAP_ALIGN 2
-#define XGE_HAL_HEADER_802_2_ALIGN 3
-#define XGE_HAL_HEADER_SNAP_ALIGN 1
-
-#define XGE_HAL_L3_CKSUM_OK 0xFFFF
-#define XGE_HAL_L4_CKSUM_OK 0xFFFF
-#define XGE_HAL_MIN_MTU 46
-#define XGE_HAL_MAX_MTU 9600
-#define XGE_HAL_DEFAULT_MTU 1500
-
-#define XGE_HAL_SEGEMENT_OFFLOAD_MAX_SIZE 81920
-
-#define XGE_HAL_PCISIZE_XENA 26 /* multiples of dword */
-#define XGE_HAL_PCISIZE_HERC 64 /* multiples of dword */
-
-#define XGE_HAL_MAX_MSIX_MESSAGES 64
-#define XGE_HAL_MAX_MSIX_MESSAGES_WITH_ADDR XGE_HAL_MAX_MSIX_MESSAGES * 2
-/* Highest level interrupt blocks */
-#define XGE_HAL_TX_PIC_INTR (0x0001<<0)
-#define XGE_HAL_TX_DMA_INTR (0x0001<<1)
-#define XGE_HAL_TX_MAC_INTR (0x0001<<2)
-#define XGE_HAL_TX_XGXS_INTR (0x0001<<3)
-#define XGE_HAL_TX_TRAFFIC_INTR (0x0001<<4)
-#define XGE_HAL_RX_PIC_INTR (0x0001<<5)
-#define XGE_HAL_RX_DMA_INTR (0x0001<<6)
-#define XGE_HAL_RX_MAC_INTR (0x0001<<7)
-#define XGE_HAL_RX_XGXS_INTR (0x0001<<8)
-#define XGE_HAL_RX_TRAFFIC_INTR (0x0001<<9)
-#define XGE_HAL_MC_INTR (0x0001<<10)
-#define XGE_HAL_SCHED_INTR (0x0001<<11)
-#define XGE_HAL_ALL_INTRS (XGE_HAL_TX_PIC_INTR | \
- XGE_HAL_TX_DMA_INTR | \
- XGE_HAL_TX_MAC_INTR | \
- XGE_HAL_TX_XGXS_INTR | \
- XGE_HAL_TX_TRAFFIC_INTR | \
- XGE_HAL_RX_PIC_INTR | \
- XGE_HAL_RX_DMA_INTR | \
- XGE_HAL_RX_MAC_INTR | \
- XGE_HAL_RX_XGXS_INTR | \
- XGE_HAL_RX_TRAFFIC_INTR | \
- XGE_HAL_MC_INTR | \
- XGE_HAL_SCHED_INTR)
-#define XGE_HAL_GEN_MASK_INTR (0x0001<<12)
-
-/* Interrupt masks for the general interrupt mask register */
-#define XGE_HAL_ALL_INTRS_DIS 0xFFFFFFFFFFFFFFFFULL
-
-#define XGE_HAL_TXPIC_INT_M BIT(0)
-#define XGE_HAL_TXDMA_INT_M BIT(1)
-#define XGE_HAL_TXMAC_INT_M BIT(2)
-#define XGE_HAL_TXXGXS_INT_M BIT(3)
-#define XGE_HAL_TXTRAFFIC_INT_M BIT(8)
-#define XGE_HAL_PIC_RX_INT_M BIT(32)
-#define XGE_HAL_RXDMA_INT_M BIT(33)
-#define XGE_HAL_RXMAC_INT_M BIT(34)
-#define XGE_HAL_MC_INT_M BIT(35)
-#define XGE_HAL_RXXGXS_INT_M BIT(36)
-#define XGE_HAL_RXTRAFFIC_INT_M BIT(40)
-
-/* MSI level Interrupts */
-#define XGE_HAL_MAX_MSIX_VECTORS (16)
-
-typedef struct xge_hal_ipv4 {
- u32 addr;
-}xge_hal_ipv4;
-
-typedef struct xge_hal_ipv6 {
- u64 addr[2];
-}xge_hal_ipv6;
-
-typedef union xge_hal_ipaddr_t {
- xge_hal_ipv4 ipv4;
- xge_hal_ipv6 ipv6;
-}xge_hal_ipaddr_t;
-
-/* DMA level Interrupts */
-#define XGE_HAL_TXDMA_PFC_INT_M BIT(0)
-
-/* PFC block interrupts */
-#define XGE_HAL_PFC_MISC_ERR_1 BIT(0) /* Interrupt to indicate FIFO
-full */
-
-/* basic handles */
-typedef void* xge_hal_device_h;
-typedef void* xge_hal_dtr_h;
-typedef void* xge_hal_channel_h;
-
-/*
- * I2C device id. Used in I2C control register for accessing EEPROM device
- * memory.
- */
-#define XGE_DEV_ID 5
-
-typedef enum xge_hal_xpak_alarm_type_e {
- XGE_HAL_XPAK_ALARM_EXCESS_TEMP = 1,
- XGE_HAL_XPAK_ALARM_EXCESS_BIAS_CURRENT = 2,
- XGE_HAL_XPAK_ALARM_EXCESS_LASER_OUTPUT = 3,
-} xge_hal_xpak_alarm_type_e;
-
-
-__EXTERN_END_DECLS
-
-#endif /* XGE_HAL_TYPES_H */
diff --git a/sys/dev/nxge/include/xgehal.h b/sys/dev/nxge/include/xgehal.h
deleted file mode 100644
index 2e77d67b7a5b..000000000000
--- a/sys/dev/nxge/include/xgehal.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_HAL_H
-#define XGE_HAL_H
-
-#include <dev/nxge/include/xge-defs.h>
-#include <dev/nxge/include/xge-os-pal.h>
-#include <dev/nxge/include/xge-debug.h>
-#include <dev/nxge/include/xgehal-types.h>
-#include <dev/nxge/include/xgehal-driver.h>
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xgehal-device.h>
-#include <dev/nxge/include/xgehal-channel.h>
-#include <dev/nxge/include/xgehal-fifo.h>
-#include <dev/nxge/include/xgehal-ring.h>
-#include <dev/nxge/include/xgehal-mgmt.h>
-
-#endif /* XGE_HAL_H */
diff --git a/sys/dev/nxge/xge-osdep.h b/sys/dev/nxge/xge-osdep.h
deleted file mode 100644
index 7ff3e93404a4..000000000000
--- a/sys/dev/nxge/xge-osdep.h
+++ /dev/null
@@ -1,790 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifndef XGE_OSDEP_H
-#define XGE_OSDEP_H
-
-/**
- * Includes and defines
- */
-#include <sys/param.h>
-#include <sys/systm.h>
-#include <sys/mbuf.h>
-#include <sys/protosw.h>
-#include <sys/socket.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/bus.h>
-#include <sys/lock.h>
-#include <sys/mutex.h>
-#include <sys/rman.h>
-#include <sys/stddef.h>
-#include <sys/types.h>
-#include <sys/sockio.h>
-#include <sys/proc.h>
-#include <sys/mutex.h>
-#include <sys/types.h>
-#include <sys/endian.h>
-#include <sys/sysctl.h>
-#include <sys/endian.h>
-#include <sys/socket.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
-#include <machine/clock.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <dev/pci/pcivar.h>
-#include <dev/pci/pcireg.h>
-#include <dev/pci/pci_private.h>
-#include <net/if.h>
-#include <net/if_arp.h>
-#include <net/ethernet.h>
-#include <net/if_dl.h>
-#include <net/if_media.h>
-#include <net/if_var.h>
-#include <net/bpf.h>
-#include <net/if_types.h>
-#include <netinet/in_systm.h>
-#include <netinet/in.h>
-#include <netinet/ip.h>
-#include <netinet/tcp.h>
-
-#define XGE_OS_PLATFORM_64BIT
-
-#if BYTE_ORDER == BIG_ENDIAN
-#define XGE_OS_HOST_BIG_ENDIAN
-#elif BYTE_ORDER == LITTLE_ENDIAN
-#define XGE_OS_HOST_LITTLE_ENDIAN
-#endif
-
-#define XGE_HAL_USE_5B_MODE
-
-#ifdef XGE_TRACE_ASSERT
-#undef XGE_TRACE_ASSERT
-#endif
-
-#define OS_NETSTACK_BUF struct mbuf *
-#define XGE_LL_IP_FAST_CSUM(hdr, len) 0
-
-#ifndef __DECONST
-#define __DECONST(type, var) ((type)(uintrptr_t)(const void *)(var))
-#endif
-
-#define xge_os_ntohs ntohs
-#define xge_os_ntohl ntohl
-#define xge_os_htons htons
-#define xge_os_htonl htonl
-
-typedef struct xge_bus_resource_t {
- bus_space_tag_t bus_tag; /* DMA Tag */
- bus_space_handle_t bus_handle; /* Bus handle */
- struct resource *bar_start_addr;/* BAR start address */
-} xge_bus_resource_t;
-
-typedef struct xge_dma_alloc_t {
- bus_addr_t dma_phyaddr; /* Physical Address */
- caddr_t dma_viraddr; /* Virtual Address */
- bus_dma_tag_t dma_tag; /* DMA Tag */
- bus_dmamap_t dma_map; /* DMA Map */
- bus_dma_segment_t dma_segment; /* DMA Segment */
- bus_size_t dma_size; /* Size */
- int dma_nseg; /* Maximum scatter-gather segs. */
-} xge_dma_alloc_t;
-
-typedef struct xge_dma_mbuf_t {
- bus_addr_t dma_phyaddr; /* Physical Address */
- bus_dmamap_t dma_map; /* DMA Map */
-}xge_dma_mbuf_t;
-
-typedef struct xge_pci_info {
- device_t device; /* Device */
- struct resource *regmap0; /* Resource for BAR0 */
- struct resource *regmap1; /* Resource for BAR1 */
- void *bar0resource; /* BAR0 tag and handle */
- void *bar1resource; /* BAR1 tag and handle */
-} xge_pci_info_t;
-
-
-/**
- * Fixed size primitive types
- */
-#define u8 uint8_t
-#define u16 uint16_t
-#define u32 uint32_t
-#define u64 uint64_t
-#define ulong_t unsigned long
-#define uint unsigned int
-#define ptrdiff_t ptrdiff_t
-typedef bus_addr_t dma_addr_t;
-typedef struct mtx spinlock_t;
-typedef xge_pci_info_t *pci_dev_h;
-typedef xge_bus_resource_t *pci_reg_h;
-typedef xge_dma_alloc_t pci_dma_h;
-typedef xge_dma_alloc_t pci_dma_acc_h;
-typedef struct resource *pci_irq_h;
-typedef xge_pci_info_t *pci_cfg_h;
-
-/**
- * "libc" functionality
- */
-#define xge_os_memzero(addr, size) bzero(addr, size)
-#define xge_os_memcpy(dst, src, size) bcopy(src, dst, size)
-#define xge_os_memcmp memcmp
-#define xge_os_strcpy strcpy
-#define xge_os_strlen strlen
-#define xge_os_snprintf snprintf
-#define xge_os_sprintf sprintf
-#define xge_os_printf(fmt...) { \
- printf(fmt); \
- printf("\n"); \
-}
-
-#define xge_os_vaprintf(fmt) { \
- sprintf(fmt, fmt, "\n"); \
- va_list va; \
- va_start(va, fmt); \
- vprintf(fmt, va); \
- va_end(va); \
-}
-
-#define xge_os_vasprintf(buf, fmt) { \
- va_list va; \
- va_start(va, fmt); \
- (void) vaprintf(buf, fmt, va); \
- va_end(va); \
-}
-
-#define xge_os_timestamp(buf) { \
- struct timeval current_time; \
- gettimeofday(&current_time, 0); \
- sprintf(buf, "%08li.%08li: ", current_time.tv_sec, \
- current_time.tv_usec); \
-}
-
-#define xge_os_println xge_os_printf
-
-/**
- * Synchronization Primitives
- */
-/* Initialize the spin lock */
-#define xge_os_spin_lock_init(lockp, ctxh) { \
- if(mtx_initialized(lockp) == 0) { \
- mtx_init((lockp), "xge", NULL, MTX_DEF); \
- } \
-}
-
-/* Initialize the spin lock (IRQ version) */
-#define xge_os_spin_lock_init_irq(lockp, ctxh) { \
- if(mtx_initialized(lockp) == 0) { \
- mtx_init((lockp), "xge", NULL, MTX_DEF); \
- } \
-}
-
-/* Destroy the lock */
-#define xge_os_spin_lock_destroy(lockp, ctxh) { \
- if(mtx_initialized(lockp) != 0) { \
- mtx_destroy(lockp); \
- } \
-}
-
-/* Destroy the lock (IRQ version) */
-#define xge_os_spin_lock_destroy_irq(lockp, ctxh) { \
- if(mtx_initialized(lockp) != 0) { \
- mtx_destroy(lockp); \
- } \
-}
-
-/* Acquire the lock */
-#define xge_os_spin_lock(lockp) { \
- if(mtx_owned(lockp) == 0) mtx_lock(lockp); \
-}
-
-/* Release the lock */
-#define xge_os_spin_unlock(lockp) { \
- mtx_unlock(lockp); \
-}
-
-/* Acquire the lock (IRQ version) */
-#define xge_os_spin_lock_irq(lockp, flags) { \
- flags = MTX_QUIET; \
- if(mtx_owned(lockp) == 0) mtx_lock_flags(lockp, flags); \
-}
-
-/* Release the lock (IRQ version) */
-#define xge_os_spin_unlock_irq(lockp, flags) { \
- flags = MTX_QUIET; \
- mtx_unlock_flags(lockp, flags); \
-}
-
-#if __FreeBSD_version > 800053
-/* Write memory barrier */
-#define xge_os_wmb() wmb()
-#else
-#define xge_os_wmb()
-#endif
-
-/* Delay (in micro seconds) */
-#define xge_os_udelay(us) DELAY(us)
-
-/* Delay (in milli seconds) */
-#define xge_os_mdelay(ms) DELAY(ms * 1000)
-
-/* Compare and exchange */
-//#define xge_os_cmpxchg(targetp, cmd, newval)
-
-/**
- * Misc primitives
- */
-#define xge_os_unlikely(x) (x)
-#define xge_os_prefetch(x) (x=x)
-#define xge_os_prefetchw(x) (x=x)
-#define xge_os_bug(fmt...) printf(fmt)
-#define xge_os_htohs ntohs
-#define xge_os_ntohl ntohl
-#define xge_os_htons htons
-#define xge_os_htonl htonl
-
-/**
- * Compiler Stuffs
- */
-#define __xge_os_attr_cacheline_aligned
-#define __xge_os_cacheline_size 32
-
-/**
- * Memory Primitives
- */
-#define XGE_OS_INVALID_DMA_ADDR ((dma_addr_t)0)
-
-/**
- * xge_os_malloc
- * Allocate non DMA-able memory.
- * @pdev: Device context.
- * @size: Size to allocate.
- *
- * Allocate @size bytes of memory. This allocation can sleep, and therefore,
- * and therefore it requires process context. In other words, xge_os_malloc()
- * cannot be called from the interrupt context. Use xge_os_free() to free the
- * allocated block.
- *
- * Returns: Pointer to allocated memory, NULL - on failure.
- *
- * See also: xge_os_free().
- */
-static inline void *
-xge_os_malloc(pci_dev_h pdev, unsigned long size) {
- void *vaddr = malloc((size), M_DEVBUF, M_NOWAIT | M_ZERO);
- if(vaddr != NULL) {
- XGE_OS_MEMORY_CHECK_MALLOC(vaddr, size, __FILE__, __LINE__);
- xge_os_memzero(vaddr, size);
- }
- return (vaddr);
-}
-
-/**
- * xge_os_free
- * Free non DMA-able memory.
- * @pdev: Device context.
- * @vaddr: Address of the allocated memory block.
- * @size: Some OS's require to provide size on free
- *
- * Free the memory area obtained via xge_os_malloc(). This call may also sleep,
- * and therefore it cannot be used inside interrupt.
- *
- * See also: xge_os_malloc().
- */
-static inline void
-xge_os_free(pci_dev_h pdev, const void *vaddr, unsigned long size) {
- XGE_OS_MEMORY_CHECK_FREE(vaddr, size);
- free(__DECONST(void *, vaddr), M_DEVBUF);
-}
-
-static void
-xge_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) {
- if(error) return;
- *(bus_addr_t *) arg = segs->ds_addr;
- return;
-}
-
-/**
- * xge_os_dma_malloc
- * Allocate DMA-able memory.
- * @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
- * @size: Size (in bytes) to allocate.
- * @dma_flags: XGE_OS_DMA_CACHELINE_ALIGNED, XGE_OS_DMA_STREAMING,
- * XGE_OS_DMA_CONSISTENT (Note that the last two flags are mutually exclusive.)
- * @p_dmah: Handle used to map the memory onto the corresponding device memory
- * space. See xge_os_dma_map(). The handle is an out-parameter returned by the
- * function.
- * @p_dma_acch: One more DMA handle used subsequently to free the DMA object
- * (via xge_os_dma_free()).
- *
- * Allocate DMA-able contiguous memory block of the specified @size. This memory
- * can be subsequently freed using xge_os_dma_free().
- * Note: can be used inside interrupt context.
- *
- * Returns: Pointer to allocated memory(DMA-able), NULL on failure.
- */
-static inline void *
-xge_os_dma_malloc(pci_dev_h pdev, unsigned long size, int dma_flags,
- pci_dma_h *p_dmah, pci_dma_acc_h *p_dma_acch) {
- int retValue = bus_dma_tag_create(
- bus_get_dma_tag(pdev->device), /* Parent */
- PAGE_SIZE, /* Alignment no specific alignment */
- 0, /* Bounds */
- BUS_SPACE_MAXADDR, /* Low Address */
- BUS_SPACE_MAXADDR, /* High Address */
- NULL, /* Filter */
- NULL, /* Filter arg */
- size, /* Max Size */
- 1, /* n segments */
- size, /* max segment size */
- BUS_DMA_ALLOCNOW, /* Flags */
- NULL, /* lockfunction */
- NULL, /* lock arg */
- &p_dmah->dma_tag); /* DMA tag */
- if(retValue != 0) {
- xge_os_printf("bus_dma_tag_create failed\n")
- goto fail_1;
- }
- p_dmah->dma_size = size;
- retValue = bus_dmamem_alloc(p_dmah->dma_tag,
- (void **)&p_dmah->dma_viraddr, BUS_DMA_NOWAIT, &p_dmah->dma_map);
- if(retValue != 0) {
- xge_os_printf("bus_dmamem_alloc failed\n")
- goto fail_2;
- }
- XGE_OS_MEMORY_CHECK_MALLOC(p_dmah->dma_viraddr, p_dmah->dma_size,
- __FILE__, __LINE__);
- return(p_dmah->dma_viraddr);
-
-fail_2: bus_dma_tag_destroy(p_dmah->dma_tag);
-fail_1: return(NULL);
-}
-
-/**
- * xge_os_dma_free
- * Free previously allocated DMA-able memory.
- * @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
- * @vaddr: Virtual address of the DMA-able memory.
- * @p_dma_acch: DMA handle used to free the resource.
- * @p_dmah: DMA handle used for mapping. See xge_os_dma_malloc().
- *
- * Free DMA-able memory originally allocated by xge_os_dma_malloc().
- * Note: can be used inside interrupt.
- * See also: xge_os_dma_malloc().
- */
-static inline void
-xge_os_dma_free(pci_dev_h pdev, const void *vaddr, int size,
- pci_dma_acc_h *p_dma_acch, pci_dma_h *p_dmah)
-{
- XGE_OS_MEMORY_CHECK_FREE(p_dmah->dma_viraddr, size);
- bus_dmamem_free(p_dmah->dma_tag, p_dmah->dma_viraddr, p_dmah->dma_map);
- bus_dma_tag_destroy(p_dmah->dma_tag);
- p_dmah->dma_tag = NULL;
- p_dmah->dma_viraddr = NULL;
- return;
-}
-
-/**
- * IO/PCI/DMA Primitives
- */
-#define XGE_OS_DMA_DIR_TODEVICE 0
-#define XGE_OS_DMA_DIR_FROMDEVICE 1
-#define XGE_OS_DMA_DIR_BIDIRECTIONAL 2
-
-/**
- * xge_os_pci_read8
- * Read one byte from device PCI configuration.
- * @pdev: Device context. Some OSs require device context to perform PIO and/or
- * config space IO.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Address of the result.
- *
- * Read byte value from the specified @regh PCI configuration space at the
- * specified offset = @where.
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_read8(pdev, cfgh, where, val) \
- (*(val) = pci_read_config(pdev->device, where, 1))
-
-/**
- * xge_os_pci_write8
- * Write one byte into device PCI configuration.
- * @pdev: Device context. Some OSs require device context to perform PIO and/or
- * config space IO.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Value to write.
- *
- * Write byte value into the specified PCI configuration space
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_write8(pdev, cfgh, where, val) \
- pci_write_config(pdev->device, where, val, 1)
-
-/**
- * xge_os_pci_read16
- * Read 16bit word from device PCI configuration.
- * @pdev: Device context.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Address of the 16bit result.
- *
- * Read 16bit value from the specified PCI configuration space at the
- * specified offset.
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_read16(pdev, cfgh, where, val) \
- (*(val) = pci_read_config(pdev->device, where, 2))
-
-/**
- * xge_os_pci_write16
- * Write 16bit word into device PCI configuration.
- * @pdev: Device context.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Value to write.
- *
- * Write 16bit value into the specified @offset in PCI configuration space.
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_write16(pdev, cfgh, where, val) \
- pci_write_config(pdev->device, where, val, 2)
-
-/**
- * xge_os_pci_read32
- * Read 32bit word from device PCI configuration.
- * @pdev: Device context.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Address of 32bit result.
- *
- * Read 32bit value from the specified PCI configuration space at the
- * specified offset.
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_read32(pdev, cfgh, where, val) \
- (*(val) = pci_read_config(pdev->device, where, 4))
-
-/**
- * xge_os_pci_write32
- * Write 32bit word into device PCI configuration.
- * @pdev: Device context.
- * @cfgh: PCI configuration space handle.
- * @where: Offset in the PCI configuration space.
- * @val: Value to write.
- *
- * Write 32bit value into the specified @offset in PCI configuration space.
- * Returns: 0 - success, non-zero - failure.
- */
-#define xge_os_pci_write32(pdev, cfgh, where, val) \
- pci_write_config(pdev->device, where, val, 4)
-
-/**
- * xge_os_pio_mem_read8
- * Read 1 byte from device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @addr: Address in device memory space.
- *
- * Returns: 1 byte value read from the specified (mapped) memory space address.
- */
-static inline u8
-xge_os_pio_mem_read8(pci_dev_h pdev, pci_reg_h regh, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)
- (((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- return bus_space_read_1(tag, handle, (caddr_t)(addr) - addrss);
-}
-
-/**
- * xge_os_pio_mem_write8
- * Write 1 byte into device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @val: Value to write.
- * @addr: Address in device memory space.
- *
- * Write byte value into the specified (mapped) device memory space.
- */
-static inline void
-xge_os_pio_mem_write8(pci_dev_h pdev, pci_reg_h regh, u8 val, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)
- (((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- bus_space_write_1(tag, handle, (caddr_t)(addr) - addrss, val);
-}
-
-/**
- * xge_os_pio_mem_read16
- * Read 16bit from device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @addr: Address in device memory space.
- *
- * Returns: 16bit value read from the specified (mapped) memory space address.
- */
-static inline u16
-xge_os_pio_mem_read16(pci_dev_h pdev, pci_reg_h regh, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)
- (((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- return bus_space_read_2(tag, handle, (caddr_t)(addr) - addrss);
-}
-
-/**
- * xge_os_pio_mem_write16
- * Write 16bit into device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @val: Value to write.
- * @addr: Address in device memory space.
- *
- * Write 16bit value into the specified (mapped) device memory space.
- */
-static inline void
-xge_os_pio_mem_write16(pci_dev_h pdev, pci_reg_h regh, u16 val, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)(((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- bus_space_write_2(tag, handle, (caddr_t)(addr) - addrss, val);
-}
-
-/**
- * xge_os_pio_mem_read32
- * Read 32bit from device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @addr: Address in device memory space.
- *
- * Returns: 32bit value read from the specified (mapped) memory space address.
- */
-static inline u32
-xge_os_pio_mem_read32(pci_dev_h pdev, pci_reg_h regh, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)
- (((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- return bus_space_read_4(tag, handle, (caddr_t)(addr) - addrss);
-}
-
-/**
- * xge_os_pio_mem_write32
- * Write 32bit into device memory space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @val: Value to write.
- * @addr: Address in device memory space.
- *
- * Write 32bit value into the specified (mapped) device memory space.
- */
-static inline void
-xge_os_pio_mem_write32(pci_dev_h pdev, pci_reg_h regh, u32 val, void *addr)
-{
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)(((xge_bus_resource_t *)(regh))->bar_start_addr);
- bus_space_write_4(tag, handle, (caddr_t)(addr) - addrss, val);
-}
-
-/**
- * xge_os_pio_mem_read64
- * Read 64bit from device memory mapped space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @addr: Address in device memory space.
- *
- * Returns: 64bit value read from the specified (mapped) memory space address.
- */
-static inline u64
-xge_os_pio_mem_read64(pci_dev_h pdev, pci_reg_h regh, void *addr)
-{
- u64 value1, value2;
-
- bus_space_tag_t tag =
- (bus_space_tag_t)(((xge_bus_resource_t *)regh)->bus_tag);
- bus_space_handle_t handle =
- (bus_space_handle_t)(((xge_bus_resource_t *)regh)->bus_handle);
- caddr_t addrss = (caddr_t)
- (((xge_bus_resource_t *)(regh))->bar_start_addr);
-
- value1 = bus_space_read_4(tag, handle, (caddr_t)(addr) + 4 - addrss);
- value1 <<= 32;
- value2 = bus_space_read_4(tag, handle, (caddr_t)(addr) - addrss);
- value1 |= value2;
- return value1;
-}
-
-/**
- * xge_os_pio_mem_write64
- * Write 32bit into device memory space.
- * @pdev: Device context.
- * @regh: PCI configuration space handle.
- * @val: Value to write.
- * @addr: Address in device memory space.
- *
- * Write 64bit value into the specified (mapped) device memory space.
- */
-static inline void
-xge_os_pio_mem_write64(pci_dev_h pdev, pci_reg_h regh, u64 val, void *addr)
-{
- u32 vall = val & 0xffffffff;
- xge_os_pio_mem_write32(pdev, regh, vall, addr);
- xge_os_pio_mem_write32(pdev, regh, val >> 32, ((caddr_t)(addr) + 4));
-}
-
-/**
- * FIXME: document
- */
-#define xge_os_flush_bridge xge_os_pio_mem_read64
-
-/**
- * xge_os_dma_map
- * Map DMA-able memory block to, or from, or to-and-from device.
- * @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
- * @dmah: DMA handle used to map the memory block. Obtained via
- * xge_os_dma_malloc().
- * @vaddr: Virtual address of the DMA-able memory.
- * @size: Size (in bytes) to be mapped.
- * @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
- * @dma_flags: XGE_OS_DMA_CACHELINE_ALIGNED, XGE_OS_DMA_STREAMING,
- * XGE_OS_DMA_CONSISTENT (Note that the last two flags are mutually exclusive).
- *
- * Map a single memory block.
- *
- * Returns: DMA address of the memory block, XGE_OS_INVALID_DMA_ADDR on failure.
- *
- * See also: xge_os_dma_malloc(), xge_os_dma_unmap(), xge_os_dma_sync().
- */
-static inline dma_addr_t
-xge_os_dma_map(pci_dev_h pdev, pci_dma_h dmah, void *vaddr, size_t size,
- int dir, int dma_flags)
-{
- int retValue =
- bus_dmamap_load(dmah.dma_tag, dmah.dma_map, dmah.dma_viraddr,
- dmah.dma_size, xge_dmamap_cb, &dmah.dma_phyaddr, BUS_DMA_NOWAIT);
- if(retValue != 0) {
- xge_os_printf("bus_dmamap_load_ failed\n")
- return XGE_OS_INVALID_DMA_ADDR;
- }
- dmah.dma_size = size;
- return dmah.dma_phyaddr;
-}
-
-/**
- * xge_os_dma_unmap - Unmap DMA-able memory.
- * @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
- * @dmah: DMA handle used to map the memory block. Obtained via
- * xge_os_dma_malloc().
- * @dma_addr: DMA address of the block. Obtained via xge_os_dma_map().
- * @size: Size (in bytes) to be unmapped.
- * @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
- *
- * Unmap a single DMA-able memory block that was previously mapped using
- * xge_os_dma_map().
- * See also: xge_os_dma_malloc(), xge_os_dma_map().
- */
-static inline void
-xge_os_dma_unmap(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_addr,
- size_t size, int dir)
-{
- bus_dmamap_unload(dmah.dma_tag, dmah.dma_map);
- return;
-}
-
-/**
- * xge_os_dma_sync - Synchronize mapped memory.
- * @pdev: Device context. Used to allocate/pin/map/unmap DMA-able memory.
- * @dmah: DMA handle used to map the memory block. Obtained via
- * xge_os_dma_malloc().
- * @dma_addr: DMA address of the block. Obtained via xge_os_dma_map().
- * @dma_offset: Offset from start of the blocke. Used by Solaris only.
- * @length: Size of the block.
- * @dir: Direction of this operation (XGE_OS_DMA_DIR_TODEVICE, etc.)
- *
- * Make physical and CPU memory consistent for a single streaming mode DMA
- * translation. This API compiles to NOP on cache-coherent platforms. On
- * non cache-coherent platforms, depending on the direction of the "sync"
- * operation, this API will effectively either invalidate CPU cache (that might
- * contain old data), or flush CPU cache to update physical memory.
- * See also: xge_os_dma_malloc(), xge_os_dma_map(),
- * xge_os_dma_unmap().
- */
-static inline void
-xge_os_dma_sync(pci_dev_h pdev, pci_dma_h dmah, dma_addr_t dma_addr,
- u64 dma_offset, size_t length, int dir)
-{
- bus_dmasync_op_t syncop;
- switch(dir) {
- case XGE_OS_DMA_DIR_TODEVICE:
- syncop = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_POSTWRITE;
- break;
-
- case XGE_OS_DMA_DIR_FROMDEVICE:
- syncop = BUS_DMASYNC_PREREAD | BUS_DMASYNC_POSTREAD;
- break;
-
- default:
- syncop = BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREWRITE;
- break;
- }
- bus_dmamap_sync(dmah.dma_tag, dmah.dma_map, syncop);
- return;
-}
-
-#endif /* XGE_OSDEP_H */
-
diff --git a/sys/dev/nxge/xgehal/xge-queue.c b/sys/dev/nxge/xgehal/xge-queue.c
deleted file mode 100644
index dd84884f2f1e..000000000000
--- a/sys/dev/nxge/xgehal/xge-queue.c
+++ /dev/null
@@ -1,454 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <dev/nxge/include/xge-queue.h>
-
-/**
- * xge_queue_item_data - Get item's data.
- * @item: Queue item.
- *
- * Returns: item data(variable size). Note that xge_queue_t
- * contains items comprized of a fixed xge_queue_item_t "header"
- * and a variable size data. This function returns the variable
- * user-defined portion of the queue item.
- */
-void* xge_queue_item_data(xge_queue_item_t *item)
-{
- return (char *)item + sizeof(xge_queue_item_t);
-}
-
-/*
- * __queue_consume - (Lockless) dequeue an item from the specified queue.
- *
- * @queue: Event queue.
- * See xge_queue_consume().
- */
-static xge_queue_status_e
-__queue_consume(xge_queue_t *queue, int data_max_size, xge_queue_item_t *item)
-{
- int real_size;
- xge_queue_item_t *elem;
-
- if (xge_list_is_empty(&queue->list_head))
- return XGE_QUEUE_IS_EMPTY;
-
- elem = (xge_queue_item_t *)queue->list_head.next;
- if (elem->data_size > data_max_size)
- return XGE_QUEUE_NOT_ENOUGH_SPACE;
-
- xge_list_remove(&elem->item);
- real_size = elem->data_size + sizeof(xge_queue_item_t);
- if (queue->head_ptr == elem) {
- queue->head_ptr = (char *)queue->head_ptr + real_size;
- xge_debug_queue(XGE_TRACE,
- "event_type: %d removing from the head: "
- "0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT
- ":0x"XGE_OS_LLXFMT" elem 0x"XGE_OS_LLXFMT" length %d",
- elem->event_type,
- (u64)(ulong_t)queue->start_ptr,
- (u64)(ulong_t)queue->head_ptr,
- (u64)(ulong_t)queue->tail_ptr,
- (u64)(ulong_t)queue->end_ptr,
- (u64)(ulong_t)elem,
- real_size);
- } else if ((char *)queue->tail_ptr - real_size == (char*)elem) {
- queue->tail_ptr = (char *)queue->tail_ptr - real_size;
- xge_debug_queue(XGE_TRACE,
- "event_type: %d removing from the tail: "
- "0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT
- ":0x"XGE_OS_LLXFMT" elem 0x"XGE_OS_LLXFMT" length %d",
- elem->event_type,
- (u64)(ulong_t)queue->start_ptr,
- (u64)(ulong_t)queue->head_ptr,
- (u64)(ulong_t)queue->tail_ptr,
- (u64)(ulong_t)queue->end_ptr,
- (u64)(ulong_t)elem,
- real_size);
- } else {
- xge_debug_queue(XGE_TRACE,
- "event_type: %d removing from the list: "
- "0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT
- ":0x"XGE_OS_LLXFMT" elem 0x"XGE_OS_LLXFMT" length %d",
- elem->event_type,
- (u64)(ulong_t)queue->start_ptr,
- (u64)(ulong_t)queue->head_ptr,
- (u64)(ulong_t)queue->tail_ptr,
- (u64)(ulong_t)queue->end_ptr,
- (u64)(ulong_t)elem,
- real_size);
- }
- xge_assert(queue->tail_ptr >= queue->head_ptr);
- xge_assert(queue->tail_ptr >= queue->start_ptr &&
- queue->tail_ptr <= queue->end_ptr);
- xge_assert(queue->head_ptr >= queue->start_ptr &&
- queue->head_ptr < queue->end_ptr);
- xge_os_memcpy(item, elem, sizeof(xge_queue_item_t));
- xge_os_memcpy(xge_queue_item_data(item), xge_queue_item_data(elem),
- elem->data_size);
-
- if (xge_list_is_empty(&queue->list_head)) {
- /* reset buffer pointers just to be clean */
- queue->head_ptr = queue->tail_ptr = queue->start_ptr;
- }
- return XGE_QUEUE_OK;
-}
-
-/**
- * xge_queue_produce - Enqueue an item (see xge_queue_item_t{})
- * into the specified queue.
- * @queueh: Queue handle.
- * @event_type: Event type. One of the enumerated event types
- * that both consumer and producer "understand".
- * For an example, please refer to xge_hal_event_e.
- * @context: Opaque (void*) "context", for instance event producer object.
- * @is_critical: For critical event, e.g. ECC.
- * @data_size: Size of the @data.
- * @data: User data of variable @data_size that is _copied_ into
- * the new queue item (see xge_queue_item_t{}). Upon return
- * from the call the @data memory can be re-used or released.
- *
- * Enqueue a new item.
- *
- * Returns: XGE_QUEUE_OK - success.
- * XGE_QUEUE_IS_FULL - Queue is full.
- * XGE_QUEUE_OUT_OF_MEMORY - Memory allocation failed.
- *
- * See also: xge_queue_item_t{}, xge_queue_consume().
- */
-xge_queue_status_e
-xge_queue_produce(xge_queue_h queueh, int event_type, void *context,
- int is_critical, const int data_size, void *data)
-{
- xge_queue_t *queue = (xge_queue_t *)queueh;
- int real_size = data_size + sizeof(xge_queue_item_t);
- xge_queue_item_t *elem;
- unsigned long flags = 0;
-
- xge_assert(real_size <= XGE_QUEUE_BUF_SIZE);
-
- xge_os_spin_lock_irq(&queue->lock, flags);
-
- if (is_critical && !queue->has_critical_event) {
- unsigned char item_buf[sizeof(xge_queue_item_t) +
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE];
- xge_queue_item_t *item = (xge_queue_item_t *)(void *)item_buf;
- xge_os_memzero(item_buf, (sizeof(xge_queue_item_t) +
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE));
-
- while (__queue_consume(queue,
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE,
- item) != XGE_QUEUE_IS_EMPTY)
- ; /* do nothing */
- }
-
-try_again:
- if ((char *)queue->tail_ptr + real_size <= (char *)queue->end_ptr) {
- elem = (xge_queue_item_t *) queue->tail_ptr;
- queue->tail_ptr = (void *)((char *)queue->tail_ptr + real_size);
- xge_debug_queue(XGE_TRACE,
- "event_type: %d adding to the tail: "
- "0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT
- ":0x"XGE_OS_LLXFMT" elem 0x"XGE_OS_LLXFMT" length %d",
- event_type,
- (u64)(ulong_t)queue->start_ptr,
- (u64)(ulong_t)queue->head_ptr,
- (u64)(ulong_t)queue->tail_ptr,
- (u64)(ulong_t)queue->end_ptr,
- (u64)(ulong_t)elem,
- real_size);
- } else if ((char *)queue->head_ptr - real_size >=
- (char *)queue->start_ptr) {
- elem = (xge_queue_item_t *) ((char *)queue->head_ptr - real_size);
- queue->head_ptr = elem;
- xge_debug_queue(XGE_TRACE,
- "event_type: %d adding to the head: "
- "0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT":0x"XGE_OS_LLXFMT
- ":0x"XGE_OS_LLXFMT" length %d",
- event_type,
- (u64)(ulong_t)queue->start_ptr,
- (u64)(ulong_t)queue->head_ptr,
- (u64)(ulong_t)queue->tail_ptr,
- (u64)(ulong_t)queue->end_ptr,
- real_size);
- } else {
- xge_queue_status_e status;
-
- if (queue->pages_current >= queue->pages_max) {
- xge_os_spin_unlock_irq(&queue->lock, flags);
- return XGE_QUEUE_IS_FULL;
- }
-
- if (queue->has_critical_event) {
- xge_os_spin_unlock_irq(&queue->lock, flags);
- return XGE_QUEUE_IS_FULL;
- }
-
- /* grow */
- status = __io_queue_grow(queueh);
- if (status != XGE_QUEUE_OK) {
- xge_os_spin_unlock_irq(&queue->lock, flags);
- return status;
- }
-
- goto try_again;
- }
- xge_assert(queue->tail_ptr >= queue->head_ptr);
- xge_assert(queue->tail_ptr >= queue->start_ptr &&
- queue->tail_ptr <= queue->end_ptr);
- xge_assert(queue->head_ptr >= queue->start_ptr &&
- queue->head_ptr < queue->end_ptr);
- elem->data_size = data_size;
- elem->event_type = (xge_hal_event_e) event_type;
- elem->is_critical = is_critical;
- if (is_critical)
- queue->has_critical_event = 1;
- elem->context = context;
- xge_os_memcpy(xge_queue_item_data(elem), data, data_size);
- xge_list_insert_before(&elem->item, &queue->list_head);
- xge_os_spin_unlock_irq(&queue->lock, flags);
-
- /* no lock taken! */
- queue->queued_func(queue->queued_data, event_type);
-
- return XGE_QUEUE_OK;
-}
-
-
-/**
- * xge_queue_create - Create protected first-in-first-out queue.
- * @pdev: PCI device handle.
- * @irqh: PCI device IRQ handle.
- * @pages_initial: Number of pages to be initially allocated at the
- * time of queue creation.
- * @pages_max: Max number of pages that can be allocated in the queue.
- * @queued: Optional callback function to be called each time a new item is
- * added to the queue.
- * @queued_data: Argument to the callback function.
- *
- * Create protected (fifo) queue.
- *
- * Returns: Pointer to xge_queue_t structure,
- * NULL - on failure.
- *
- * See also: xge_queue_item_t{}, xge_queue_destroy().
- */
-xge_queue_h
-xge_queue_create(pci_dev_h pdev, pci_irq_h irqh, int pages_initial,
- int pages_max, xge_queued_f queued, void *queued_data)
-{
- xge_queue_t *queue;
-
- if ((queue = (xge_queue_t *) xge_os_malloc(pdev, sizeof(xge_queue_t))) == NULL)
- return NULL;
-
- queue->queued_func = queued;
- queue->queued_data = queued_data;
- queue->pdev = pdev;
- queue->irqh = irqh;
- queue->pages_current = pages_initial;
- queue->start_ptr = xge_os_malloc(pdev, queue->pages_current *
- XGE_QUEUE_BUF_SIZE);
- if (queue->start_ptr == NULL) {
- xge_os_free(pdev, queue, sizeof(xge_queue_t));
- return NULL;
- }
- queue->head_ptr = queue->tail_ptr = queue->start_ptr;
- queue->end_ptr = (char *)queue->start_ptr +
- queue->pages_current * XGE_QUEUE_BUF_SIZE;
- xge_os_spin_lock_init_irq(&queue->lock, irqh);
- queue->pages_initial = pages_initial;
- queue->pages_max = pages_max;
- xge_list_init(&queue->list_head);
-
- return queue;
-}
-
-/**
- * xge_queue_destroy - Destroy xge_queue_t object.
- * @queueh: Queue handle.
- *
- * Destroy the specified xge_queue_t object.
- *
- * See also: xge_queue_item_t{}, xge_queue_create().
- */
-void xge_queue_destroy(xge_queue_h queueh)
-{
- xge_queue_t *queue = (xge_queue_t *)queueh;
- xge_os_spin_lock_destroy_irq(&queue->lock, queue->irqh);
- if (!xge_list_is_empty(&queue->list_head)) {
- xge_debug_queue(XGE_ERR, "destroying non-empty queue 0x"
- XGE_OS_LLXFMT, (u64)(ulong_t)queue);
- }
- xge_os_free(queue->pdev, queue->start_ptr, queue->pages_current *
- XGE_QUEUE_BUF_SIZE);
-
- xge_os_free(queue->pdev, queue, sizeof(xge_queue_t));
-}
-
-/*
- * __io_queue_grow - Dynamically increases the size of the queue.
- * @queueh: Queue handle.
- *
- * This function is called in the case of no slot avaialble in the queue
- * to accomodate the newly received event.
- * Note that queue cannot grow beyond the max size specified for the
- * queue.
- *
- * Returns XGE_QUEUE_OK: On success.
- * XGE_QUEUE_OUT_OF_MEMORY : No memory is available.
- */
-xge_queue_status_e
-__io_queue_grow(xge_queue_h queueh)
-{
- xge_queue_t *queue = (xge_queue_t *)queueh;
- void *newbuf, *oldbuf;
- xge_list_t *item;
- xge_queue_item_t *elem;
-
- xge_debug_queue(XGE_TRACE, "queue 0x"XGE_OS_LLXFMT":%d is growing",
- (u64)(ulong_t)queue, queue->pages_current);
-
- newbuf = xge_os_malloc(queue->pdev,
- (queue->pages_current + 1) * XGE_QUEUE_BUF_SIZE);
- if (newbuf == NULL)
- return XGE_QUEUE_OUT_OF_MEMORY;
-
- xge_os_memcpy(newbuf, queue->start_ptr,
- queue->pages_current * XGE_QUEUE_BUF_SIZE);
- oldbuf = queue->start_ptr;
-
- /* adjust queue sizes */
- queue->start_ptr = newbuf;
- queue->end_ptr = (char *)newbuf +
- (queue->pages_current + 1) * XGE_QUEUE_BUF_SIZE;
- queue->tail_ptr = (char *)newbuf + ((char *)queue->tail_ptr -
- (char *)oldbuf);
- queue->head_ptr = (char *)newbuf + ((char *)queue->head_ptr -
- (char *)oldbuf);
- xge_assert(!xge_list_is_empty(&queue->list_head));
- queue->list_head.next = (xge_list_t *) (void *)((char *)newbuf +
- ((char *)queue->list_head.next - (char *)oldbuf));
- queue->list_head.prev = (xge_list_t *) (void *)((char *)newbuf +
- ((char *)queue->list_head.prev - (char *)oldbuf));
- /* adjust queue list */
- xge_list_for_each(item, &queue->list_head) {
- elem = xge_container_of(item, xge_queue_item_t, item);
- if (elem->item.next != &queue->list_head) {
- elem->item.next =
- (xge_list_t*)(void *)((char *)newbuf +
- ((char *)elem->item.next - (char *)oldbuf));
- }
- if (elem->item.prev != &queue->list_head) {
- elem->item.prev =
- (xge_list_t*) (void *)((char *)newbuf +
- ((char *)elem->item.prev - (char *)oldbuf));
- }
- }
- xge_os_free(queue->pdev, oldbuf,
- queue->pages_current * XGE_QUEUE_BUF_SIZE);
- queue->pages_current++;
-
- return XGE_QUEUE_OK;
-}
-
-/**
- * xge_queue_consume - Dequeue an item from the specified queue.
- * @queueh: Queue handle.
- * @data_max_size: Maximum expected size of the item.
- * @item: Memory area into which the item is _copied_ upon return
- * from the function.
- *
- * Dequeue an item from the queue. The caller is required to provide
- * enough space for the item.
- *
- * Returns: XGE_QUEUE_OK - success.
- * XGE_QUEUE_IS_EMPTY - Queue is empty.
- * XGE_QUEUE_NOT_ENOUGH_SPACE - Requested item size(@data_max_size)
- * is too small to accomodate an item from the queue.
- *
- * See also: xge_queue_item_t{}, xge_queue_produce().
- */
-xge_queue_status_e
-xge_queue_consume(xge_queue_h queueh, int data_max_size, xge_queue_item_t *item)
-{
- xge_queue_t *queue = (xge_queue_t *)queueh;
- unsigned long flags = 0;
- xge_queue_status_e status;
-
- xge_os_spin_lock_irq(&queue->lock, flags);
- status = __queue_consume(queue, data_max_size, item);
- xge_os_spin_unlock_irq(&queue->lock, flags);
-
- return status;
-}
-
-
-/**
- * xge_queue_flush - Flush, or empty, the queue.
- * @queueh: Queue handle.
- *
- * Flush the queue, i.e. make it empty by consuming all events
- * without invoking the event processing logic (callbacks, etc.)
- */
-void xge_queue_flush(xge_queue_h queueh)
-{
- unsigned char item_buf[sizeof(xge_queue_item_t) +
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE];
- xge_queue_item_t *item = (xge_queue_item_t *)(void *)item_buf;
- xge_os_memzero(item_buf, (sizeof(xge_queue_item_t) +
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE));
-
- /* flush queue by consuming all enqueued items */
- while (xge_queue_consume(queueh,
- XGE_DEFAULT_EVENT_MAX_DATA_SIZE,
- item) != XGE_QUEUE_IS_EMPTY) {
- /* do nothing */
- xge_debug_queue(XGE_TRACE, "item "XGE_OS_LLXFMT"(%d) flushed",
- item, item->event_type);
- }
- (void) __queue_get_reset_critical (queueh);
-}
-
-/*
- * __queue_get_reset_critical - Check for critical events in the queue,
- * @qh: Queue handle.
- *
- * Check for critical event(s) in the queue, and reset the
- * "has-critical-event" flag upon return.
- * Returns: 1 - if the queue contains atleast one critical event.
- * 0 - If there are no critical events in the queue.
- */
-int __queue_get_reset_critical (xge_queue_h qh) {
- xge_queue_t* queue = (xge_queue_t*)qh;
- int c = queue->has_critical_event;
-
- queue->has_critical_event = 0;
- return c;
-}
diff --git a/sys/dev/nxge/xgehal/xgehal-channel-fp.c b/sys/dev/nxge/xgehal/xgehal-channel-fp.c
deleted file mode 100644
index b03c63b512d6..000000000000
--- a/sys/dev/nxge/xgehal/xgehal-channel-fp.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifdef XGE_DEBUG_FP
-#include <dev/nxge/include/xgehal-channel.h>
-#endif
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_channel_dtr_alloc(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh)
-{
- void **tmp_arr;
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- unsigned long flags = 0;
-#endif
- if (channel->terminating) {
- return XGE_HAL_FAIL;
- }
-
- if (channel->reserve_length - channel->reserve_top >
- channel->reserve_threshold) {
-
-_alloc_after_swap:
- *dtrh = channel->reserve_arr[--channel->reserve_length];
-
- xge_debug_channel(XGE_TRACE, "dtrh 0x"XGE_OS_LLXFMT" allocated, "
- "channel %d:%d:%d, reserve_idx %d",
- (unsigned long long)(ulong_t)*dtrh,
- channel->type, channel->post_qid,
- channel->compl_qid, channel->reserve_length);
-
- return XGE_HAL_OK;
- }
-
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- xge_os_spin_lock_irq(&channel->free_lock, flags);
-#elif defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- xge_os_spin_lock(&channel->free_lock);
-#endif
-
- /* switch between empty and full arrays */
-
- /* the idea behind such a design is that by having free and reserved
- * arrays separated we basically separated irq and non-irq parts.
- * i.e. no additional lock need to be done when we free a resource */
-
- if (channel->reserve_initial - channel->free_length >
- channel->reserve_threshold) {
-
- tmp_arr = channel->reserve_arr;
- channel->reserve_arr = channel->free_arr;
- channel->reserve_length = channel->reserve_initial;
- channel->free_arr = tmp_arr;
- channel->reserve_top = channel->free_length;
- channel->free_length = channel->reserve_initial;
-
- channel->stats.reserve_free_swaps_cnt++;
-
- xge_debug_channel(XGE_TRACE,
- "switch on channel %d:%d:%d, reserve_length %d, "
- "free_length %d", channel->type, channel->post_qid,
- channel->compl_qid, channel->reserve_length,
- channel->free_length);
-
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- xge_os_spin_unlock_irq(&channel->free_lock, flags);
-#elif defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- xge_os_spin_unlock(&channel->free_lock);
-#endif
-
- goto _alloc_after_swap;
- }
-
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- xge_os_spin_unlock_irq(&channel->free_lock, flags);
-#elif defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- xge_os_spin_unlock(&channel->free_lock);
-#endif
-
- xge_debug_channel(XGE_TRACE, "channel %d:%d:%d is empty!",
- channel->type, channel->post_qid,
- channel->compl_qid);
-
- channel->stats.full_cnt++;
-
- *dtrh = NULL;
- return XGE_HAL_INF_OUT_OF_DESCRIPTORS;
-}
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_restore(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh,
- int offset)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- /* restore a previously allocated dtrh at current offset and update
- * the available reserve length accordingly. If dtrh is null just
- * update the reserve length, only */
-
- if (dtrh) {
- channel->reserve_arr[channel->reserve_length + offset] = dtrh;
- xge_debug_channel(XGE_TRACE, "dtrh 0x"XGE_OS_LLXFMT" restored for "
- "channel %d:%d:%d, offset %d at reserve index %d, ",
- (unsigned long long)(ulong_t)dtrh, channel->type,
- channel->post_qid, channel->compl_qid, offset,
- channel->reserve_length + offset);
- }
- else {
- channel->reserve_length += offset;
- xge_debug_channel(XGE_TRACE, "channel %d:%d:%d, restored "
- "for offset %d, new reserve_length %d, free length %d",
- channel->type, channel->post_qid, channel->compl_qid,
- offset, channel->reserve_length, channel->free_length);
- }
-}
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_post(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t*)channelh;
-
- xge_assert(channel->work_arr[channel->post_index] == NULL);
-
- channel->work_arr[channel->post_index++] = dtrh;
-
- /* wrap-around */
- if (channel->post_index == channel->length)
- channel->post_index = 0;
-}
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_try_complete(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- xge_assert(channel->work_arr);
- xge_assert(channel->compl_index < channel->length);
-
- *dtrh = channel->work_arr[channel->compl_index];
-}
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_complete(xge_hal_channel_h channelh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- channel->work_arr[channel->compl_index] = NULL;
-
- /* wrap-around */
- if (++channel->compl_index == channel->length)
- channel->compl_index = 0;
-
- channel->stats.total_compl_cnt++;
-}
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_channel_dtr_free(xge_hal_channel_h channelh, xge_hal_dtr_h dtrh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- channel->free_arr[--channel->free_length] = dtrh;
-
- xge_debug_channel(XGE_TRACE, "dtrh 0x"XGE_OS_LLXFMT" freed, "
- "channel %d:%d:%d, new free_length %d",
- (unsigned long long)(ulong_t)dtrh,
- channel->type, channel->post_qid,
- channel->compl_qid, channel->free_length);
-}
-
-/**
- * xge_hal_channel_dtr_count
- * @channelh: Channel handle. Obtained via xge_hal_channel_open().
- *
- * Retreive number of DTRs available. This function can not be called
- * from data path.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_channel_dtr_count(xge_hal_channel_h channelh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- return ((channel->reserve_length - channel->reserve_top) +
- (channel->reserve_initial - channel->free_length) -
- channel->reserve_threshold);
-}
-
-/**
- * xge_hal_channel_userdata - Get user-specified channel context.
- * @channelh: Channel handle. Obtained via xge_hal_channel_open().
- *
- * Returns: per-channel "user data", which can be any ULD-defined context.
- * The %userdata "gets" into the channel at open time
- * (see xge_hal_channel_open()).
- *
- * See also: xge_hal_channel_open().
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void*
-xge_hal_channel_userdata(xge_hal_channel_h channelh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- return channel->userdata;
-}
-
-/**
- * xge_hal_channel_id - Get channel ID.
- * @channelh: Channel handle. Obtained via xge_hal_channel_open().
- *
- * Returns: channel ID. For link layer channel id is the number
- * in the range from 0 to 7 that identifies hardware ring or fifo,
- * depending on the channel type.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_channel_id(xge_hal_channel_h channelh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- return channel->post_qid;
-}
-
-/**
- * xge_hal_check_alignment - Check buffer alignment and calculate the
- * "misaligned" portion.
- * @dma_pointer: DMA address of the buffer.
- * @size: Buffer size, in bytes.
- * @alignment: Alignment "granularity" (see below), in bytes.
- * @copy_size: Maximum number of bytes to "extract" from the buffer
- * (in order to spost it as a separate scatter-gather entry). See below.
- *
- * Check buffer alignment and calculate "misaligned" portion, if exists.
- * The buffer is considered aligned if its address is multiple of
- * the specified @alignment. If this is the case,
- * xge_hal_check_alignment() returns zero.
- * Otherwise, xge_hal_check_alignment() uses the last argument,
- * @copy_size,
- * to calculate the size to "extract" from the buffer. The @copy_size
- * may or may not be equal @alignment. The difference between these two
- * arguments is that the @alignment is used to make the decision: aligned
- * or not aligned. While the @copy_size is used to calculate the portion
- * of the buffer to "extract", i.e. to post as a separate entry in the
- * transmit descriptor. For example, the combination
- * @alignment=8 and @copy_size=64 will work okay on AMD Opteron boxes.
- *
- * Note: @copy_size should be a multiple of @alignment. In many practical
- * cases @copy_size and @alignment will probably be equal.
- *
- * See also: xge_hal_fifo_dtr_buffer_set_aligned().
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-xge_hal_check_alignment(dma_addr_t dma_pointer, int size, int alignment,
- int copy_size)
-{
- int misaligned_size;
-
- misaligned_size = (int)(dma_pointer & (alignment - 1));
- if (!misaligned_size) {
- return 0;
- }
-
- if (size > copy_size) {
- misaligned_size = (int)(dma_pointer & (copy_size - 1));
- misaligned_size = copy_size - misaligned_size;
- } else {
- misaligned_size = size;
- }
-
- return misaligned_size;
-}
-
diff --git a/sys/dev/nxge/xgehal/xgehal-channel.c b/sys/dev/nxge/xgehal/xgehal-channel.c
deleted file mode 100644
index 981e4c96fc47..000000000000
--- a/sys/dev/nxge/xgehal/xgehal-channel.c
+++ /dev/null
@@ -1,586 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <dev/nxge/include/xgehal-channel.h>
-#include <dev/nxge/include/xgehal-fifo.h>
-#include <dev/nxge/include/xgehal-ring.h>
-#include <dev/nxge/include/xgehal-device.h>
-#include <dev/nxge/include/xgehal-regs.h>
-
-/*
- * __hal_channel_dtr_next_reservelist
- *
- * Walking through the all available DTRs.
- */
-static xge_hal_status_e
-__hal_channel_dtr_next_reservelist(xge_hal_channel_h channelh,
- xge_hal_dtr_h *dtrh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- if (channel->reserve_top >= channel->reserve_length) {
- return XGE_HAL_INF_NO_MORE_FREED_DESCRIPTORS;
- }
-
- *dtrh = channel->reserve_arr[channel->reserve_top++];
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_channel_dtr_next_freelist
- *
- * Walking through the "freed" DTRs.
- */
-static xge_hal_status_e
-__hal_channel_dtr_next_freelist(xge_hal_channel_h channelh, xge_hal_dtr_h *dtrh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
-
- if (channel->reserve_initial == channel->free_length) {
- return XGE_HAL_INF_NO_MORE_FREED_DESCRIPTORS;
- }
-
- *dtrh = channel->free_arr[channel->free_length++];
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_channel_dtr_next_not_completed - Get the _next_ posted but
- * not completed descriptor.
- *
- * Walking through the "not completed" DTRs.
- */
-static xge_hal_status_e
-__hal_channel_dtr_next_not_completed(xge_hal_channel_h channelh,
- xge_hal_dtr_h *dtrh)
-{
- xge_hal_ring_rxd_1_t *rxdp; /* doesn't matter 1, 3 or 5... */
- __hal_channel_dtr_try_complete(channelh, dtrh);
- if (*dtrh == NULL) {
- return XGE_HAL_INF_NO_MORE_COMPLETED_DESCRIPTORS;
- }
-
- rxdp = (xge_hal_ring_rxd_1_t *)*dtrh;
- xge_assert(rxdp->host_control!=0);
-
- __hal_channel_dtr_complete(channelh);
-
- return XGE_HAL_OK;
-}
-
-xge_hal_channel_t*
-__hal_channel_allocate(xge_hal_device_h devh, int post_qid,
- xge_hal_channel_type_e type)
-{
- xge_hal_device_t *hldev = (xge_hal_device_t*)devh;
- xge_hal_channel_t *channel;
- int size = 0;
-
- switch(type) {
- case XGE_HAL_CHANNEL_TYPE_FIFO:
- xge_assert(post_qid + 1 >= XGE_HAL_MIN_FIFO_NUM &&
- post_qid + 1 <= XGE_HAL_MAX_FIFO_NUM);
- size = sizeof(xge_hal_fifo_t);
- break;
- case XGE_HAL_CHANNEL_TYPE_RING:
- xge_assert(post_qid + 1 >= XGE_HAL_MIN_RING_NUM &&
- post_qid + 1 <= XGE_HAL_MAX_RING_NUM);
- size = sizeof(xge_hal_ring_t);
- break;
- default :
- xge_assert(size);
- break;
-
- }
-
-
- /* allocate FIFO channel */
- channel = (xge_hal_channel_t *) xge_os_malloc(hldev->pdev, size);
- if (channel == NULL) {
- return NULL;
- }
- xge_os_memzero(channel, size);
-
- channel->pdev = hldev->pdev;
- channel->regh0 = hldev->regh0;
- channel->regh1 = hldev->regh1;
- channel->type = type;
- channel->devh = devh;
- channel->post_qid = post_qid;
- channel->compl_qid = 0;
-
- return channel;
-}
-
-void __hal_channel_free(xge_hal_channel_t *channel)
-{
- int size = 0;
-
- xge_assert(channel->pdev);
-
- switch(channel->type) {
- case XGE_HAL_CHANNEL_TYPE_FIFO:
- size = sizeof(xge_hal_fifo_t);
- break;
- case XGE_HAL_CHANNEL_TYPE_RING:
- size = sizeof(xge_hal_ring_t);
- break;
- case XGE_HAL_CHANNEL_TYPE_SEND_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE:
- xge_assert(size);
- break;
- default:
- break;
- }
-
- xge_os_free(channel->pdev, channel, size);
-}
-
-xge_hal_status_e
-__hal_channel_initialize (xge_hal_channel_h channelh,
- xge_hal_channel_attr_t *attr, void **reserve_arr,
- int reserve_initial, int reserve_max, int reserve_threshold)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
- xge_hal_device_t *hldev;
-
- hldev = (xge_hal_device_t *)channel->devh;
-
- channel->dtr_term = attr->dtr_term;
- channel->dtr_init = attr->dtr_init;
- channel->callback = attr->callback;
- channel->userdata = attr->userdata;
- channel->flags = attr->flags;
- channel->per_dtr_space = attr->per_dtr_space;
-
- channel->reserve_arr = reserve_arr;
- channel->reserve_initial = reserve_initial;
- channel->reserve_max = reserve_max;
- channel->reserve_length = channel->reserve_initial;
- channel->reserve_threshold = reserve_threshold;
- channel->reserve_top = 0;
- channel->saved_arr = (void **) xge_os_malloc(hldev->pdev,
- sizeof(void*)*channel->reserve_max);
- if (channel->saved_arr == NULL) {
- return XGE_HAL_ERR_OUT_OF_MEMORY;
- }
- xge_os_memzero(channel->saved_arr, sizeof(void*)*channel->reserve_max);
- channel->free_arr = channel->saved_arr;
- channel->free_length = channel->reserve_initial;
- channel->work_arr = (void **) xge_os_malloc(hldev->pdev,
- sizeof(void*)*channel->reserve_max);
- if (channel->work_arr == NULL) {
- return XGE_HAL_ERR_OUT_OF_MEMORY;
- }
- xge_os_memzero(channel->work_arr,
- sizeof(void*)*channel->reserve_max);
- channel->post_index = 0;
- channel->compl_index = 0;
- channel->length = channel->reserve_initial;
-
- channel->orig_arr = (void **) xge_os_malloc(hldev->pdev,
- sizeof(void*)*channel->reserve_max);
- if (channel->orig_arr == NULL)
- return XGE_HAL_ERR_OUT_OF_MEMORY;
-
- xge_os_memzero(channel->orig_arr, sizeof(void*)*channel->reserve_max);
-
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- xge_os_spin_lock_init_irq(&channel->free_lock, hldev->irqh);
-#elif defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- xge_os_spin_lock_init(&channel->free_lock, hldev->pdev);
-#endif
-
- return XGE_HAL_OK;
-}
-
-void __hal_channel_terminate(xge_hal_channel_h channelh)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
- xge_hal_device_t *hldev;
-
- hldev = (xge_hal_device_t *)channel->devh;
-
- xge_assert(channel->pdev);
- /* undo changes made at channel_initialize() */
- if (channel->work_arr) {
- xge_os_free(channel->pdev, channel->work_arr,
- sizeof(void*)*channel->reserve_max);
- channel->work_arr = NULL;
- }
-
- if (channel->saved_arr) {
- xge_os_free(channel->pdev, channel->saved_arr,
- sizeof(void*)*channel->reserve_max);
- channel->saved_arr = NULL;
- }
-
- if (channel->orig_arr) {
- xge_os_free(channel->pdev, channel->orig_arr,
- sizeof(void*)*channel->reserve_max);
- channel->orig_arr = NULL;
- }
-
-#if defined(XGE_HAL_RX_MULTI_FREE_IRQ) || defined(XGE_HAL_TX_MULTI_FREE_IRQ)
- xge_os_spin_lock_destroy_irq(&channel->free_lock, hldev->irqh);
-#elif defined(XGE_HAL_RX_MULTI_FREE) || defined(XGE_HAL_TX_MULTI_FREE)
- xge_os_spin_lock_destroy(&channel->free_lock, hldev->pdev);
-#endif
-}
-
-/**
- * xge_hal_channel_open - Open communication channel.
- * @devh: HAL device, pointer to xge_hal_device_t structure.
- * @attr: Contains attributes required to open
- * the channel.
- * @channelh: The channel handle. On success (XGE_HAL_OK) HAL fills
- * this "out" parameter with a valid channel handle.
- * @reopen: See xge_hal_channel_reopen_e{}.
- *
- * Open communication channel with the device.
- *
- * HAL uses (persistent) channel configuration to allocate both channel
- * and Xframe Tx and Rx descriptors.
- * Notes:
- * 1) The channel config data is fed into HAL prior to
- * xge_hal_channel_open().
- *
- * 2) The corresponding hardware queues must be already configured and
- * enabled.
- *
- * 3) Either down or up queue may be omitted, in which case the channel
- * is treated as _unidirectional_.
- *
- * 4) Post and completion queue may be the same, in which case the channel
- * is said to have "in-band completions".
- *
- * Note that free_channels list is not protected. i.e. caller must provide
- * safe context.
- *
- * Returns: XGE_HAL_OK - success.
- * XGE_HAL_ERR_CHANNEL_NOT_FOUND - Unable to locate the channel.
- * XGE_HAL_ERR_OUT_OF_MEMORY - Memory allocation failed.
- *
- * See also: xge_hal_channel_attr_t{}.
- * Usage: See ex_open{}.
- */
-xge_hal_status_e
-xge_hal_channel_open(xge_hal_device_h devh,
- xge_hal_channel_attr_t *attr,
- xge_hal_channel_h *channelh,
- xge_hal_channel_reopen_e reopen)
-{
- xge_list_t *item;
- int i;
- xge_hal_status_e status = XGE_HAL_OK;
- xge_hal_channel_t *channel = NULL;
- xge_hal_device_t *device = (xge_hal_device_t *)devh;
-
- xge_assert(device);
- xge_assert(attr);
-
- *channelh = NULL;
-
- /* find channel */
- xge_list_for_each(item, &device->free_channels) {
- xge_hal_channel_t *tmp;
-
- tmp = xge_container_of(item, xge_hal_channel_t, item);
- if (tmp->type == attr->type &&
- tmp->post_qid == attr->post_qid &&
- tmp->compl_qid == attr->compl_qid) {
- channel = tmp;
- break;
- }
- }
-
- if (channel == NULL) {
- return XGE_HAL_ERR_CHANNEL_NOT_FOUND;
- }
-
- xge_assert((channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) ||
- (channel->type == XGE_HAL_CHANNEL_TYPE_RING));
-
- if (reopen == XGE_HAL_CHANNEL_OC_NORMAL) {
- /* allocate memory, initialize pointers, etc */
- switch(channel->type) {
- case XGE_HAL_CHANNEL_TYPE_FIFO:
- status = __hal_fifo_open(channel, attr);
- break;
- case XGE_HAL_CHANNEL_TYPE_RING:
- status = __hal_ring_open(channel, attr);
- break;
- case XGE_HAL_CHANNEL_TYPE_SEND_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE:
- status = XGE_HAL_FAIL;
- break;
- default:
- break;
- }
-
- if (status == XGE_HAL_OK) {
- for (i = 0; i < channel->reserve_initial; i++) {
- channel->orig_arr[i] =
- channel->reserve_arr[i];
- }
- }
- else
- return status;
- } else {
- xge_assert(reopen == XGE_HAL_CHANNEL_RESET_ONLY);
-
- for (i = 0; i < channel->reserve_initial; i++) {
- channel->reserve_arr[i] = channel->orig_arr[i];
- channel->free_arr[i] = NULL;
- }
- channel->free_length = channel->reserve_initial;
- channel->reserve_length = channel->reserve_initial;
- channel->reserve_top = 0;
- channel->post_index = 0;
- channel->compl_index = 0;
- if (channel->type == XGE_HAL_CHANNEL_TYPE_RING) {
- status = __hal_ring_initial_replenish(channel,
- reopen);
- if (status != XGE_HAL_OK)
- return status;
- }
- }
-
- /* move channel to the open state list */
-
- switch(channel->type) {
- case XGE_HAL_CHANNEL_TYPE_FIFO:
- xge_list_remove(&channel->item);
- xge_list_insert(&channel->item, &device->fifo_channels);
- break;
- case XGE_HAL_CHANNEL_TYPE_RING:
- xge_list_remove(&channel->item);
- xge_list_insert(&channel->item, &device->ring_channels);
- break;
- case XGE_HAL_CHANNEL_TYPE_SEND_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE:
- xge_assert(channel->type == XGE_HAL_CHANNEL_TYPE_FIFO ||
- channel->type == XGE_HAL_CHANNEL_TYPE_RING);
- break;
- default:
- break;
- }
- channel->is_open = 1;
- channel->terminating = 0;
- /*
- * The magic check the argument validity, has to be
- * removed before 03/01/2005.
- */
- channel->magic = XGE_HAL_MAGIC;
-
- *channelh = channel;
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_channel_abort - Abort the channel.
- * @channelh: Channel handle.
- * @reopen: See xge_hal_channel_reopen_e{}.
- *
- * Terminate (via xge_hal_channel_dtr_term_f{}) all channel descriptors.
- * Currently used internally only by HAL, as part of its
- * xge_hal_channel_close() and xge_hal_channel_open() in case
- * of fatal error.
- *
- * See also: xge_hal_channel_dtr_term_f{}.
- */
-void xge_hal_channel_abort(xge_hal_channel_h channelh,
- xge_hal_channel_reopen_e reopen)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
- xge_hal_dtr_h dtr;
-#ifdef XGE_OS_MEMORY_CHECK
- int check_cnt = 0;
-#endif
- int free_length_sav;
- int reserve_top_sav;
-
- if (channel->dtr_term == NULL) {
- return;
- }
-
- free_length_sav = channel->free_length;
- while (__hal_channel_dtr_next_freelist(channelh, &dtr) == XGE_HAL_OK) {
-#ifdef XGE_OS_MEMORY_CHECK
-#ifdef XGE_DEBUG_ASSERT
- if (channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) {
- xge_assert(!__hal_fifo_txdl_priv(dtr)->allocated);
- } else {
- if (channel->type == XGE_HAL_CHANNEL_TYPE_RING) {
- xge_assert(!__hal_ring_rxd_priv((xge_hal_ring_t * ) channelh, dtr)->allocated);
- }
- }
-#endif
- check_cnt++;
-#endif
- channel->dtr_term(channel, dtr, XGE_HAL_DTR_STATE_FREED,
- channel->userdata, reopen);
- }
- channel->free_length = free_length_sav;
-
- while (__hal_channel_dtr_next_not_completed(channelh, &dtr) ==
- XGE_HAL_OK) {
-#ifdef XGE_OS_MEMORY_CHECK
-#ifdef XGE_DEBUG_ASSERT
- if (channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) {
- xge_assert(__hal_fifo_txdl_priv(dtr)->allocated);
- } else {
- if (channel->type == XGE_HAL_CHANNEL_TYPE_RING) {
- xge_assert(__hal_ring_rxd_priv((xge_hal_ring_t * ) channelh, dtr)
- ->allocated);
- }
- }
-#endif
- check_cnt++;
-#endif
- channel->dtr_term(channel, dtr, XGE_HAL_DTR_STATE_POSTED,
- channel->userdata, reopen);
-
- }
-
- reserve_top_sav = channel->reserve_top;
- while (__hal_channel_dtr_next_reservelist(channelh, &dtr) ==
- XGE_HAL_OK) {
-#ifdef XGE_OS_MEMORY_CHECK
-#ifdef XGE_DEBUG_ASSERT
- if (channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) {
- xge_assert(!__hal_fifo_txdl_priv(dtr)->allocated);
- } else {
- if (channel->type == XGE_HAL_CHANNEL_TYPE_RING) {
- xge_assert(!__hal_ring_rxd_priv((xge_hal_ring_t * ) channelh, dtr)->allocated);
- }
- }
-#endif
- check_cnt++;
-#endif
- channel->dtr_term(channel, dtr, XGE_HAL_DTR_STATE_AVAIL,
- channel->userdata, reopen);
- }
- channel->reserve_top = reserve_top_sav;
-
- xge_assert(channel->reserve_length ==
- (channel->free_length + channel->reserve_top));
-
-#ifdef XGE_OS_MEMORY_CHECK
- xge_assert(check_cnt == channel->reserve_initial);
-#endif
-
-}
-
-/**
- * xge_hal_channel_close - Close communication channel.
- * @channelh: The channel handle.
- * @reopen: See xge_hal_channel_reopen_e{}.
- *
- * Will close previously opened channel and deallocate associated resources.
- * Channel must be opened otherwise assert will be generated.
- * Note that free_channels list is not protected. i.e. caller must provide
- * safe context.
- */
-void xge_hal_channel_close(xge_hal_channel_h channelh,
- xge_hal_channel_reopen_e reopen)
-{
- xge_hal_channel_t *channel = (xge_hal_channel_t *)channelh;
- xge_hal_device_t *hldev;
- xge_list_t *item;
- xge_assert(channel);
- xge_assert(channel->type < XGE_HAL_CHANNEL_TYPE_MAX);
-
- hldev = (xge_hal_device_t *)channel->devh;
- channel->is_open = 0;
- channel->magic = XGE_HAL_DEAD;
-
- /* sanity check: make sure channel is not in free list */
- xge_list_for_each(item, &hldev->free_channels) {
- xge_hal_channel_t *tmp;
-
- tmp = xge_container_of(item, xge_hal_channel_t, item);
- xge_assert(!tmp->is_open);
- if (channel == tmp) {
- return;
- }
- }
-
- xge_hal_channel_abort(channel, reopen);
-
- xge_assert((channel->type == XGE_HAL_CHANNEL_TYPE_FIFO) ||
- (channel->type == XGE_HAL_CHANNEL_TYPE_RING));
-
- if (reopen == XGE_HAL_CHANNEL_OC_NORMAL) {
- /* de-allocate */
- switch(channel->type) {
- case XGE_HAL_CHANNEL_TYPE_FIFO:
- __hal_fifo_close(channelh);
- break;
- case XGE_HAL_CHANNEL_TYPE_RING:
- __hal_ring_close(channelh);
- break;
- case XGE_HAL_CHANNEL_TYPE_SEND_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_RECEIVE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_COMPLETION_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_UP_MESSAGE_QUEUE:
- case XGE_HAL_CHANNEL_TYPE_DOWN_MESSAGE_QUEUE:
- xge_assert(channel->type == XGE_HAL_CHANNEL_TYPE_FIFO ||
- channel->type == XGE_HAL_CHANNEL_TYPE_RING);
- break;
- default:
- break;
- }
- }
- else
- xge_assert(reopen == XGE_HAL_CHANNEL_RESET_ONLY);
-
- /* move channel back to free state list */
- xge_list_remove(&channel->item);
- xge_list_insert(&channel->item, &hldev->free_channels);
-
- if (xge_list_is_empty(&hldev->fifo_channels) &&
- xge_list_is_empty(&hldev->ring_channels)) {
- /* clear msix_idx in case of following HW reset */
- hldev->reset_needed_after_close = 1;
- }
-}
diff --git a/sys/dev/nxge/xgehal/xgehal-config.c b/sys/dev/nxge/xgehal/xgehal-config.c
deleted file mode 100644
index 86beb46eda57..000000000000
--- a/sys/dev/nxge/xgehal/xgehal-config.c
+++ /dev/null
@@ -1,755 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#include <dev/nxge/include/xgehal-config.h>
-#include <dev/nxge/include/xge-debug.h>
-
-/*
- * __hal_tti_config_check - Check tti configuration
- * @new_config: tti configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_tti_config_check (xge_hal_tti_config_t *new_config)
-{
- if ((new_config->urange_a < XGE_HAL_MIN_TX_URANGE_A) ||
- (new_config->urange_a > XGE_HAL_MAX_TX_URANGE_A)) {
- return XGE_HAL_BADCFG_TX_URANGE_A;
- }
-
- if ((new_config->ufc_a < XGE_HAL_MIN_TX_UFC_A) ||
- (new_config->ufc_a > XGE_HAL_MAX_TX_UFC_A)) {
- return XGE_HAL_BADCFG_TX_UFC_A;
- }
-
- if ((new_config->urange_b < XGE_HAL_MIN_TX_URANGE_B) ||
- (new_config->urange_b > XGE_HAL_MAX_TX_URANGE_B)) {
- return XGE_HAL_BADCFG_TX_URANGE_B;
- }
-
- if ((new_config->ufc_b < XGE_HAL_MIN_TX_UFC_B) ||
- (new_config->ufc_b > XGE_HAL_MAX_TX_UFC_B)) {
- return XGE_HAL_BADCFG_TX_UFC_B;
- }
-
- if ((new_config->urange_c < XGE_HAL_MIN_TX_URANGE_C) ||
- (new_config->urange_c > XGE_HAL_MAX_TX_URANGE_C)) {
- return XGE_HAL_BADCFG_TX_URANGE_C;
- }
-
- if ((new_config->ufc_c < XGE_HAL_MIN_TX_UFC_C) ||
- (new_config->ufc_c > XGE_HAL_MAX_TX_UFC_C)) {
- return XGE_HAL_BADCFG_TX_UFC_C;
- }
-
- if ((new_config->ufc_d < XGE_HAL_MIN_TX_UFC_D) ||
- (new_config->ufc_d > XGE_HAL_MAX_TX_UFC_D)) {
- return XGE_HAL_BADCFG_TX_UFC_D;
- }
-
- if ((new_config->timer_val_us < XGE_HAL_MIN_TX_TIMER_VAL) ||
- (new_config->timer_val_us > XGE_HAL_MAX_TX_TIMER_VAL)) {
- return XGE_HAL_BADCFG_TX_TIMER_VAL;
- }
-
- if ((new_config->timer_ci_en < XGE_HAL_MIN_TX_TIMER_CI_EN) ||
- (new_config->timer_ci_en > XGE_HAL_MAX_TX_TIMER_CI_EN)) {
- return XGE_HAL_BADCFG_TX_TIMER_CI_EN;
- }
-
- if ((new_config->timer_ac_en < XGE_HAL_MIN_TX_TIMER_AC_EN) ||
- (new_config->timer_ac_en > XGE_HAL_MAX_TX_TIMER_AC_EN)) {
- return XGE_HAL_BADCFG_TX_TIMER_AC_EN;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_rti_config_check - Check rti configuration
- * @new_config: rti configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_rti_config_check (xge_hal_rti_config_t *new_config)
-{
- if ((new_config->urange_a < XGE_HAL_MIN_RX_URANGE_A) ||
- (new_config->urange_a > XGE_HAL_MAX_RX_URANGE_A)) {
- return XGE_HAL_BADCFG_RX_URANGE_A;
- }
-
- if ((new_config->ufc_a < XGE_HAL_MIN_RX_UFC_A) ||
- (new_config->ufc_a > XGE_HAL_MAX_RX_UFC_A)) {
- return XGE_HAL_BADCFG_RX_UFC_A;
- }
-
- if ((new_config->urange_b < XGE_HAL_MIN_RX_URANGE_B) ||
- (new_config->urange_b > XGE_HAL_MAX_RX_URANGE_B)) {
- return XGE_HAL_BADCFG_RX_URANGE_B;
- }
-
- if ((new_config->ufc_b < XGE_HAL_MIN_RX_UFC_B) ||
- (new_config->ufc_b > XGE_HAL_MAX_RX_UFC_B)) {
- return XGE_HAL_BADCFG_RX_UFC_B;
- }
-
- if ((new_config->urange_c < XGE_HAL_MIN_RX_URANGE_C) ||
- (new_config->urange_c > XGE_HAL_MAX_RX_URANGE_C)) {
- return XGE_HAL_BADCFG_RX_URANGE_C;
- }
-
- if ((new_config->ufc_c < XGE_HAL_MIN_RX_UFC_C) ||
- (new_config->ufc_c > XGE_HAL_MAX_RX_UFC_C)) {
- return XGE_HAL_BADCFG_RX_UFC_C;
- }
-
- if ((new_config->ufc_d < XGE_HAL_MIN_RX_UFC_D) ||
- (new_config->ufc_d > XGE_HAL_MAX_RX_UFC_D)) {
- return XGE_HAL_BADCFG_RX_UFC_D;
- }
-
- if ((new_config->timer_val_us < XGE_HAL_MIN_RX_TIMER_VAL) ||
- (new_config->timer_val_us > XGE_HAL_MAX_RX_TIMER_VAL)) {
- return XGE_HAL_BADCFG_RX_TIMER_VAL;
- }
-
- if ((new_config->timer_ac_en < XGE_HAL_MIN_RX_TIMER_AC_EN) ||
- (new_config->timer_ac_en > XGE_HAL_MAX_RX_TIMER_AC_EN)) {
- return XGE_HAL_BADCFG_RX_TIMER_AC_EN;
- }
-
- return XGE_HAL_OK;
-}
-
-
-/*
- * __hal_fifo_queue_check - Check fifo queue configuration
- * @new_config: fifo queue configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_fifo_queue_check (xge_hal_fifo_config_t *new_config,
- xge_hal_fifo_queue_t *new_queue)
-{
- int i;
-
- if ((new_queue->initial < XGE_HAL_MIN_FIFO_QUEUE_LENGTH) ||
- (new_queue->initial > XGE_HAL_MAX_FIFO_QUEUE_LENGTH)) {
- return XGE_HAL_BADCFG_FIFO_QUEUE_INITIAL_LENGTH;
- }
-
- /* FIXME: queue "grow" feature is not supported.
- * Use "initial" queue size as the "maximum";
- * Remove the next line when fixed. */
- new_queue->max = new_queue->initial;
-
- if ((new_queue->max < XGE_HAL_MIN_FIFO_QUEUE_LENGTH) ||
- (new_queue->max > XGE_HAL_MAX_FIFO_QUEUE_LENGTH)) {
- return XGE_HAL_BADCFG_FIFO_QUEUE_MAX_LENGTH;
- }
-
- if (new_queue->max < new_config->reserve_threshold) {
- return XGE_HAL_BADCFG_FIFO_RESERVE_THRESHOLD;
- }
-
- if ((new_queue->intr < XGE_HAL_MIN_FIFO_QUEUE_INTR) ||
- (new_queue->intr > XGE_HAL_MAX_FIFO_QUEUE_INTR)) {
- return XGE_HAL_BADCFG_FIFO_QUEUE_INTR;
- }
-
- if ((new_queue->intr_vector < XGE_HAL_MIN_FIFO_QUEUE_INTR_VECTOR) ||
- (new_queue->intr_vector > XGE_HAL_MAX_FIFO_QUEUE_INTR_VECTOR)) {
- return XGE_HAL_BADCFG_FIFO_QUEUE_INTR_VECTOR;
- }
-
- for(i = 0; i < XGE_HAL_MAX_FIFO_TTI_NUM; i++) {
- /*
- * Validate the tti configuration parameters only if
- * the TTI feature is enabled.
- */
- if (new_queue->tti[i].enabled) {
- xge_hal_status_e status;
-
- if ((status = __hal_tti_config_check(
- &new_queue->tti[i])) != XGE_HAL_OK) {
- return status;
- }
- }
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_ring_queue_check - Check ring queue configuration
- * @new_config: ring queue configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_ring_queue_check (xge_hal_ring_queue_t *new_config)
-{
-
- if ((new_config->initial < XGE_HAL_MIN_RING_QUEUE_BLOCKS) ||
- (new_config->initial > XGE_HAL_MAX_RING_QUEUE_BLOCKS)) {
- return XGE_HAL_BADCFG_RING_QUEUE_INITIAL_BLOCKS;
- }
-
- /* FIXME: queue "grow" feature is not supported.
- * Use "initial" queue size as the "maximum";
- * Remove the next line when fixed. */
- new_config->max = new_config->initial;
-
- if ((new_config->max < XGE_HAL_MIN_RING_QUEUE_BLOCKS) ||
- (new_config->max > XGE_HAL_MAX_RING_QUEUE_BLOCKS)) {
- return XGE_HAL_BADCFG_RING_QUEUE_MAX_BLOCKS;
- }
-
- if ((new_config->buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_1) &&
- (new_config->buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_3) &&
- (new_config->buffer_mode != XGE_HAL_RING_QUEUE_BUFFER_MODE_5)) {
- return XGE_HAL_BADCFG_RING_QUEUE_BUFFER_MODE;
- }
-
- /*
- * Herc has less DRAM; the check is done later inside
- * device_initialize()
- */
- if (((new_config->dram_size_mb < XGE_HAL_MIN_RING_QUEUE_SIZE) ||
- (new_config->dram_size_mb > XGE_HAL_MAX_RING_QUEUE_SIZE_XENA)) &&
- new_config->dram_size_mb != XGE_HAL_DEFAULT_USE_HARDCODE)
- return XGE_HAL_BADCFG_RING_QUEUE_SIZE;
-
- if ((new_config->backoff_interval_us <
- XGE_HAL_MIN_BACKOFF_INTERVAL_US) ||
- (new_config->backoff_interval_us >
- XGE_HAL_MAX_BACKOFF_INTERVAL_US)) {
- return XGE_HAL_BADCFG_BACKOFF_INTERVAL_US;
- }
-
- if ((new_config->max_frm_len < XGE_HAL_MIN_MAX_FRM_LEN) ||
- (new_config->max_frm_len > XGE_HAL_MAX_MAX_FRM_LEN)) {
- return XGE_HAL_BADCFG_MAX_FRM_LEN;
- }
-
- if ((new_config->priority < XGE_HAL_MIN_RING_PRIORITY) ||
- (new_config->priority > XGE_HAL_MAX_RING_PRIORITY)) {
- return XGE_HAL_BADCFG_RING_PRIORITY;
- }
-
- if ((new_config->rth_en < XGE_HAL_MIN_RING_RTH_EN) ||
- (new_config->rth_en > XGE_HAL_MAX_RING_RTH_EN)) {
- return XGE_HAL_BADCFG_RING_RTH_EN;
- }
-
- if ((new_config->rts_mac_en < XGE_HAL_MIN_RING_RTS_MAC_EN) ||
- (new_config->rts_mac_en > XGE_HAL_MAX_RING_RTS_MAC_EN)) {
- return XGE_HAL_BADCFG_RING_RTS_MAC_EN;
- }
-
- if ((new_config->rts_mac_en < XGE_HAL_MIN_RING_RTS_PORT_EN) ||
- (new_config->rts_mac_en > XGE_HAL_MAX_RING_RTS_PORT_EN)) {
- return XGE_HAL_BADCFG_RING_RTS_PORT_EN;
- }
-
- if ((new_config->intr_vector < XGE_HAL_MIN_RING_QUEUE_INTR_VECTOR) ||
- (new_config->intr_vector > XGE_HAL_MAX_RING_QUEUE_INTR_VECTOR)) {
- return XGE_HAL_BADCFG_RING_QUEUE_INTR_VECTOR;
- }
-
- if (new_config->indicate_max_pkts <
- XGE_HAL_MIN_RING_INDICATE_MAX_PKTS ||
- new_config->indicate_max_pkts >
- XGE_HAL_MAX_RING_INDICATE_MAX_PKTS) {
- return XGE_HAL_BADCFG_RING_INDICATE_MAX_PKTS;
- }
-
- return __hal_rti_config_check(&new_config->rti);
-}
-
-/*
- * __hal_mac_config_check - Check mac configuration
- * @new_config: mac configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_mac_config_check (xge_hal_mac_config_t *new_config)
-{
- if ((new_config->tmac_util_period < XGE_HAL_MIN_TMAC_UTIL_PERIOD) ||
- (new_config->tmac_util_period > XGE_HAL_MAX_TMAC_UTIL_PERIOD)) {
- return XGE_HAL_BADCFG_TMAC_UTIL_PERIOD;
- }
-
- if ((new_config->rmac_util_period < XGE_HAL_MIN_RMAC_UTIL_PERIOD) ||
- (new_config->rmac_util_period > XGE_HAL_MAX_RMAC_UTIL_PERIOD)) {
- return XGE_HAL_BADCFG_RMAC_UTIL_PERIOD;
- }
-
- if ((new_config->rmac_bcast_en < XGE_HAL_MIN_RMAC_BCAST_EN) ||
- (new_config->rmac_bcast_en > XGE_HAL_MAX_RMAC_BCAST_EN)) {
- return XGE_HAL_BADCFG_RMAC_BCAST_EN;
- }
-
- if ((new_config->rmac_pause_gen_en < XGE_HAL_MIN_RMAC_PAUSE_GEN_EN) ||
- (new_config->rmac_pause_gen_en>XGE_HAL_MAX_RMAC_PAUSE_GEN_EN)) {
- return XGE_HAL_BADCFG_RMAC_PAUSE_GEN_EN;
- }
-
- if ((new_config->rmac_pause_rcv_en < XGE_HAL_MIN_RMAC_PAUSE_RCV_EN) ||
- (new_config->rmac_pause_rcv_en>XGE_HAL_MAX_RMAC_PAUSE_RCV_EN)) {
- return XGE_HAL_BADCFG_RMAC_PAUSE_RCV_EN;
- }
-
- if ((new_config->rmac_pause_time < XGE_HAL_MIN_RMAC_HIGH_PTIME) ||
- (new_config->rmac_pause_time > XGE_HAL_MAX_RMAC_HIGH_PTIME)) {
- return XGE_HAL_BADCFG_RMAC_HIGH_PTIME;
- }
-
- if ((new_config->media < XGE_HAL_MIN_MEDIA) ||
- (new_config->media > XGE_HAL_MAX_MEDIA)) {
- return XGE_HAL_BADCFG_MEDIA;
- }
-
- if ((new_config->mc_pause_threshold_q0q3 <
- XGE_HAL_MIN_MC_PAUSE_THRESHOLD_Q0Q3) ||
- (new_config->mc_pause_threshold_q0q3 >
- XGE_HAL_MAX_MC_PAUSE_THRESHOLD_Q0Q3)) {
- return XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q0Q3;
- }
-
- if ((new_config->mc_pause_threshold_q4q7 <
- XGE_HAL_MIN_MC_PAUSE_THRESHOLD_Q4Q7) ||
- (new_config->mc_pause_threshold_q4q7 >
- XGE_HAL_MAX_MC_PAUSE_THRESHOLD_Q4Q7)) {
- return XGE_HAL_BADCFG_MC_PAUSE_THRESHOLD_Q4Q7;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_fifo_config_check - Check fifo configuration
- * @new_config: fifo configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_fifo_config_check (xge_hal_fifo_config_t *new_config)
-{
- int i;
- int total_fifo_length = 0;
-
- /*
- * recompute max_frags to be multiple of 4,
- * which means, multiple of 128 for TxDL
- */
- new_config->max_frags = ((new_config->max_frags + 3) >> 2) << 2;
-
- if ((new_config->max_frags < XGE_HAL_MIN_FIFO_FRAGS) ||
- (new_config->max_frags > XGE_HAL_MAX_FIFO_FRAGS)) {
- return XGE_HAL_BADCFG_FIFO_FRAGS;
- }
-
- if ((new_config->reserve_threshold <
- XGE_HAL_MIN_FIFO_RESERVE_THRESHOLD) ||
- (new_config->reserve_threshold >
- XGE_HAL_MAX_FIFO_RESERVE_THRESHOLD)) {
- return XGE_HAL_BADCFG_FIFO_RESERVE_THRESHOLD;
- }
-
- if ((new_config->memblock_size < XGE_HAL_MIN_FIFO_MEMBLOCK_SIZE) ||
- (new_config->memblock_size > XGE_HAL_MAX_FIFO_MEMBLOCK_SIZE)) {
- return XGE_HAL_BADCFG_FIFO_MEMBLOCK_SIZE;
- }
-
- for(i = 0; i < XGE_HAL_MAX_FIFO_NUM; i++) {
- xge_hal_status_e status;
-
- if (!new_config->queue[i].configured)
- continue;
-
- if ((status = __hal_fifo_queue_check(new_config,
- &new_config->queue[i])) != XGE_HAL_OK) {
- return status;
- }
-
- total_fifo_length += new_config->queue[i].max;
- }
-
- if(total_fifo_length > XGE_HAL_MAX_FIFO_QUEUE_LENGTH){
- return XGE_HAL_BADCFG_FIFO_QUEUE_MAX_LENGTH;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_ring_config_check - Check ring configuration
- * @new_config: Ring configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-static xge_hal_status_e
-__hal_ring_config_check (xge_hal_ring_config_t *new_config)
-{
- int i;
-
- if ((new_config->memblock_size < XGE_HAL_MIN_RING_MEMBLOCK_SIZE) ||
- (new_config->memblock_size > XGE_HAL_MAX_RING_MEMBLOCK_SIZE)) {
- return XGE_HAL_BADCFG_RING_MEMBLOCK_SIZE;
- }
-
- for(i = 0; i < XGE_HAL_MAX_RING_NUM; i++) {
- xge_hal_status_e status;
-
- if (!new_config->queue[i].configured)
- continue;
-
- if ((status = __hal_ring_queue_check(&new_config->queue[i]))
- != XGE_HAL_OK) {
- return status;
- }
- }
-
- return XGE_HAL_OK;
-}
-
-
-/*
- * __hal_device_config_check_common - Check device configuration.
- * @new_config: Device configuration information
- *
- * Check part of configuration that is common to
- * Xframe-I and Xframe-II.
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- *
- * See also: __hal_device_config_check_xena().
- */
-xge_hal_status_e
-__hal_device_config_check_common (xge_hal_device_config_t *new_config)
-{
- xge_hal_status_e status;
-
- if ((new_config->mtu < XGE_HAL_MIN_MTU) ||
- (new_config->mtu > XGE_HAL_MAX_MTU)) {
- return XGE_HAL_BADCFG_MAX_MTU;
- }
-
- if ((new_config->bimodal_interrupts < XGE_HAL_BIMODAL_INTR_MIN) ||
- (new_config->bimodal_interrupts > XGE_HAL_BIMODAL_INTR_MAX)) {
- return XGE_HAL_BADCFG_BIMODAL_INTR;
- }
-
- if (new_config->bimodal_interrupts &&
- ((new_config->bimodal_timer_lo_us < XGE_HAL_BIMODAL_TIMER_LO_US_MIN) ||
- (new_config->bimodal_timer_lo_us > XGE_HAL_BIMODAL_TIMER_LO_US_MAX))) {
- return XGE_HAL_BADCFG_BIMODAL_TIMER_LO_US;
- }
-
- if (new_config->bimodal_interrupts &&
- ((new_config->bimodal_timer_hi_us < XGE_HAL_BIMODAL_TIMER_HI_US_MIN) ||
- (new_config->bimodal_timer_hi_us > XGE_HAL_BIMODAL_TIMER_HI_US_MAX))) {
- return XGE_HAL_BADCFG_BIMODAL_TIMER_HI_US;
- }
-
- if ((new_config->no_isr_events < XGE_HAL_NO_ISR_EVENTS_MIN) ||
- (new_config->no_isr_events > XGE_HAL_NO_ISR_EVENTS_MAX)) {
- return XGE_HAL_BADCFG_NO_ISR_EVENTS;
- }
-
- if ((new_config->isr_polling_cnt < XGE_HAL_MIN_ISR_POLLING_CNT) ||
- (new_config->isr_polling_cnt > XGE_HAL_MAX_ISR_POLLING_CNT)) {
- return XGE_HAL_BADCFG_ISR_POLLING_CNT;
- }
-
- if (new_config->latency_timer &&
- new_config->latency_timer != XGE_HAL_USE_BIOS_DEFAULT_LATENCY) {
- if ((new_config->latency_timer < XGE_HAL_MIN_LATENCY_TIMER) ||
- (new_config->latency_timer > XGE_HAL_MAX_LATENCY_TIMER)) {
- return XGE_HAL_BADCFG_LATENCY_TIMER;
- }
- }
-
- if (new_config->max_splits_trans != XGE_HAL_USE_BIOS_DEFAULT_SPLITS) {
- if ((new_config->max_splits_trans <
- XGE_HAL_ONE_SPLIT_TRANSACTION) ||
- (new_config->max_splits_trans >
- XGE_HAL_THIRTYTWO_SPLIT_TRANSACTION))
- return XGE_HAL_BADCFG_MAX_SPLITS_TRANS;
- }
-
- if (new_config->mmrb_count != XGE_HAL_DEFAULT_BIOS_MMRB_COUNT)
- {
- if ((new_config->mmrb_count < XGE_HAL_MIN_MMRB_COUNT) ||
- (new_config->mmrb_count > XGE_HAL_MAX_MMRB_COUNT)) {
- return XGE_HAL_BADCFG_MMRB_COUNT;
- }
- }
-
- if ((new_config->shared_splits < XGE_HAL_MIN_SHARED_SPLITS) ||
- (new_config->shared_splits > XGE_HAL_MAX_SHARED_SPLITS)) {
- return XGE_HAL_BADCFG_SHARED_SPLITS;
- }
-
- if (new_config->stats_refresh_time_sec !=
- XGE_HAL_STATS_REFRESH_DISABLE) {
- if ((new_config->stats_refresh_time_sec <
- XGE_HAL_MIN_STATS_REFRESH_TIME) ||
- (new_config->stats_refresh_time_sec >
- XGE_HAL_MAX_STATS_REFRESH_TIME)) {
- return XGE_HAL_BADCFG_STATS_REFRESH_TIME;
- }
- }
-
- if ((new_config->intr_mode != XGE_HAL_INTR_MODE_IRQLINE) &&
- (new_config->intr_mode != XGE_HAL_INTR_MODE_MSI) &&
- (new_config->intr_mode != XGE_HAL_INTR_MODE_MSIX)) {
- return XGE_HAL_BADCFG_INTR_MODE;
- }
-
- if ((new_config->sched_timer_us < XGE_HAL_SCHED_TIMER_MIN) ||
- (new_config->sched_timer_us > XGE_HAL_SCHED_TIMER_MAX)) {
- return XGE_HAL_BADCFG_SCHED_TIMER_US;
- }
-
- if ((new_config->sched_timer_one_shot !=
- XGE_HAL_SCHED_TIMER_ON_SHOT_DISABLE) &&
- (new_config->sched_timer_one_shot !=
- XGE_HAL_SCHED_TIMER_ON_SHOT_ENABLE)) {
- return XGE_HAL_BADCFG_SCHED_TIMER_ON_SHOT;
- }
-
- /*
- * Check adaptive schema parameters. Note that there are two
- * configuration variables needs to be enabled in ULD:
- *
- * a) sched_timer_us should not be zero;
- * b) rxufca_hi_lim should not be equal to rxufca_lo_lim.
- *
- * The code bellow checking for those conditions.
- */
- if (new_config->sched_timer_us &&
- new_config->rxufca_hi_lim != new_config->rxufca_lo_lim) {
- if ((new_config->rxufca_intr_thres <
- XGE_HAL_RXUFCA_INTR_THRES_MIN) ||
- (new_config->rxufca_intr_thres >
- XGE_HAL_RXUFCA_INTR_THRES_MAX)) {
- return XGE_HAL_BADCFG_RXUFCA_INTR_THRES;
- }
-
- if ((new_config->rxufca_hi_lim < XGE_HAL_RXUFCA_HI_LIM_MIN) ||
- (new_config->rxufca_hi_lim > XGE_HAL_RXUFCA_HI_LIM_MAX)) {
- return XGE_HAL_BADCFG_RXUFCA_HI_LIM;
- }
-
- if ((new_config->rxufca_lo_lim < XGE_HAL_RXUFCA_LO_LIM_MIN) ||
- (new_config->rxufca_lo_lim > XGE_HAL_RXUFCA_LO_LIM_MAX) ||
- (new_config->rxufca_lo_lim > new_config->rxufca_hi_lim)) {
- return XGE_HAL_BADCFG_RXUFCA_LO_LIM;
- }
-
- if ((new_config->rxufca_lbolt_period <
- XGE_HAL_RXUFCA_LBOLT_PERIOD_MIN) ||
- (new_config->rxufca_lbolt_period >
- XGE_HAL_RXUFCA_LBOLT_PERIOD_MAX)) {
- return XGE_HAL_BADCFG_RXUFCA_LBOLT_PERIOD;
- }
- }
-
- if ((new_config->link_valid_cnt < XGE_HAL_LINK_VALID_CNT_MIN) ||
- (new_config->link_valid_cnt > XGE_HAL_LINK_VALID_CNT_MAX)) {
- return XGE_HAL_BADCFG_LINK_VALID_CNT;
- }
-
- if ((new_config->link_retry_cnt < XGE_HAL_LINK_RETRY_CNT_MIN) ||
- (new_config->link_retry_cnt > XGE_HAL_LINK_RETRY_CNT_MAX)) {
- return XGE_HAL_BADCFG_LINK_RETRY_CNT;
- }
-
- if (new_config->link_valid_cnt > new_config->link_retry_cnt)
- return XGE_HAL_BADCFG_LINK_VALID_CNT;
-
- if (new_config->link_stability_period != XGE_HAL_DEFAULT_USE_HARDCODE) {
- if ((new_config->link_stability_period <
- XGE_HAL_MIN_LINK_STABILITY_PERIOD) ||
- (new_config->link_stability_period >
- XGE_HAL_MAX_LINK_STABILITY_PERIOD)) {
- return XGE_HAL_BADCFG_LINK_STABILITY_PERIOD;
- }
- }
-
- if (new_config->device_poll_millis !=
- XGE_HAL_DEFAULT_USE_HARDCODE) {
- if ((new_config->device_poll_millis <
- XGE_HAL_MIN_DEVICE_POLL_MILLIS) ||
- (new_config->device_poll_millis >
- XGE_HAL_MAX_DEVICE_POLL_MILLIS)) {
- return XGE_HAL_BADCFG_DEVICE_POLL_MILLIS;
- }
- }
-
- if ((new_config->rts_port_en < XGE_HAL_MIN_RING_RTS_PORT_EN) ||
- (new_config->rts_port_en > XGE_HAL_MAX_RING_RTS_PORT_EN)) {
- return XGE_HAL_BADCFG_RTS_PORT_EN;
- }
-
- if ((new_config->rts_qos_en < XGE_HAL_RTS_QOS_DISABLE) ||
- (new_config->rts_qos_en > XGE_HAL_RTS_QOS_ENABLE)) {
- return XGE_HAL_BADCFG_RTS_QOS_EN;
- }
-
-#if defined(XGE_HAL_CONFIG_LRO)
- if (new_config->lro_sg_size !=
- XGE_HAL_DEFAULT_USE_HARDCODE) {
- if ((new_config->lro_sg_size < XGE_HAL_LRO_MIN_SG_SIZE) ||
- (new_config->lro_sg_size > XGE_HAL_LRO_MAX_SG_SIZE)) {
- return XGE_HAL_BADCFG_LRO_SG_SIZE;
- }
- }
-
- if (new_config->lro_frm_len !=
- XGE_HAL_DEFAULT_USE_HARDCODE) {
- if ((new_config->lro_frm_len < XGE_HAL_LRO_MIN_FRM_LEN) ||
- (new_config->lro_frm_len > XGE_HAL_LRO_MAX_FRM_LEN)) {
- return XGE_HAL_BADCFG_LRO_FRM_LEN;
- }
- }
-#endif
-
- if ((status = __hal_ring_config_check(&new_config->ring))
- != XGE_HAL_OK) {
- return status;
- }
-
- if ((status = __hal_mac_config_check(&new_config->mac)) !=
- XGE_HAL_OK) {
- return status;
- }
-
- if ((status = __hal_fifo_config_check(&new_config->fifo)) !=
- XGE_HAL_OK) {
- return status;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_device_config_check_xena - Check Xframe-I configuration
- * @new_config: Device configuration.
- *
- * Check part of configuration that is relevant only to Xframe-I.
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- *
- * See also: __hal_device_config_check_common().
- */
-xge_hal_status_e
-__hal_device_config_check_xena (xge_hal_device_config_t *new_config)
-{
- if ((new_config->pci_freq_mherz != XGE_HAL_PCI_FREQ_MHERZ_33) &&
- (new_config->pci_freq_mherz != XGE_HAL_PCI_FREQ_MHERZ_66) &&
- (new_config->pci_freq_mherz != XGE_HAL_PCI_FREQ_MHERZ_100) &&
- (new_config->pci_freq_mherz != XGE_HAL_PCI_FREQ_MHERZ_133) &&
- (new_config->pci_freq_mherz != XGE_HAL_PCI_FREQ_MHERZ_266) &&
- (new_config->pci_freq_mherz != XGE_HAL_DEFAULT_USE_HARDCODE)) {
- return XGE_HAL_BADCFG_PCI_FREQ_MHERZ;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_device_config_check_herc - Check device configuration
- * @new_config: Device configuration.
- *
- * Check part of configuration that is relevant only to Xframe-II.
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- *
- * See also: __hal_device_config_check_common().
- */
-xge_hal_status_e
-__hal_device_config_check_herc (xge_hal_device_config_t *new_config)
-{
- return XGE_HAL_OK;
-}
-
-
-/*
- * __hal_driver_config_check - Check HAL configuration
- * @new_config: Driver configuration information
- *
- * Returns: XGE_HAL_OK - success,
- * otherwise one of the xge_hal_status_e{} enumerated error codes.
- */
-xge_hal_status_e
-__hal_driver_config_check (xge_hal_driver_config_t *new_config)
-{
- if ((new_config->queue_size_initial <
- XGE_HAL_MIN_QUEUE_SIZE_INITIAL) ||
- (new_config->queue_size_initial >
- XGE_HAL_MAX_QUEUE_SIZE_INITIAL)) {
- return XGE_HAL_BADCFG_QUEUE_SIZE_INITIAL;
- }
-
- if ((new_config->queue_size_max < XGE_HAL_MIN_QUEUE_SIZE_MAX) ||
- (new_config->queue_size_max > XGE_HAL_MAX_QUEUE_SIZE_MAX)) {
- return XGE_HAL_BADCFG_QUEUE_SIZE_MAX;
- }
-
-#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
- if ((new_config->tracebuf_size < XGE_HAL_MIN_CIRCULAR_ARR) ||
- (new_config->tracebuf_size > XGE_HAL_MAX_CIRCULAR_ARR)) {
- return XGE_HAL_BADCFG_TRACEBUF_SIZE;
- }
- if ((new_config->tracebuf_timestamp_en < XGE_HAL_MIN_TIMESTAMP_EN) ||
- (new_config->tracebuf_timestamp_en > XGE_HAL_MAX_TIMESTAMP_EN)) {
- return XGE_HAL_BADCFG_TRACEBUF_SIZE;
- }
-#endif
-
- return XGE_HAL_OK;
-}
diff --git a/sys/dev/nxge/xgehal/xgehal-device-fp.c b/sys/dev/nxge/xgehal/xgehal-device-fp.c
deleted file mode 100644
index aa6057ac7336..000000000000
--- a/sys/dev/nxge/xgehal/xgehal-device-fp.c
+++ /dev/null
@@ -1,1426 +0,0 @@
-/*-
- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
- *
- * Copyright (c) 2002-2007 Neterion, Inc.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD$
- */
-
-#ifdef XGE_DEBUG_FP
-#include <dev/nxge/include/xgehal-device.h>
-#endif
-
-#include <dev/nxge/include/xgehal-ring.h>
-#include <dev/nxge/include/xgehal-fifo.h>
-
-/**
- * xge_hal_device_bar0 - Get BAR0 mapped address.
- * @hldev: HAL device handle.
- *
- * Returns: BAR0 address of the specified device.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_bar0(xge_hal_device_t *hldev)
-{
- return hldev->bar0;
-}
-
-/**
- * xge_hal_device_isrbar0 - Get BAR0 mapped address.
- * @hldev: HAL device handle.
- *
- * Returns: BAR0 address of the specified device.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_isrbar0(xge_hal_device_t *hldev)
-{
- return hldev->isrbar0;
-}
-
-/**
- * xge_hal_device_bar1 - Get BAR1 mapped address.
- * @hldev: HAL device handle.
- *
- * Returns: BAR1 address of the specified device.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE char *
-xge_hal_device_bar1(xge_hal_device_t *hldev)
-{
- return hldev->bar1;
-}
-
-/**
- * xge_hal_device_bar0_set - Set BAR0 mapped address.
- * @hldev: HAL device handle.
- * @bar0: BAR0 mapped address.
- * * Set BAR0 address in the HAL device object.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_bar0_set(xge_hal_device_t *hldev, char *bar0)
-{
- xge_assert(bar0);
- hldev->bar0 = bar0;
-}
-
-/**
- * xge_hal_device_isrbar0_set - Set BAR0 mapped address.
- * @hldev: HAL device handle.
- * @isrbar0: BAR0 mapped address.
- * * Set BAR0 address in the HAL device object.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_isrbar0_set(xge_hal_device_t *hldev, char *isrbar0)
-{
- xge_assert(isrbar0);
- hldev->isrbar0 = isrbar0;
-}
-
-/**
- * xge_hal_device_bar1_set - Set BAR1 mapped address.
- * @hldev: HAL device handle.
- * @channelh: Channel handle.
- * @bar1: BAR1 mapped address.
- *
- * Set BAR1 address for the given channel.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_bar1_set(xge_hal_device_t *hldev, xge_hal_channel_h channelh,
- char *bar1)
-{
- xge_hal_fifo_t *fifo = (xge_hal_fifo_t *)channelh;
-
- xge_assert(bar1);
- xge_assert(fifo);
-
- /* Initializing the BAR1 address as the start of
- * the FIFO queue pointer and as a location of FIFO control
- * word. */
- fifo->hw_pair =
- (xge_hal_fifo_hw_pair_t *) (bar1 +
- (fifo->channel.post_qid * XGE_HAL_FIFO_HW_PAIR_OFFSET));
- hldev->bar1 = bar1;
-}
-
-
-/**
- * xge_hal_device_rev - Get Device revision number.
- * @hldev: HAL device handle.
- *
- * Returns: Device revision number
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE int
-xge_hal_device_rev(xge_hal_device_t *hldev)
-{
- return hldev->revision;
-}
-
-
-/**
- * xge_hal_device_begin_irq - Begin IRQ processing.
- * @hldev: HAL device handle.
- * @reason: "Reason" for the interrupt, the value of Xframe's
- * general_int_status register.
- *
- * The function performs two actions, It first checks whether (shared IRQ) the
- * interrupt was raised by the device. Next, it masks the device interrupts.
- *
- * Note:
- * xge_hal_device_begin_irq() does not flush MMIO writes through the
- * bridge. Therefore, two back-to-back interrupts are potentially possible.
- * It is the responsibility of the ULD to make sure that only one
- * xge_hal_device_continue_irq() runs at a time.
- *
- * Returns: 0, if the interrupt is not "ours" (note that in this case the
- * device remain enabled).
- * Otherwise, xge_hal_device_begin_irq() returns 64bit general adapter
- * status.
- * See also: xge_hal_device_handle_irq()
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_begin_irq(xge_hal_device_t *hldev, u64 *reason)
-{
- u64 val64;
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- hldev->stats.sw_dev_info_stats.total_intr_cnt++;
-
- val64 = xge_os_pio_mem_read64(hldev->pdev,
- hldev->regh0, &isrbar0->general_int_status);
- if (xge_os_unlikely(!val64)) {
- /* not Xframe interrupt */
- hldev->stats.sw_dev_info_stats.not_xge_intr_cnt++;
- *reason = 0;
- return XGE_HAL_ERR_WRONG_IRQ;
- }
-
- if (xge_os_unlikely(val64 == XGE_HAL_ALL_FOXES)) {
- u64 adapter_status =
- xge_os_pio_mem_read64(hldev->pdev, hldev->regh0,
- &isrbar0->adapter_status);
- if (adapter_status == XGE_HAL_ALL_FOXES) {
- (void) xge_queue_produce(hldev->queueh,
- XGE_HAL_EVENT_SLOT_FREEZE,
- hldev,
- 1, /* critical: slot freeze */
- sizeof(u64),
- (void*)&adapter_status);
- *reason = 0;
- return XGE_HAL_ERR_CRITICAL;
- }
- }
-
- *reason = val64;
-
- /* separate fast path, i.e. no errors */
- if (val64 & XGE_HAL_GEN_INTR_RXTRAFFIC) {
- hldev->stats.sw_dev_info_stats.rx_traffic_intr_cnt++;
- return XGE_HAL_OK;
- }
- if (val64 & XGE_HAL_GEN_INTR_TXTRAFFIC) {
- hldev->stats.sw_dev_info_stats.tx_traffic_intr_cnt++;
- return XGE_HAL_OK;
- }
-
- hldev->stats.sw_dev_info_stats.not_traffic_intr_cnt++;
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXPIC)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.txpic_intr_cnt++;
- status = __hal_device_handle_txpic(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXDMA)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.txdma_intr_cnt++;
- status = __hal_device_handle_txdma(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXMAC)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.txmac_intr_cnt++;
- status = __hal_device_handle_txmac(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_TXXGXS)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.txxgxs_intr_cnt++;
- status = __hal_device_handle_txxgxs(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXPIC)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.rxpic_intr_cnt++;
- status = __hal_device_handle_rxpic(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXDMA)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.rxdma_intr_cnt++;
- status = __hal_device_handle_rxdma(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXMAC)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.rxmac_intr_cnt++;
- status = __hal_device_handle_rxmac(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_RXXGXS)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.rxxgxs_intr_cnt++;
- status = __hal_device_handle_rxxgxs(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- if (xge_os_unlikely(val64 & XGE_HAL_GEN_INTR_MC)) {
- xge_hal_status_e status;
- hldev->stats.sw_dev_info_stats.mc_intr_cnt++;
- status = __hal_device_handle_mc(hldev, val64);
- if (status != XGE_HAL_OK) {
- return status;
- }
- }
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_device_clear_rx - Acknowledge (that is, clear) the
- * condition that has caused the RX interrupt.
- * @hldev: HAL device handle.
- *
- * Acknowledge (that is, clear) the condition that has caused
- * the Rx interrupt.
- * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq(),
- * xge_hal_device_clear_tx(), xge_hal_device_mask_rx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_clear_rx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0xFFFFFFFFFFFFFFFFULL,
- &isrbar0->rx_traffic_int);
-}
-
-/**
- * xge_hal_device_clear_tx - Acknowledge (that is, clear) the
- * condition that has caused the TX interrupt.
- * @hldev: HAL device handle.
- *
- * Acknowledge (that is, clear) the condition that has caused
- * the Tx interrupt.
- * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq(),
- * xge_hal_device_clear_rx(), xge_hal_device_mask_tx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_clear_tx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0xFFFFFFFFFFFFFFFFULL,
- &isrbar0->tx_traffic_int);
-}
-
-/**
- * xge_hal_device_poll_rx_channel - Poll Rx channel for completed
- * descriptors and process the same.
- * @channel: HAL channel.
- * @got_rx: Buffer to return the flag set if receive interrupt is occured
- *
- * The function polls the Rx channel for the completed descriptors and calls
- * the upper-layer driver (ULD) via supplied completion callback.
- *
- * Returns: XGE_HAL_OK, if the polling is completed successful.
- * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
- * descriptors available which are yet to be processed.
- *
- * See also: xge_hal_device_poll_tx_channel()
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_rx_channel(xge_hal_channel_t *channel, int *got_rx)
-{
- xge_hal_status_e ret = XGE_HAL_OK;
- xge_hal_dtr_h first_dtrh;
- xge_hal_device_t *hldev = (xge_hal_device_t *)channel->devh;
- u8 t_code;
- int got_bytes;
-
- /* for each opened rx channel */
- got_bytes = *got_rx = 0;
- ((xge_hal_ring_t *)channel)->cmpl_cnt = 0;
- channel->poll_bytes = 0;
- if ((ret = xge_hal_ring_dtr_next_completed (channel, &first_dtrh,
- &t_code)) == XGE_HAL_OK) {
- if (channel->callback(channel, first_dtrh,
- t_code, channel->userdata) != XGE_HAL_OK) {
- (*got_rx) += ((xge_hal_ring_t *)channel)->cmpl_cnt + 1;
- got_bytes += channel->poll_bytes + 1;
- ret = XGE_HAL_COMPLETIONS_REMAIN;
- } else {
- (*got_rx) += ((xge_hal_ring_t *)channel)->cmpl_cnt + 1;
- got_bytes += channel->poll_bytes + 1;
- }
- }
-
- if (*got_rx) {
- hldev->irq_workload_rxd[channel->post_qid] += *got_rx;
- hldev->irq_workload_rxcnt[channel->post_qid] ++;
- }
- hldev->irq_workload_rxlen[channel->post_qid] += got_bytes;
-
- return ret;
-}
-
-/**
- * xge_hal_device_poll_tx_channel - Poll Tx channel for completed
- * descriptors and process the same.
- * @channel: HAL channel.
- * @got_tx: Buffer to return the flag set if transmit interrupt is occured
- *
- * The function polls the Tx channel for the completed descriptors and calls
- * the upper-layer driver (ULD) via supplied completion callback.
- *
- * Returns: XGE_HAL_OK, if the polling is completed successful.
- * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
- * descriptors available which are yet to be processed.
- *
- * See also: xge_hal_device_poll_rx_channel().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_tx_channel(xge_hal_channel_t *channel, int *got_tx)
-{
- xge_hal_dtr_h first_dtrh;
- xge_hal_device_t *hldev = (xge_hal_device_t *)channel->devh;
- u8 t_code;
- int got_bytes;
-
- /* for each opened tx channel */
- got_bytes = *got_tx = 0;
- channel->poll_bytes = 0;
- if (xge_hal_fifo_dtr_next_completed (channel, &first_dtrh,
- &t_code) == XGE_HAL_OK) {
- if (channel->callback(channel, first_dtrh,
- t_code, channel->userdata) != XGE_HAL_OK) {
- (*got_tx)++;
- got_bytes += channel->poll_bytes + 1;
- return XGE_HAL_COMPLETIONS_REMAIN;
- }
- (*got_tx)++;
- got_bytes += channel->poll_bytes + 1;
- }
-
- if (*got_tx) {
- hldev->irq_workload_txd[channel->post_qid] += *got_tx;
- hldev->irq_workload_txcnt[channel->post_qid] ++;
- }
- hldev->irq_workload_txlen[channel->post_qid] += got_bytes;
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_device_poll_rx_channels - Poll Rx channels for completed
- * descriptors and process the same.
- * @hldev: HAL device handle.
- * @got_rx: Buffer to return flag set if receive is ready
- *
- * The function polls the Rx channels for the completed descriptors and calls
- * the upper-layer driver (ULD) via supplied completion callback.
- *
- * Returns: XGE_HAL_OK, if the polling is completed successful.
- * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
- * descriptors available which are yet to be processed.
- *
- * See also: xge_hal_device_poll_tx_channels(), xge_hal_device_continue_irq().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_rx_channels(xge_hal_device_t *hldev, int *got_rx)
-{
- xge_list_t *item;
- xge_hal_channel_t *channel;
-
- /* for each opened rx channel */
- xge_list_for_each(item, &hldev->ring_channels) {
- if (hldev->terminating)
- return XGE_HAL_OK;
- channel = xge_container_of(item, xge_hal_channel_t, item);
- (void) xge_hal_device_poll_rx_channel(channel, got_rx);
- }
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_device_poll_tx_channels - Poll Tx channels for completed
- * descriptors and process the same.
- * @hldev: HAL device handle.
- * @got_tx: Buffer to return flag set if transmit is ready
- *
- * The function polls the Tx channels for the completed descriptors and calls
- * the upper-layer driver (ULD) via supplied completion callback.
- *
- * Returns: XGE_HAL_OK, if the polling is completed successful.
- * XGE_HAL_COMPLETIONS_REMAIN: There are still more completed
- * descriptors available which are yet to be processed.
- *
- * See also: xge_hal_device_poll_rx_channels(), xge_hal_device_continue_irq().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_poll_tx_channels(xge_hal_device_t *hldev, int *got_tx)
-{
- xge_list_t *item;
- xge_hal_channel_t *channel;
-
- /* for each opened tx channel */
- xge_list_for_each(item, &hldev->fifo_channels) {
- if (hldev->terminating)
- return XGE_HAL_OK;
- channel = xge_container_of(item, xge_hal_channel_t, item);
- (void) xge_hal_device_poll_tx_channel(channel, got_tx);
- }
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_device_mask_tx - Mask Tx interrupts.
- * @hldev: HAL device handle.
- *
- * Mask Tx device interrupts.
- *
- * See also: xge_hal_device_unmask_tx(), xge_hal_device_mask_rx(),
- * xge_hal_device_clear_tx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_tx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0xFFFFFFFFFFFFFFFFULL,
- &isrbar0->tx_traffic_mask);
-}
-
-/**
- * xge_hal_device_mask_rx - Mask Rx interrupts.
- * @hldev: HAL device handle.
- *
- * Mask Rx device interrupts.
- *
- * See also: xge_hal_device_unmask_rx(), xge_hal_device_mask_tx(),
- * xge_hal_device_clear_rx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_rx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0xFFFFFFFFFFFFFFFFULL,
- &isrbar0->rx_traffic_mask);
-}
-
-/**
- * xge_hal_device_mask_all - Mask all device interrupts.
- * @hldev: HAL device handle.
- *
- * Mask all device interrupts.
- *
- * See also: xge_hal_device_unmask_all()
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_mask_all(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0xFFFFFFFFFFFFFFFFULL,
- &isrbar0->general_int_mask);
-}
-
-/**
- * xge_hal_device_unmask_tx - Unmask Tx interrupts.
- * @hldev: HAL device handle.
- *
- * Unmask Tx device interrupts.
- *
- * See also: xge_hal_device_mask_tx(), xge_hal_device_clear_tx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_tx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0x0ULL,
- &isrbar0->tx_traffic_mask);
-}
-
-/**
- * xge_hal_device_unmask_rx - Unmask Rx interrupts.
- * @hldev: HAL device handle.
- *
- * Unmask Rx device interrupts.
- *
- * See also: xge_hal_device_mask_rx(), xge_hal_device_clear_rx().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_rx(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0x0ULL,
- &isrbar0->rx_traffic_mask);
-}
-
-/**
- * xge_hal_device_unmask_all - Unmask all device interrupts.
- * @hldev: HAL device handle.
- *
- * Unmask all device interrupts.
- *
- * See also: xge_hal_device_mask_all()
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE void
-xge_hal_device_unmask_all(xge_hal_device_t *hldev)
-{
- xge_hal_pci_bar0_t *isrbar0 = (xge_hal_pci_bar0_t *)hldev->isrbar0;
-
- xge_os_pio_mem_write64(hldev->pdev, hldev->regh0,
- 0x0ULL,
- &isrbar0->general_int_mask);
-}
-
-
-/**
- * xge_hal_device_continue_irq - Continue handling IRQ: process all
- * completed descriptors.
- * @hldev: HAL device handle.
- *
- * Process completed descriptors and unmask the device interrupts.
- *
- * The xge_hal_device_continue_irq() walks all open channels
- * and calls upper-layer driver (ULD) via supplied completion
- * callback. Note that the completion callback is specified at channel open
- * time, see xge_hal_channel_open().
- *
- * Note that the xge_hal_device_continue_irq is part of the _fast_ path.
- * To optimize the processing, the function does _not_ check for
- * errors and alarms.
- *
- * The latter is done in a polling fashion, via xge_hal_device_poll().
- *
- * Returns: XGE_HAL_OK.
- *
- * See also: xge_hal_device_handle_irq(), xge_hal_device_poll(),
- * xge_hal_ring_dtr_next_completed(),
- * xge_hal_fifo_dtr_next_completed(), xge_hal_channel_callback_f{}.
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_continue_irq(xge_hal_device_t *hldev)
-{
- int got_rx = 1, got_tx = 1;
- int isr_polling_cnt = hldev->config.isr_polling_cnt;
- int count = 0;
-
- do
- {
- if (got_rx)
- (void) xge_hal_device_poll_rx_channels(hldev, &got_rx);
- if (got_tx && hldev->tti_enabled)
- (void) xge_hal_device_poll_tx_channels(hldev, &got_tx);
-
- if (!got_rx && !got_tx)
- break;
-
- count += (got_rx + got_tx);
- }while (isr_polling_cnt--);
-
- if (!count)
- hldev->stats.sw_dev_info_stats.not_traffic_intr_cnt++;
-
- return XGE_HAL_OK;
-}
-
-/**
- * xge_hal_device_handle_irq - Handle device IRQ.
- * @hldev: HAL device handle.
- *
- * Perform the complete handling of the line interrupt. The function
- * performs two calls.
- * First it uses xge_hal_device_begin_irq() to check the reason for
- * the interrupt and mask the device interrupts.
- * Second, it calls xge_hal_device_continue_irq() to process all
- * completed descriptors and re-enable the interrupts.
- *
- * Returns: XGE_HAL_OK - success;
- * XGE_HAL_ERR_WRONG_IRQ - (shared) IRQ produced by other device.
- *
- * See also: xge_hal_device_begin_irq(), xge_hal_device_continue_irq().
- */
-__HAL_STATIC_DEVICE __HAL_INLINE_DEVICE xge_hal_status_e
-xge_hal_device_handle_irq(xge_hal_device_t *hldev)
-{
- u64 reason;
- xge_hal_status_e status;
-
- xge_hal_device_mask_all(hldev);
-
- status = xge_hal_device_begin_irq(hldev, &reason);
- if (status != XGE_HAL_OK) {
- xge_hal_device_unmask_all(hldev);
- return status;
- }
-
- if (reason & XGE_HAL_GEN_INTR_RXTRAFFIC) {
- xge_hal_device_clear_rx(hldev);
- }
-
- status = xge_hal_device_continue_irq(hldev);
-
- xge_hal_device_clear_tx(hldev);
-
- xge_hal_device_unmask_all(hldev);
-
- return status;
-}
-
-#if defined(XGE_HAL_CONFIG_LRO)
-
-
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-__hal_lro_check_for_session_match(lro_t *lro, tcplro_t *tcp, iplro_t *ip)
-{
-
- /* Match Source address field */
- if ((lro->ip_hdr->saddr != ip->saddr))
- return XGE_HAL_FAIL;
-
- /* Match Destination address field */
- if ((lro->ip_hdr->daddr != ip->daddr))
- return XGE_HAL_FAIL;
-
- /* Match Source Port field */
- if ((lro->tcp_hdr->source != tcp->source))
- return XGE_HAL_FAIL;
-
- /* Match Destination Port field */
- if ((lro->tcp_hdr->dest != tcp->dest))
- return XGE_HAL_FAIL;
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_tcp_seg_len: Find the tcp seg len.
- * @ip: ip header.
- * @tcp: tcp header.
- * returns: Tcp seg length.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL u16
-__hal_tcp_seg_len(iplro_t *ip, tcplro_t *tcp)
-{
- u16 ret;
-
- ret = (xge_os_ntohs(ip->tot_len) -
- ((ip->version_ihl & 0x0F)<<2) -
- ((tcp->doff_res)>>2));
- return (ret);
-}
-
-/*
- * __hal_ip_lro_capable: Finds whether ip is lro capable.
- * @ip: ip header.
- * @ext_info: descriptor info.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_ip_lro_capable(iplro_t *ip,
- xge_hal_dtr_info_t *ext_info)
-{
-
-#ifdef XGE_LL_DEBUG_DUMP_PKT
- {
- u16 i;
- u8 ch, *iph = (u8 *)ip;
-
- xge_debug_ring(XGE_TRACE, "Dump Ip:" );
- for (i =0; i < 40; i++) {
- ch = ntohs(*((u8 *)(iph + i)) );
- printf("i:%d %02x, ",i,ch);
- }
- }
-#endif
-
- if (ip->version_ihl != IP_FAST_PATH_HDR_MASK) {
- xge_debug_ring(XGE_ERR, "iphdr !=45 :%d",ip->version_ihl);
- return XGE_HAL_FAIL;
- }
-
- if (ext_info->proto & XGE_HAL_FRAME_PROTO_IP_FRAGMENTED) {
- xge_debug_ring(XGE_ERR, "IP fragmented");
- return XGE_HAL_FAIL;
- }
-
- return XGE_HAL_OK;
-}
-
-/*
- * __hal_tcp_lro_capable: Finds whether tcp is lro capable.
- * @ip: ip header.
- * @tcp: tcp header.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_tcp_lro_capable(iplro_t *ip, tcplro_t *tcp, lro_t *lro, int *ts_off)
-{
-#ifdef XGE_LL_DEBUG_DUMP_PKT
- {
- u8 ch;
- u16 i;
-
- xge_debug_ring(XGE_TRACE, "Dump Tcp:" );
- for (i =0; i < 20; i++) {
- ch = ntohs(*((u8 *)((u8 *)tcp + i)) );
- xge_os_printf("i:%d %02x, ",i,ch);
- }
- }
-#endif
- if ((TCP_FAST_PATH_HDR_MASK2 != tcp->ctrl) &&
- (TCP_FAST_PATH_HDR_MASK3 != tcp->ctrl))
- goto _exit_fail;
-
- *ts_off = -1;
- if (TCP_FAST_PATH_HDR_MASK1 != tcp->doff_res) {
- u16 tcp_hdr_len = tcp->doff_res >> 2; /* TCP header len */
- u16 off = 20; /* Start of tcp options */
- int i, diff;
-
- /* Does Packet can contain time stamp */
- if (tcp_hdr_len < 32) {
- /*
- * If the session is not opened, we can consider
- * this packet for LRO
- */
- if (lro == NULL)
- return XGE_HAL_OK;
-
- goto _exit_fail;
- }
-
- /* Ignore No-operation 0x1 */
- while (((u8 *)tcp)[off] == 0x1)
- off++;
-
- /* Next option == Timestamp */
- if (((u8 *)tcp)[off] != 0x8) {
- /*
- * If the session ie not opened, we can consider
- * this packet for LRO
- */
- if (lro == NULL)
- return XGE_HAL_OK;
-
- goto _exit_fail;
- }
-
- *ts_off = off;
- if (lro == NULL)
- return XGE_HAL_OK;
-
- /*
- * Now the session is opened. If the LRO frame doesn't
- * have time stamp, we cannot consider current packet for
- * LRO.
- */
- if (lro->ts_off == -1) {
- xge_debug_ring(XGE_ERR, "Pkt received with time stamp after session opened with no time stamp : %02x %02x", tcp->doff_res, tcp->ctrl);
- return XGE_HAL_FAIL;
- }
-
- /*
- * If the difference is greater than three, then there are
- * more options possible.
- * else, there are two cases:
- * case 1: remaining are padding bytes.
- * case 2: remaining can contain options or padding
- */
- off += ((u8 *)tcp)[off+1];
- diff = tcp_hdr_len - off;
- if (diff > 3) {
- /*
- * Probably contains more options.
- */
- xge_debug_ring(XGE_ERR, "tcphdr not fastpth : pkt received with tcp options in addition to time stamp after the session is opened %02x %02x ", tcp->doff_res, tcp->ctrl);
- return XGE_HAL_FAIL;
- }
-
- for (i = 0; i < diff; i++) {
- u8 byte = ((u8 *)tcp)[off+i];
-
- /* Ignore No-operation 0x1 */
- if ((byte == 0x0) || (byte == 0x1))
- continue;
- xge_debug_ring(XGE_ERR, "tcphdr not fastpth : pkt received with tcp options in addition to time stamp after the session is opened %02x %02x ", tcp->doff_res, tcp->ctrl);
- return XGE_HAL_FAIL;
- }
-
- /*
- * Update the time stamp of LRO frame.
- */
- xge_os_memcpy(((char *)lro->tcp_hdr + lro->ts_off + 2),
- (char *)((char *)tcp + (*ts_off) + 2), 8);
- }
-
- return XGE_HAL_OK;
-
-_exit_fail:
- xge_debug_ring(XGE_TRACE, "tcphdr not fastpth %02x %02x", tcp->doff_res, tcp->ctrl);
- return XGE_HAL_FAIL;
-
-}
-
-/*
- * __hal_lro_capable: Finds whether frame is lro capable.
- * @buffer: Ethernet frame.
- * @ip: ip frame.
- * @tcp: tcp frame.
- * @ext_info: Descriptor info.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_lro_capable( u8 *buffer,
- iplro_t **ip,
- tcplro_t **tcp,
- xge_hal_dtr_info_t *ext_info)
-{
- u8 ip_off, ip_length;
-
- if (!(ext_info->proto & XGE_HAL_FRAME_PROTO_TCP)) {
- xge_debug_ring(XGE_ERR, "Cant do lro %d", ext_info->proto);
- return XGE_HAL_FAIL;
- }
-
- if ( !*ip )
- {
-#ifdef XGE_LL_DEBUG_DUMP_PKT
- {
- u8 ch;
- u16 i;
-
- xge_os_printf("Dump Eth:" );
- for (i =0; i < 60; i++) {
- ch = ntohs(*((u8 *)(buffer + i)) );
- xge_os_printf("i:%d %02x, ",i,ch);
- }
- }
-#endif
-
- switch (ext_info->frame) {
- case XGE_HAL_FRAME_TYPE_DIX:
- ip_off = XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE;
- break;
- case XGE_HAL_FRAME_TYPE_LLC:
- ip_off = (XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE +
- XGE_HAL_HEADER_802_2_SIZE);
- break;
- case XGE_HAL_FRAME_TYPE_SNAP:
- ip_off = (XGE_HAL_HEADER_ETHERNET_II_802_3_SIZE +
- XGE_HAL_HEADER_SNAP_SIZE);
- break;
- default: // XGE_HAL_FRAME_TYPE_IPX, etc.
- return XGE_HAL_FAIL;
- }
-
-
- if (ext_info->proto & XGE_HAL_FRAME_PROTO_VLAN_TAGGED) {
- ip_off += XGE_HAL_HEADER_VLAN_SIZE;
- }
-
- /* Grab ip, tcp headers */
- *ip = (iplro_t *)((char*)buffer + ip_off);
- } /* !*ip */
-
- ip_length = (u8)((*ip)->version_ihl & 0x0F);
- ip_length = ip_length <<2;
- *tcp = (tcplro_t *)((char *)*ip + ip_length);
-
- xge_debug_ring(XGE_TRACE, "ip_length:%d ip:"XGE_OS_LLXFMT
- " tcp:"XGE_OS_LLXFMT"", (int)ip_length,
- (unsigned long long)(ulong_t)*ip, (unsigned long long)(ulong_t)*tcp);
-
- return XGE_HAL_OK;
-
-}
-
-
-/*
- * __hal_open_lro_session: Open a new LRO session.
- * @buffer: Ethernet frame.
- * @ip: ip header.
- * @tcp: tcp header.
- * @lro: lro pointer
- * @ext_info: Descriptor info.
- * @hldev: Hal context.
- * @ring_lro: LRO descriptor per rx ring.
- * @slot: Bucket no.
- * @tcp_seg_len: Length of tcp segment.
- * @ts_off: time stamp offset in the packet.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL void
-__hal_open_lro_session (u8 *buffer, iplro_t *ip, tcplro_t *tcp, lro_t **lro,
- xge_hal_device_t *hldev, xge_hal_lro_desc_t *ring_lro, int slot,
- u32 tcp_seg_len, int ts_off)
-{
-
- lro_t *lro_new = &ring_lro->lro_pool[slot];
-
- lro_new->in_use = 1;
- lro_new->ll_hdr = buffer;
- lro_new->ip_hdr = ip;
- lro_new->tcp_hdr = tcp;
- lro_new->tcp_next_seq_num = tcp_seg_len + xge_os_ntohl(
- tcp->seq);
- lro_new->tcp_seq_num = tcp->seq;
- lro_new->tcp_ack_num = tcp->ack_seq;
- lro_new->sg_num = 1;
- lro_new->total_length = xge_os_ntohs(ip->tot_len);
- lro_new->frags_len = 0;
- lro_new->ts_off = ts_off;
-
- hldev->stats.sw_dev_info_stats.tot_frms_lroised++;
- hldev->stats.sw_dev_info_stats.tot_lro_sessions++;
-
- *lro = ring_lro->lro_recent = lro_new;
- return;
-}
-/*
- * __hal_lro_get_free_slot: Get a free LRO bucket.
- * @ring_lro: LRO descriptor per ring.
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL int
-__hal_lro_get_free_slot (xge_hal_lro_desc_t *ring_lro)
-{
- int i;
-
- for (i = 0; i < XGE_HAL_LRO_MAX_BUCKETS; i++) {
- lro_t *lro_temp = &ring_lro->lro_pool[i];
-
- if (!lro_temp->in_use)
- return i;
- }
- return -1;
-}
-
-/*
- * __hal_get_lro_session: Gets matching LRO session or creates one.
- * @eth_hdr: Ethernet header.
- * @ip: ip header.
- * @tcp: tcp header.
- * @lro: lro pointer
- * @ext_info: Descriptor info.
- * @hldev: Hal context.
- * @ring_lro: LRO descriptor per rx ring
- */
-__HAL_STATIC_CHANNEL __HAL_INLINE_CHANNEL xge_hal_status_e
-__hal_get_lro_session (u8 *eth_hdr,
- iplro_t *ip,
- tcplro_t *tcp,
- lro_t **lro,
- xge_hal_dtr_info_t *ext_info,
- xge_hal_device_t *hldev,
- xge_hal_lro_desc_t *ring_lro,
- lro_t **lro_end3 /* Valid only when ret=END_3 */)
-{
- lro_t *lro_match;
- int i, free_slot = -1;
- u32 tcp_seg_len;
- int ts_off = -1;
-
- *lro = lro_match = NULL;
- /*
- * Compare the incoming frame with the lro session left from the
- * previous call. There is a good chance that this incoming frame
- * matches the lro session.
- */
- if (ring_lro->lro_recent && ring_lro->lro_recent->in_use) {
- if (__hal_lro_check_for_session_match(ring_lro->lro_recent,
- tcp, ip)
- == XGE_HAL_OK)
- lro_match = ring_lro->lro_recent;
- }
-
- if (!lro_match) {
- /*
- * Search in the pool of LROs for the session that matches
- * the incoming frame.
- */
- for (i = 0; i < XGE_HAL_LRO_MAX_BUCKETS; i++) {
- lro_t *lro_temp = &ring_lro->lro_pool[i];
-
- if (!lro_temp->in_use) {
- if (free_slot == -1)
- free_slot = i;
- continue;
- }
-
- if (__hal_lro_check_for_session_match(lro_temp, tcp,
- ip) == XGE_HAL_OK) {
- lro_match = lro_temp;
- break;
- }
- }
- }
-
-
- if (lro_match) {
- /*
- * Matching LRO Session found
- */
- *lro = lro_match;
-
- if (lro_match->tcp_next_seq_num != xge_os_ntohl(tcp->seq)) {
- xge_debug_ring(XGE_ERR, "**retransmit **"
- "found***");
- hldev->stats.sw_dev_info_stats.lro_out_of_seq_pkt_cnt++;
- return XGE_HAL_INF_LRO_END_2;
- }
-
- if (XGE_HAL_OK != __hal_ip_lro_capable(ip, ext_info))
- {
- return XGE_HAL_INF_LRO_END_2;
- }
-
- if (XGE_HAL_OK != __hal_tcp_lro_capable(ip, tcp, lro_match,
- &ts_off)) {
- /*
- * Close the current session and open a new
- * LRO session with this packet,
- * provided it has tcp payload
- */
- tcp_seg_len = __hal_tcp_seg_len(ip, tcp);
- if (tcp_seg_len == 0)
- {
- return XGE_HAL_INF_LRO_END_2;
- }
-
- /* Get a free bucket */
- free_slot = __hal_lro_get_free_slot(ring_lro);
- if (free_slot == -1)
- {
- return XGE_HAL_INF_LRO_END_2;
- }
-
- /*
- * Open a new LRO session
- */
- __hal_open_lro_session (eth_hdr, ip, tcp, lro_end3,
- hldev, ring_lro, free_slot, tcp_seg_len,
- ts_off);
-
- return XGE_HAL_INF_LRO_END_3;
- }
-
- /*
- * The frame is good, in-sequence, can be LRO-ed;
- * take its (latest) ACK - unless it is a dupack.
- * Note: to be exact need to check window size as well..
- */
- if (lro_match->tcp_ack_num == tcp->ack_seq &&
- lro_match->tcp_seq_num == tcp->seq) {
- hldev->stats.sw_dev_info_stats.lro_dup_pkt_cnt++;
- return XGE_HAL_INF_LRO_END_2;
- }
-
- lro_match->tcp_seq_num = tcp->seq;
- lro_match->tcp_ack_num = tcp->ack_seq;
- lro_match->frags_len += __hal_tcp_seg_len(ip, tcp);
-
- ring_lro->lro_recent = lro_match;
-
- return XGE_HAL_INF_LRO_CONT;
- }
-
- /* ********** New Session ***************/
- if (free_slot == -1)
- return XGE_HAL_INF_LRO_UNCAPABLE;
-
- if (XGE_HAL_FAIL == __hal_ip_lro_capable(ip, ext_info))
- return XGE_HAL_INF_LRO_UNCAPABLE;
-
- if (XGE_HAL_FAIL == __hal_tcp_lro_capable(ip, tcp, NULL, &ts_off))
- return XGE_HAL_INF_LRO_UNCAPABLE;
-
- xge_debug_ring(XGE_TRACE, "Creating lro session.");
-
- /*
- * Open a LRO session, provided the packet contains payload.
- */
- tcp_seg_len = __hal_tcp_seg_len(ip, tcp);
- if (tcp_seg_len == 0)
- return XGE_HAL_INF_LRO_UNCAPABLE;
-
- __hal_open_lro_session (eth_hdr, ip, tcp, lro, hl