diff options
| author | Harry Moulton <harry.moulton@arm.com> | 2026-04-13 11:54:38 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2026-04-13 14:23:05 +0000 |
| commit | 58de79153622145cb6fc57bc92c4de678876992f (patch) | |
| tree | 8d84dcbcb3f895a04edabdd70617a5631dedfbb3 | |
| parent | aa555b6004d605ff0fd48832340b0c32f14d51d4 (diff) | |
arm64: mte: configure initial state for system registers
The fields in SCTLR_EL1 and HCR_EL2 for enabling MTE are set, and if the
ID_AA64PFR1_EL1 register shows MTE is present, the GCR_EL1 register is
also configured, and the two TFSR registers which hold pending tag check
faults are cleared.
Reviewed by: andrew
Sponsored by: Arm Ltd
Signed-off-by: Harry Moulton <harry.moulton@arm.com>
Differential Revision: https://reviews.freebsd.org/D55946
| -rw-r--r-- | sys/arm64/arm64/locore.S | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index f1228235dfe7..4c8e0c680321 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -398,7 +398,7 @@ LENTRY(enter_kernel_el) */ /* Configure the Hypervisor */ - ldr x2, =(HCR_RW | HCR_APK | HCR_API) + ldr x2, =(HCR_RW | HCR_APK | HCR_API | HCR_ATA) msr hcr_el2, x2 /* Stash value of HCR_EL2 for later */ @@ -1063,6 +1063,21 @@ LENTRY(start_mmu) isb ldr x2, mair + + /* + * If MTE is supported, configure GCR_EL1 and clear the TFSR registers of + * any pending tag check faults + */ + CHECK_CPU_FEAT(x3, ID_AA64PFR1, MTE, MTE, 1f) + + /* Set GCR_EL1, non-zero tags excluded by default */ + mov x3, #(GCR_Exclude_MASK | GCR_RRND) + msr GCR_EL1_REG, x3 + + /* Clear any pending tag check faults */ + msr TFSR_EL1_REG, xzr + msr TFSRE0_EL1_REG, xzr +1: msr mair_el1, x2 /* |