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authorJaeyoon Choi <jaeyoon@FreeBSD.org>2025-12-01 04:39:14 +0000
committerJaeyoon Choi <jaeyoon@FreeBSD.org>2025-12-01 04:40:42 +0000
commit5e0d065b5b90d4f4264d8248f39f199f1a2576dc (patch)
treec865752632d947f87382b044d6301dc257c0c465
parentba963776199f84775388a03d072121bf93707020 (diff)
ufshci: Enable WLUN scan
QEMU ufs device does not implement WLUN, so QUIRK is added. Reviewed by: imp (mentor) Sponsored by: Samsung Electronics Differential Revision: https://reviews.freebsd.org/D53921
-rw-r--r--sys/dev/ufshci/ufshci.h8
-rw-r--r--sys/dev/ufshci/ufshci_pci.c3
-rw-r--r--sys/dev/ufshci/ufshci_private.h2
-rw-r--r--sys/dev/ufshci/ufshci_sim.c6
4 files changed, 17 insertions, 2 deletions
diff --git a/sys/dev/ufshci/ufshci.h b/sys/dev/ufshci/ufshci.h
index 188f8c41def1..766d8de0535b 100644
--- a/sys/dev/ufshci/ufshci.h
+++ b/sys/dev/ufshci/ufshci.h
@@ -644,6 +644,14 @@ struct ufshci_completion {
typedef void (*ufshci_cb_fn_t)(void *, const struct ufshci_completion *, bool);
+/* UFS 4.1, section 10.8.5 "Well Known Logical Unit Defined in UFS" */
+enum ufshci_well_known_luns {
+ UFSHCI_WLUN_REPORT_LUNS = 0x81,
+ UFSHCI_WLUN_BOOT = 0xb0,
+ UFSHCI_WLUN_RPMB = 0xc4,
+ UFSHCI_WLUN_UFS_DEVICE = 0xd0,
+};
+
/*
* UFS Spec 4.1, section 14.1 "UFS Descriptors"
* All descriptors use big-endian byte ordering.
diff --git a/sys/dev/ufshci/ufshci_pci.c b/sys/dev/ufshci/ufshci_pci.c
index 992026fd4f4d..7f78e462db72 100644
--- a/sys/dev/ufshci/ufshci_pci.c
+++ b/sys/dev/ufshci/ufshci_pci.c
@@ -50,7 +50,8 @@ static struct _pcsid {
uint32_t quirks;
} pci_ids[] = { { 0x131b36, "QEMU UFS Host Controller", UFSHCI_REF_CLK_19_2MHz,
UFSHCI_QUIRK_IGNORE_UIC_POWER_MODE |
- UFSHCI_QUIRK_NOT_SUPPORT_ABORT_TASK },
+ UFSHCI_QUIRK_NOT_SUPPORT_ABORT_TASK |
+ UFSHCI_QUIRK_SKIP_WELL_KNOWN_LUNS },
{ 0x98fa8086, "Intel Lakefield UFS Host Controller",
UFSHCI_REF_CLK_19_2MHz,
UFSHCI_QUIRK_LONG_PEER_PA_TACTIVATE |
diff --git a/sys/dev/ufshci/ufshci_private.h b/sys/dev/ufshci/ufshci_private.h
index ec388c06e248..3cee021880a8 100644
--- a/sys/dev/ufshci/ufshci_private.h
+++ b/sys/dev/ufshci/ufshci_private.h
@@ -266,6 +266,8 @@ struct ufshci_controller {
8 /* Need to change the number of lanes before changing HS-GEAR. */
#define UFSHCI_QUIRK_NOT_SUPPORT_ABORT_TASK \
16 /* QEMU does not support Task Management Request */
+#define UFSHCI_QUIRK_SKIP_WELL_KNOWN_LUNS \
+ 32 /* QEMU does not support Well known logical units*/
uint32_t ref_clk;
diff --git a/sys/dev/ufshci/ufshci_sim.c b/sys/dev/ufshci/ufshci_sim.c
index 1b80df089a46..db2e194b699b 100644
--- a/sys/dev/ufshci/ufshci_sim.c
+++ b/sys/dev/ufshci/ufshci_sim.c
@@ -231,11 +231,15 @@ ufshci_cam_action(struct cam_sim *sim, union ccb *ccb)
return;
case XPT_PATH_INQ: {
struct ccb_pathinq *cpi = &ccb->cpi;
+ uint32_t need_scan_wluns = 0;
+
+ if (!(ctrlr->quirks & UFSHCI_QUIRK_SKIP_WELL_KNOWN_LUNS))
+ need_scan_wluns = PIM_WLUNS;
cpi->version_num = 1;
cpi->hba_inquiry = PI_SDTR_ABLE | PI_TAG_ABLE;
cpi->target_sprt = 0;
- cpi->hba_misc = PIM_UNMAPPED | PIM_NO_6_BYTE;
+ cpi->hba_misc = need_scan_wluns | PIM_UNMAPPED | PIM_NO_6_BYTE;
cpi->hba_eng_cnt = 0;
cpi->max_target = 0;
cpi->max_lun = ctrlr->max_lun_count;