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authorAndrew Rybchenko <arybchik@FreeBSD.org>2016-10-10 09:54:01 +0000
committerAndrew Rybchenko <arybchik@FreeBSD.org>2016-10-10 09:54:01 +0000
commit622429035a42fcdf71b75a9d37b7f85cfe65b075 (patch)
tree90e44b181ab0d87648ecfe648d73d76fdf850ac7
parent5d67f6752bf999de1507bf9895766eb92d85c73d (diff)
downloadsrc-622429035a42fcdf71b75a9d37b7f85cfe65b075.tar.gz
src-622429035a42fcdf71b75a9d37b7f85cfe65b075.zip
sfxge(4): sync tlv_layout.h with firmwaresrc and update port-mode definition use
It fixes driver attach issue to a new firmware which reports a new port-modes. Reviewed by: gnn Submitted by: Tom Millington <tmillington at solarflare.com> Sponsored by: Solarflare Communications, Inc. MFC after: 2 days Differential Revision: https://reviews.freebsd.org/D8203
Notes
Notes: svn path=/head/; revision=306944
-rw-r--r--sys/dev/sfxge/common/ef10_nic.c8
-rw-r--r--sys/dev/sfxge/common/ef10_tlv_layout.h32
2 files changed, 29 insertions, 11 deletions
diff --git a/sys/dev/sfxge/common/ef10_nic.c b/sys/dev/sfxge/common/ef10_nic.c
index 3c4058840a70..4d841675649d 100644
--- a/sys/dev/sfxge/common/ef10_nic.c
+++ b/sys/dev/sfxge/common/ef10_nic.c
@@ -164,6 +164,7 @@ ef10_nic_get_port_mode_bandwidth(
break;
case TLV_PORT_MODE_10G_10G_10G_10G:
case TLV_PORT_MODE_10G_10G_10G_10G_Q:
+ case TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2:
case TLV_PORT_MODE_10G_10G_10G_10G_Q2:
bandwidth = 10000 * 4;
break;
@@ -1122,8 +1123,7 @@ static struct {
{
EFX_FAMILY_MEDFORD,
(1 << TLV_PORT_MODE_10G) |
- (1 << TLV_PORT_MODE_10G_10G) |
- (1 << TLV_PORT_MODE_10G_10G_10G_10G),
+ (1 << TLV_PORT_MODE_10G_10G),
1
},
/* Supported modes requiring 2 outputs per port */
@@ -1140,13 +1140,15 @@ static struct {
(1 << TLV_PORT_MODE_40G) |
(1 << TLV_PORT_MODE_40G_40G) |
(1 << TLV_PORT_MODE_40G_10G_10G) |
- (1 << TLV_PORT_MODE_10G_10G_40G),
+ (1 << TLV_PORT_MODE_10G_10G_40G) |
+ (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2),
2
},
/* Supported modes requiring 4 outputs per port */
{
EFX_FAMILY_MEDFORD,
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q) |
+ (1 << TLV_PORT_MODE_10G_10G_10G_10G_Q1) |
(1 << TLV_PORT_MODE_10G_10G_10G_10G_Q2),
4
},
diff --git a/sys/dev/sfxge/common/ef10_tlv_layout.h b/sys/dev/sfxge/common/ef10_tlv_layout.h
index 811d7c327cb9..033cdf9ae41b 100644
--- a/sys/dev/sfxge/common/ef10_tlv_layout.h
+++ b/sys/dev/sfxge/common/ef10_tlv_layout.h
@@ -553,12 +553,14 @@ struct tlv_global_port_mode {
#define TLV_PORT_MODE_40G (1) /* 40G, single QSFP/40G-KR */
#define TLV_PORT_MODE_10G_10G (2) /* 2x10G, dual SFP/10G-KR or single QSFP */
#define TLV_PORT_MODE_40G_40G (3) /* 40G + 40G, dual QSFP/40G-KR (Greenport, Medford) */
-#define TLV_PORT_MODE_10G_10G_10G_10G (4) /* 2x10G + 2x10G, quad SFP/10G-KR or dual QSFP (Greenport, Medford) */
-#define TLV_PORT_MODE_10G_10G_10G_10G_Q (5) /* 4x10G, single QSFP, cage 0 (Medford) */
+#define TLV_PORT_MODE_10G_10G_10G_10G (4) /* 2x10G + 2x10G, quad SFP/10G-KR or dual QSFP (Greenport) */
+#define TLV_PORT_MODE_10G_10G_10G_10G_Q1 (4) /* 4x10G, single QSFP, cage 0 (Medford) */
+#define TLV_PORT_MODE_10G_10G_10G_10G_Q (5) /* 4x10G, single QSFP, cage 0 (Medford) OBSOLETE DO NOT USE */
#define TLV_PORT_MODE_40G_10G_10G (6) /* 1x40G + 2x10G, dual QSFP (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_40G (7) /* 2x10G + 1x40G, dual QSFP (Greenport, Medford) */
#define TLV_PORT_MODE_10G_10G_10G_10G_Q2 (8) /* 4x10G, single QSFP, cage 1 (Medford) */
-#define TLV_PORT_MODE_MAX TLV_PORT_MODE_10G_10G_10G_10G_Q2
+#define TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2 (9) /* 2x10G + 2x10G, dual QSFP (Medford) */
+#define TLV_PORT_MODE_MAX TLV_PORT_MODE_10G_10G_10G_10G_Q1_Q2
};
/* Type of the v-switch created implicitly by the firmware */
@@ -765,8 +767,8 @@ struct tlv_rx_event_merging_config {
#define TLV_RX_EVENT_MERGING_CONFIG_MAX_EVENTS_MAX ((1 << 4) - 1)
uint32_t timeout_ns;
};
-#define TLV_RX_EVENT_MERGING_MAX_EVENTS_DEFAULT 7
-#define TLV_RX_EVENT_MERGING_TIMEOUT_NS_DEFAULT 8740
+#define TLV_RX_EVENT_MERGING_MAX_EVENTS_DEFAULT (0xffffffff)
+#define TLV_RX_EVENT_MERGING_TIMEOUT_NS_DEFAULT (0xffffffff)
#define TLV_TAG_PCIE_LINK_SETTINGS (0x101f0000)
struct tlv_pcie_link_settings {
@@ -791,9 +793,9 @@ struct tlv_tx_event_merging_config {
uint32_t timeout_ns;
uint32_t qempty_timeout_ns; /* Medford only */
};
-#define TLV_TX_EVENT_MERGING_MAX_EVENTS_DEFAULT 7
-#define TLV_TX_EVENT_MERGING_TIMEOUT_NS_DEFAULT 1400
-#define TLV_TX_EVENT_MERGING_QEMPTY_TIMEOUT_NS_DEFAULT 700
+#define TLV_TX_EVENT_MERGING_MAX_EVENTS_DEFAULT (0xffffffff)
+#define TLV_TX_EVENT_MERGING_TIMEOUT_NS_DEFAULT (0xffffffff)
+#define TLV_TX_EVENT_MERGING_QEMPTY_TIMEOUT_NS_DEFAULT (0xffffffff)
/* Tx vFIFO Low latency configuration
*
@@ -809,6 +811,20 @@ struct tlv_tx_vfifo_ull_mode {
#define TLV_TX_VFIFO_ULL_MODE_DEFAULT 0
};
+/* BIU mode
+ *
+ * Medford2 tag for selecting VI window decode (see values below)
+ */
+#define TLV_TAG_BIU_VI_WINDOW_MODE (0x10280000)
+struct tlv_biu_vi_window_mode {
+ uint32_t tag;
+ uint32_t length;
+ uint8_t mode;
+#define TLV_BIU_VI_WINDOW_MODE_8K 0 /* 8k per VI, CTPIO not mapped, medford/hunt compatible */
+#define TLV_BIU_VI_WINDOW_MODE_16K 1 /* 16k per VI, CTPIO mapped */
+#define TLV_BIU_VI_WINDOW_MODE_64K 2 /* 64k per VI, CTPIO mapped, POWER-friendly */
+};
+
#define TLV_TAG_LICENSE (0x30800000)
typedef struct tlv_license {