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authorOlivier Houchard <cognet@FreeBSD.org>2021-06-30 20:56:50 +0000
committerOlivier Houchard <cognet@FreeBSD.org>2021-06-30 20:56:50 +0000
commit8c3bd133dd52824e427e350c65eae1fd9eb5a3cd (patch)
treeca1b3c4e0c2c5f7f44167f49d088f8c9c5c51b2f
parentd75d33870df197309e40d07541b8547447e20286 (diff)
downloadsrc-8c3bd133dd52824e427e350c65eae1fd9eb5a3cd.tar.gz
src-8c3bd133dd52824e427e350c65eae1fd9eb5a3cd.zip
arm: Make sure we can handle a thumb entry point.
Similarly to what's been done on arm64 with commit 712c060c94fd447c91b0e6218c12a431206b487a, when executing a binary, if the entry point is a thumb symbol, then make sure we set the PSL_T flag, otherwise the CPU will interpret it in ARM mode, and that will likely leads to an undefined instruction. PR: 256899 MFC after: 1 week
-rw-r--r--sys/arm/arm/machdep.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c
index 4f26c6e9ebf9..c852187087b3 100644
--- a/sys/arm/arm/machdep.c
+++ b/sys/arm/arm/machdep.c
@@ -346,6 +346,8 @@ exec_setregs(struct thread *td, struct image_params *imgp, uintptr_t stack)
tf->tf_svc_lr = 0x77777777;
tf->tf_pc = imgp->entry_addr;
tf->tf_spsr = PSR_USR32_MODE;
+ if ((register_t)imgp->entry_addr & 1)
+ tf->tf_spsr |= PSR_T;
}
#ifdef VFP