diff options
| author | Justin Hibbits <jhibbits@FreeBSD.org> | 2026-02-03 15:11:19 +0000 |
|---|---|---|
| committer | Justin Hibbits <jhibbits@FreeBSD.org> | 2026-02-03 15:15:24 +0000 |
| commit | 93450913086e7f0478b609367d5f1d4c740cb941 (patch) | |
| tree | befbeeb8859031aa9ca29ccf63237b46f78e8423 | |
| parent | 9d4bad45e233ca7d93666ff1feff6282a88f8a9d (diff) | |
powerpc/pmap: Use a constant for HPT superpage shift
There are no plans to allow multiple sizes of HPT superpages, so just use a
constant for it.
MFC after: 3 weeks
Fixes: 1bc75d77e9 ("powerpc/pmap/oea64: Make PV_LOCK superpage sized")
| -rw-r--r-- | sys/powerpc/aim/mmu_oea64.c | 4 | ||||
| -rw-r--r-- | sys/powerpc/include/pte.h | 5 |
2 files changed, 5 insertions, 4 deletions
diff --git a/sys/powerpc/aim/mmu_oea64.c b/sys/powerpc/aim/mmu_oea64.c index 4757e469b5d7..c82c5c539de2 100644 --- a/sys/powerpc/aim/mmu_oea64.c +++ b/sys/powerpc/aim/mmu_oea64.c @@ -125,7 +125,7 @@ uintptr_t moea64_get_unique_vsid(void); #define PV_LOCK_COUNT MAXCPU static struct mtx_padalign pv_lock[PV_LOCK_COUNT]; -#define PV_LOCK_SHIFT HPT_SP_SIZE +#define PV_LOCK_SHIFT HPT_SP_SHIFT #define pa_index(pa) ((pa) >> PV_LOCK_SHIFT) /* @@ -890,7 +890,7 @@ moea64_early_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) int rm_pavail; /* Level 0 reservations consist of 4096 pages (16MB superpage). */ - vm_level_0_order = 12; + vm_level_0_order = VM_LEVEL_0_ORDER_HPT; #ifndef __powerpc64__ /* We don't have a direct map since there is no BAT */ diff --git a/sys/powerpc/include/pte.h b/sys/powerpc/include/pte.h index ed926f80c879..2e8cdacbe165 100644 --- a/sys/powerpc/include/pte.h +++ b/sys/powerpc/include/pte.h @@ -145,10 +145,11 @@ typedef struct lpte lpte_t; #define LPTE_RO LPTE_BR /* HPT superpage definitions */ -#define HPT_SP_SHIFT (VM_LEVEL_0_ORDER + PAGE_SHIFT) +#define VM_LEVEL_0_ORDER_HPT 12 +#define HPT_SP_SHIFT (VM_LEVEL_0_ORDER_HPT + PAGE_SHIFT) #define HPT_SP_SIZE (1 << HPT_SP_SHIFT) #define HPT_SP_MASK (HPT_SP_SIZE - 1) -#define HPT_SP_PAGES (1 << VM_LEVEL_0_ORDER) +#define HPT_SP_PAGES (1 << VM_LEVEL_0_ORDER_HPT) /* POWER ISA 3.0 Radix Table Definitions */ #define RPTE_VALID 0x8000000000000000ULL |