diff options
| author | Olivier Certner <olce@FreeBSD.org> | 2026-06-25 14:35:32 +0000 |
|---|---|---|
| committer | Olivier Certner <olce@FreeBSD.org> | 2026-06-26 13:37:51 +0000 |
| commit | c0acab934a174761b4f0e94c263bbe90c0529fab (patch) | |
| tree | 46d1e07ef8c9f7a19c493569d4577c825aaf5781 | |
| parent | 486ef221b9350644d6ad9a6ad93603d93cef6712 (diff) | |
hwpstate_intel(4): Fix two MSR errors being conflated
HWP_ERROR_CPPC_REQUEST_WRITE and HWP_ERROR_CPPC_REQUEST_PKG had been
assigned the same number.
Fixes: 29b8220b179b ("hwpstate_intel: Use ipi instead of thread_lock + sched_bind")
Event: Halifax Hackathon 202606
Location: jrm@'s living room
Sponsored by: The FreeBSD Foundation
| -rw-r--r-- | sys/x86/cpufreq/hwpstate_intel.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/sys/x86/cpufreq/hwpstate_intel.c b/sys/x86/cpufreq/hwpstate_intel.c index 844bebfc7274..3ee97772e122 100644 --- a/sys/x86/cpufreq/hwpstate_intel.c +++ b/sys/x86/cpufreq/hwpstate_intel.c @@ -128,12 +128,12 @@ MODULE_VERSION(hwpstate_intel, 1); /* * Internal errors conveyed by code executing on another CPU. */ -#define HWP_ERROR_CPPC_ENABLE (1 << 0) -#define HWP_ERROR_CPPC_CAPS (1 << 1) -#define HWP_ERROR_CPPC_REQUEST (1 << 2) -#define HWP_ERROR_CPPC_REQUEST_WRITE (1 << 3) -#define HWP_ERROR_CPPC_REQUEST_PKG (1 << 3) -#define HWP_ERROR_CPPC_EPP_WRITE (1 << 4) +#define HWP_ERROR_CPPC_ENABLE (1 << 0) +#define HWP_ERROR_CPPC_CAPS (1 << 1) +#define HWP_ERROR_CPPC_REQUEST (1 << 2) +#define HWP_ERROR_CPPC_REQUEST_WRITE (1 << 3) +#define HWP_ERROR_CPPC_REQUEST_PKG (1 << 4) +#define HWP_ERROR_CPPC_EPP_WRITE (1 << 5) static inline bool hwp_has_error(u_int res, u_int err) |