diff options
| author | Eric Joyner <erj@FreeBSD.org> | 2024-08-30 00:58:55 +0000 |
|---|---|---|
| committer | Eric Joyner <erj@FreeBSD.org> | 2024-10-31 16:50:48 +0000 |
| commit | e53a21abdf2953714e44e3c54b4bb78557cb096c (patch) | |
| tree | a5d8d4c3ae67e799854820986607f39837941110 | |
| parent | b6d4e3bee350b881b5efea03068c1247985b12fe (diff) | |
iavf(4): Get MSI-X BAR index at runtime instead of hardcoding it
This allows iavf to load on E830 devices since those devices place their MSI-X
BAR at a different location than in previous 800 series products.
Signed-off-by: Eric Joyner <erj@FreeBSD.org>
Sponsored by: Intel Corporation
Differential Revision: https://reviews.freebsd.org/D46952
| -rw-r--r-- | sys/dev/iavf/iavf_lib.c | 7 | ||||
| -rw-r--r-- | sys/dev/iavf/if_iavf_iflib.c | 4 |
2 files changed, 6 insertions, 5 deletions
diff --git a/sys/dev/iavf/iavf_lib.c b/sys/dev/iavf/iavf_lib.c index f80e3765448f..3116ce0501c2 100644 --- a/sys/dev/iavf/iavf_lib.c +++ b/sys/dev/iavf/iavf_lib.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright (c) 2021, Intel Corporation +/* Copyright (c) 2024, Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -1479,10 +1479,11 @@ iavf_update_msix_devinfo(device_t dev) { struct pci_devinfo *dinfo; u32 msix_ctrl; + u8 msix_location; dinfo = (struct pci_devinfo *)device_get_ivars(dev); - /* We can hardcode this offset since we know the device */ - msix_ctrl = pci_read_config(dev, 0x70 + PCIR_MSIX_CTRL, 2); + msix_location = dinfo->cfg.msix.msix_location; + msix_ctrl = pci_read_config(dev, msix_location + PCIR_MSIX_CTRL, 2); dinfo->cfg.msix.msix_ctrl = msix_ctrl; dinfo->cfg.msix.msix_msgnum = (msix_ctrl & PCIM_MSIXCTRL_TABLE_SIZE) + 1; } diff --git a/sys/dev/iavf/if_iavf_iflib.c b/sys/dev/iavf/if_iavf_iflib.c index 714d34eeebe5..d460df6e0d25 100644 --- a/sys/dev/iavf/if_iavf_iflib.c +++ b/sys/dev/iavf/if_iavf_iflib.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause */ -/* Copyright (c) 2021, Intel Corporation +/* Copyright (c) 2024, Intel Corporation * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -370,7 +370,7 @@ iavf_if_attach_pre(if_ctx_t ctx) } scctx->isc_rxqsizes[0] = roundup2(scctx->isc_nrxd[0] * sizeof(union iavf_32byte_rx_desc), DBA_ALIGN); - scctx->isc_msix_bar = PCIR_BAR(IAVF_MSIX_BAR); + scctx->isc_msix_bar = pci_msix_table_bar(dev); scctx->isc_tx_nsegments = IAVF_MAX_TX_SEGS; scctx->isc_tx_tso_segments_max = IAVF_MAX_TSO_SEGS; scctx->isc_tx_tso_size_max = IAVF_TSO_SIZE; |