diff options
authorMark Johnston <markj@FreeBSD.org>2022-08-05 20:21:09 +0000
committerMark Johnston <markj@FreeBSD.org>2022-08-05 20:21:09 +0000
commite9552d8b45d67ca44d91b3ec09c91253e7e99b28 (patch)
parent52a54b96ed1b7c0a1c04fc7651a1fc036bdc5bbc (diff)
arm: Clear TTBCR before enabling the MMU
Upon reset, this register is supposed to have a value of zero. But when booting certain v7 CPUs in QEMU, we enter the kernel with several bits set, including the EAE bit, which enables ARM's PAE extension. I'm not sure if QEMU is setting it or if it's the uboot loader. Because FreeBSD doesn't implement that extension and uses regular 32-bit page tables, the kernel hangs immediately after enabling the MMU. Just clear everything in TTBCR before enabling the MMU, to match the reset value. FreeBSD doesn't toggle anything in that register. PR: 251187 Reviewed by: imp MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D36041
1 files changed, 7 insertions, 0 deletions
diff --git a/sys/arm/arm/locore-v6.S b/sys/arm/arm/locore-v6.S
index d796e6267cdc..ad96b0b9d638 100644
--- a/sys/arm/arm/locore-v6.S
+++ b/sys/arm/arm/locore-v6.S
@@ -295,6 +295,13 @@ ASENTRY_NP(init_mmu)
mcr CP15_DACR(r0)
+ * Ensure that LPAE is disabled and that TTBR0 is used for translation,
+ * use a 16KB translation table
+ */
+ mov r0, #0
+ mcr CP15_TTBCR(r0)
+ /*
* Set TEX remap registers
* - All is set to uncacheable memory