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authorAndrew Turner <andrew@FreeBSD.org>2025-09-04 14:58:54 +0000
committerAndrew Turner <andrew@FreeBSD.org>2025-09-04 14:58:54 +0000
commitefb1c4bac122e7acb6aa4e180db66e14cfd19810 (patch)
treeded76abeaaf56fb633acd00b7722b87b96790a86
parent1ae3694edb8bb5f4d4831a18878677eb491861fb (diff)
arm64: Update the Neoverse-N1 1542419 errata check
Use the new midr_check_var_part_range function to check if running on an affected Neoverse-N1 CPU. Reviewed by: emaste Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D52189
-rw-r--r--sys/arm64/arm64/identcpu.c26
1 files changed, 7 insertions, 19 deletions
diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c
index f271891f423d..a001be200518 100644
--- a/sys/arm64/arm64/identcpu.c
+++ b/sys/arm64/arm64/identcpu.c
@@ -2272,25 +2272,13 @@ static const struct mrs_user_reg user_regs[] = {
static bool
user_ctr_has_neoverse_n1_1542419(uint32_t midr, uint64_t ctr)
{
- /* Skip non-Neoverse-N1 */
- if (!CPU_MATCH(CPU_IMPL_MASK | CPU_PART_MASK, CPU_IMPL_ARM,
- CPU_PART_NEOVERSE_N1, 0, 0))
- return (false);
-
- switch (CPU_VAR(midr)) {
- default:
- break;
- case 4:
- /* Fixed in r4p1 */
- if (CPU_REV(midr) > 0)
- break;
- /* FALLTHROUGH */
- case 3:
- /* If DIC is enabled (coherent icache) then we are affected */
- return (CTR_DIC_VAL(ctr) != 0);
- }
-
- return (false);
+ /*
+ * Neoverse-N1 erratum 1542419
+ * Present in r3p0 - r4p0
+ * Fixed in r4p1
+ */
+ return (midr_check_var_part_range(midr, CPU_IMPL_ARM,
+ CPU_PART_NEOVERSE_N1, 3, 0, 4, 0) && CTR_DIC_VAL(ctr) != 0);
}
static cpu_feat_en