arm64, qoriq_therm: fix handling sites on version 1 and 2

For version 2 extend the TMUV2_TMSAR() write loop over all site_ids
registered for a particular SoC and actually use the site_id rather
than always just the first [0] (which for the LX2080 would be a
problem given there is no site0).

Later, while version 2 adds the SITEs to enable to TMSR in bits 0..<n>,
version 1 (e.g., LS1028, LS1046, LS1088) add MSITEs to TMR
bits 16..31 or rather 15..0(16-<n>).  Adjust the loops to only enable
the site_ids listed for the particular SoC for monitoring.  This now
also deals with sparse site_ids (not starting at 0, or not being
contiguous).

MFC after:	1 week
Sponsored by:	Traverse Technologies (providing Ten64 HW for testing)
Reviewed by:	mmel
Differential Revision: https://reviews.freebsd.org/D35764

1 files changed, 7 insertions, 3 deletions

diff --git a/sys/arm64/qoriq/qoriq_therm.c b/sys/arm64/qoriq/qoriq_therm.c
index f0c1dc1775eb..52c699f3812c 100644
--- a/sys/arm64/qoriq/qoriq_therm.c
+++ b/sys/arm64/qoriq/qoriq_therm.c
@@ -435,8 +435,8 @@ qoriq_therm_attach(device_t dev)
 		WR4(sc, TMUV2_TMTMIR, 0x0F);	/* disable */
 		/* these registers are not of settings is not in TRM */
 		WR4(sc, TMUV2_TEUMR(0), 0x51009c00);
-		for (int i = 0; i < 7; i++)
-			WR4(sc, TMUV2_TMSAR(0), 0xE);
+		for (int i = 0; i < sc->ntsensors; i++)
+			WR4(sc, TMUV2_TMSAR(sc->tsensors[i].site_id), 0xE);
 	}
 
 	/* prepare calibration tables */
@@ -447,10 +447,14 @@ qoriq_therm_attach(device_t dev)
 		goto fail;
 	}
 	/* start monitoring */
-	sites = (1U << sc->ntsensors) - 1;
+	sites = 0;
 	if (sc->ver == 1) {
+		for (int i = 0; i < sc->ntsensors; i++)
+			sites |= 1 << (15 - sc->tsensors[i].site_id);
 		WR4(sc, TMU_TMR, 0x8C000000 | sites);
 	} else {
+		for (int i = 0; i < sc->ntsensors; i++)
+			sites |= 1 << sc->tsensors[i].site_id;
 		WR4(sc, TMUV2_TMSR, sites);
 		WR4(sc, TMU_TMR, 0x83000000);
 	}