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| author | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2016-07-27 10:33:45 +0000 |
| commit | c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5 (patch) | |
| tree | 2a59dacd09463974e72f84b0e05f237b0ba3f57b /Bindings/media/renesas,jpu.txt | |
| parent | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (diff) | |
| download | src-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.tar.gz src-c7716441be3a4a48aa7b7cdf69a15625c1cd8ef5.zip | |
Import the updated devicetree files fromvendor/device-tree/devicetree-965f3718
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=303380
svn path=/vendor/device-tree/devicetree-965f3718/; revision=303381; tag=vendor/device-tree/devicetree-965f3718
Diffstat (limited to 'Bindings/media/renesas,jpu.txt')
| -rw-r--r-- | Bindings/media/renesas,jpu.txt | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/Bindings/media/renesas,jpu.txt b/Bindings/media/renesas,jpu.txt index 0cb94201bf92..d3436e5190f9 100644 --- a/Bindings/media/renesas,jpu.txt +++ b/Bindings/media/renesas,jpu.txt @@ -5,11 +5,12 @@ and decoding function conforming to the JPEG baseline process, so that the JPU can encode image data and decode JPEG data quickly. Required properties: - - compatible: should containg one of the following: - - "renesas,jpu-r8a7790" for R-Car H2 - - "renesas,jpu-r8a7791" for R-Car M2-W - - "renesas,jpu-r8a7792" for R-Car V2H - - "renesas,jpu-r8a7793" for R-Car M2-N +- compatible: "renesas,jpu-<soctype>", "renesas,rcar-gen2-jpu" as fallback. + Examples with soctypes are: + - "renesas,jpu-r8a7790" for R-Car H2 + - "renesas,jpu-r8a7791" for R-Car M2-W + - "renesas,jpu-r8a7792" for R-Car V2H + - "renesas,jpu-r8a7793" for R-Car M2-N - reg: Base address and length of the registers block for the JPU. - interrupts: JPU interrupt specifier. @@ -17,7 +18,7 @@ Required properties: Example: R8A7790 (R-Car H2) JPU node jpeg-codec@fe980000 { - compatible = "renesas,jpu-r8a7790"; + compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; reg = <0 0xfe980000 0 0x10300>; interrupts = <0 272 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp1_clks R8A7790_CLK_JPU>; |