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authorEmmanuel Vadot <manu@FreeBSD.org>2018-04-20 18:44:52 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2018-04-20 18:44:52 +0000
commit29087c4e73c74afd082d107f4cdd648f5c3169ec (patch)
tree64e25ca30c2072519bf087c4f6d56b46644e62d2 /Bindings/pinctrl/mscc,ocelot-pinctrl.txt
parent16ae49e2bea5badc71c2265966ec2a9b0ba541dc (diff)
downloadsrc-29087c4e73c74afd082d107f4cdd648f5c3169ec.tar.gz
src-29087c4e73c74afd082d107f4cdd648f5c3169ec.zip
dts: Update our copy from files from Linux 4.16vendor/device-tree/4.16
Notes
Notes: svn path=/vendor/device-tree/dist/; revision=332836 svn path=/vendor/device-tree/4.16/; revision=332837; tag=vendor/device-tree/4.16
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+Microsemi Ocelot pin controller Device Tree Bindings
+----------------------------------------------------
+
+Required properties:
+ - compatible : Should be "mscc,ocelot-pinctrl"
+ - reg : Address and length of the register set for the device
+ - gpio-controller : Indicates this device is a GPIO controller
+ - #gpio-cells : Must be 2.
+ The first cell is the pin number and the
+ second cell specifies GPIO flags, as defined in
+ <dt-bindings/gpio/gpio.h>.
+ - gpio-ranges : Range of pins managed by the GPIO controller.
+
+
+The ocelot-pinctrl driver uses the generic pin multiplexing and generic pin
+configuration documented in pinctrl-bindings.txt.
+
+The following generic properties are supported:
+ - function
+ - pins
+
+Example:
+ gpio: pinctrl@71070034 {
+ compatible = "mscc,ocelot-pinctrl";
+ reg = <0x71070034 0x28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&gpio 0 0 22>;
+
+ uart_pins: uart-pins {
+ pins = "GPIO_6", "GPIO_7";
+ function = "uart";
+ };
+
+ uart2_pins: uart2-pins {
+ pins = "GPIO_12", "GPIO_13";
+ function = "uart2";
+ };
+ };