Import updated device-tree files from:vendor/device-tree/ianc-afaecb70

 git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
 @afaecb70e7ebb983c86d5eb45ff952e9af79c462

1 files changed, 34 insertions, 0 deletions

diff --git a/Bindings/reset/hisilicon,hi6220-reset.txt b/Bindings/reset/hisilicon,hi6220-reset.txt
new file mode 100644
index 000000000000..e0b185a944ba
--- /dev/null
+++ b/Bindings/reset/hisilicon,hi6220-reset.txt
@@ -0,0 +1,34 @@
+Hisilicon System Reset Controller
+======================================
+
+Please also refer to reset.txt in this directory for common reset
+controller binding usage.
+
+The reset controller registers are part of the system-ctl block on
+hi6220 SoC.
+
+Required properties:
+- compatible: may be "hisilicon,hi6220-sysctrl"
+- reg: should be register base and length as documented in the
+  datasheet
+- #reset-cells: 1, see below
+
+Example:
+sys_ctrl: sys_ctrl@f7030000 {
+	compatible = "hisilicon,hi6220-sysctrl", "syscon";
+	reg = <0x0 0xf7030000 0x0 0x2000>;
+	#clock-cells = <1>;
+	#reset-cells = <1>;
+};
+
+Specifying reset lines connected to IP modules
+==============================================
+example:
+
+        uart1: serial@..... {
+                ...
+                resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;
+                ...
+        };
+
+The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.