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author | Warner Losh <imp@FreeBSD.org> | 2014-02-27 19:39:44 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2014-02-27 19:39:44 +0000 |
commit | 0d4a4b13019e01c1eab30b74c983040450010b81 (patch) | |
tree | ff6e99cffa59c3e85a311d8dd06e6f6dab4988b2 /Bindings/sound/ti,tas5086.txt | |
download | src-0d4a4b13019e01c1eab30b74c983040450010b81.tar.gz src-0d4a4b13019e01c1eab30b74c983040450010b81.zip |
Bring in Ian Campbell's pruned dts repo.vendor/device-tree/ianc-efa963ec
From git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
commit efa963ec806366c9628dfd1269316bb93b7ecb15
Merge: a72ba09 459c249
Author: Ian Campbell <ian.campbell@citrix.com>
Date: Wed Feb 26 08:39:16 2014 +0000
Merge tag 'v3.14-rc4-dts'
Linux 3.14-rc4
Notes
Notes:
svn path=/vendor/device-tree/; revision=262569
svn path=/vendor/device-tree/ianc-efa963ec/; revision=262576; tag=vendor/device-tree/ianc-efa963ec
Diffstat (limited to 'Bindings/sound/ti,tas5086.txt')
-rw-r--r-- | Bindings/sound/ti,tas5086.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/Bindings/sound/ti,tas5086.txt b/Bindings/sound/ti,tas5086.txt new file mode 100644 index 000000000000..d2866a0d6a26 --- /dev/null +++ b/Bindings/sound/ti,tas5086.txt @@ -0,0 +1,43 @@ +Texas Instruments TAS5086 6-channel PWM Processor + +Required properties: + + - compatible: Should contain "ti,tas5086". + - reg: The i2c address. Should contain <0x1b>. + +Optional properties: + + - reset-gpio: A GPIO spec to define which pin is connected to the + chip's !RESET pin. If specified, the driver will + assert a hardware reset at probe time. + + - ti,charge-period: This property should contain the time in microseconds + that closely matches the external single-ended + split-capacitor charge period. The hardware chip + waits for this period of time before starting the + PWM signals. This helps reduce pops and clicks. + + When not specified, the hardware default of 1300ms + is retained. + + - ti,mid-z-channel-X: Boolean properties, X being a number from 1 to 6. + If given, channel X will start with the Mid-Z start + sequence, otherwise the default Low-Z scheme is used. + + The correct configuration depends on how the power + stages connected to the PWM output pins work. Not all + power stages are compatible to Mid-Z - please refer + to the datasheets for more details. + + Most systems should not set any of these properties. + +Examples: + + i2c_bus { + tas5086@1b { + compatible = "ti,tas5086"; + reg = <0x1b>; + reset-gpio = <&gpio 23 0>; + ti,charge-period = <156000>; + }; + }; |