diff options
| author | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
|---|---|---|
| committer | Andrew Turner <andrew@FreeBSD.org> | 2016-01-28 20:21:15 +0000 |
| commit | 235ad806ee815395bce54dc1b0ce1c06cd29b44a (patch) | |
| tree | 41cbd9055ad0d6dfa04377df1bb51f3c3f3948e2 /Bindings/spi/sh-msiof.txt | |
| parent | da75c2cc5808a45edc76752ba495dcc5dcd4346c (diff) | |
| download | src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.tar.gz src-235ad806ee815395bce54dc1b0ce1c06cd29b44a.zip | |
Import updated device-tree files from:vendor/device-tree/ianc-afaecb70
git://xenbits.xen.org/people/ianc/device-tree-rebasing.git
@afaecb70e7ebb983c86d5eb45ff952e9af79c462
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=295011
svn path=/vendor/device-tree/ianc-afaecb70/; revision=295013; tag=vendor/device-tree/ianc-afaecb70
Diffstat (limited to 'Bindings/spi/sh-msiof.txt')
| -rw-r--r-- | Bindings/spi/sh-msiof.txt | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/Bindings/spi/sh-msiof.txt b/Bindings/spi/sh-msiof.txt index 4c388bb2f0a2..aa005c1d10d9 100644 --- a/Bindings/spi/sh-msiof.txt +++ b/Bindings/spi/sh-msiof.txt @@ -10,6 +10,7 @@ Required properties: "renesas,msiof-r8a7792" (R-Car V2H) "renesas,msiof-r8a7793" (R-Car M2-N) "renesas,msiof-r8a7794" (R-Car E2) + "renesas,msiof-sh73a0" (SH-Mobile AG5) - reg : A list of offsets and lengths of the register sets for the device. If only one register set is present, it is to be used @@ -51,7 +52,7 @@ Optional properties, deprecated for soctype-specific bindings: - renesas,tx-fifo-size : Overrides the default tx fifo size given in words (default is 64) - renesas,rx-fifo-size : Overrides the default rx fifo size given in words - (default is 64, or 256 on R-Car Gen2) + (default is 64) Pinctrl properties might be needed, too. See Documentation/devicetree/bindings/pinctrl/renesas,*. @@ -60,7 +61,7 @@ Example: msiof0: spi@e6e20000 { compatible = "renesas,msiof-r8a7791"; - reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; + reg = <0 0xe6e20000 0 0x0064>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; dmas = <&dmac0 0x51>, <&dmac0 0x52>; |