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| author | Dimitry Andric <dim@FreeBSD.org> | 2021-12-25 22:36:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2022-06-04 11:59:11 +0000 |
| commit | 8a84287b0edc66fc6dede3db770d10ff41da5464 (patch) | |
| tree | bb9f1a9efd9c27bbf1594795f8e16a76a572c4e1 /contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp | |
| parent | 574b7079b96703a748f89ef5adb7dc3e26b8f7fc (diff) | |
| download | src-8a84287b0edc66fc6dede3db770d10ff41da5464.tar.gz src-8a84287b0edc66fc6dede3db770d10ff41da5464.zip | |
Merge llvm-project main llvmorg-14-init-13186-g0c553cc1af2e
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and
openmp to llvmorg-14-init-13186-g0c553cc1af2e.
PR: 261742
MFC after: 2 weeks
(cherry picked from commit 0eae32dcef82f6f06de6419a0d623d7def0cc8f6)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp b/contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp index 4f364ef6afc7..9377e83524e1 100644 --- a/contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -4121,7 +4121,7 @@ MipsTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, case 'd': // Address register. Same as 'r' unless generating MIPS16 code. case 'y': // Same as 'r'. Exists for compatibility. case 'r': - if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8) { + if (VT == MVT::i32 || VT == MVT::i16 || VT == MVT::i8 || VT == MVT::i1) { if (Subtarget.inMips16Mode()) return std::make_pair(0U, &Mips::CPU16RegsRegClass); return std::make_pair(0U, &Mips::GPR32RegClass); |