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authorDimitry Andric <dim@FreeBSD.org>2022-08-13 15:37:04 +0000
committerDimitry Andric <dim@FreeBSD.org>2023-04-09 14:54:49 +0000
commita2e927433f9d66b477247c4d36da79c008cfa8a4 (patch)
tree7b42766cfbd1873929e65b114ee02ae26528ecdb /contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
parent74093eb27f687d9f89d8db457e410aec1cd71b6b (diff)
downloadsrc-a2e927433f9d66b477247c4d36da79c008cfa8a4.tar.gz
src-a2e927433f9d66b477247c4d36da79c008cfa8a4.zip
Merge llvm-project release/15.x llvmorg-15.0.0-rc2-40-gfbd2950d8d0d
This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and openmp to llvmorg-15.0.0-rc2-40-gfbd2950d8d0d. PR: 265425 MFC after: 2 weeks (cherry picked from commit 61cfbce3347e4372143bcabf7b197577b9f3958a)
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp')
-rw-r--r--contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp25
1 files changed, 4 insertions, 21 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
index fc0a983f6542..5d9bd2f67558 100644
--- a/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
@@ -1022,16 +1022,10 @@ void RISCVInsertVSETVLI::transferBefore(VSETVLIInfo &Info, const MachineInstr &M
return;
}
- // Two cases involving an AVL resulting from a previous vsetvli.
- // 1) If the AVL is the result of a previous vsetvli which has the
- // same AVL and VLMAX as our current state, we can reuse the AVL
- // from the current state for the new one. This allows us to
- // generate 'vsetvli x0, x0, vtype" or possible skip the transition
- // entirely.
- // 2) If AVL is defined by a vsetvli with the same VLMAX, we can
- // replace the AVL operand with the AVL of the defining vsetvli.
- // We avoid general register AVLs to avoid extending live ranges
- // without being sure we can kill the original source reg entirely.
+ // If AVL is defined by a vsetvli with the same VLMAX, we can
+ // replace the AVL operand with the AVL of the defining vsetvli.
+ // We avoid general register AVLs to avoid extending live ranges
+ // without being sure we can kill the original source reg entirely.
if (!Info.hasAVLReg() || !Info.getAVLReg().isVirtual())
return;
MachineInstr *DefMI = MRI->getVRegDef(Info.getAVLReg());
@@ -1039,17 +1033,6 @@ void RISCVInsertVSETVLI::transferBefore(VSETVLIInfo &Info, const MachineInstr &M
return;
VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI);
- // case 1
- if (PrevInfo.isValid() && !PrevInfo.isUnknown() &&
- DefInfo.hasSameAVL(PrevInfo) &&
- DefInfo.hasSameVLMAX(PrevInfo)) {
- if (PrevInfo.hasAVLImm())
- Info.setAVLImm(PrevInfo.getAVLImm());
- else
- Info.setAVLReg(PrevInfo.getAVLReg());
- return;
- }
- // case 2
if (DefInfo.hasSameVLMAX(Info) &&
(DefInfo.hasAVLImm() || DefInfo.getAVLReg() == RISCV::X0)) {
if (DefInfo.hasAVLImm())