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authorKris Kennaway <kris@FreeBSD.org>2000-09-10 08:31:17 +0000
committerKris Kennaway <kris@FreeBSD.org>2000-09-10 08:31:17 +0000
commitb66f2d16a0435b7e7f3edde6101797004ae8d3b9 (patch)
treec42b17e610c0f98d5a0dda76cbd9035109d60303 /crypto/openssh/crc32.c
parent2632b0c8756f2f5db4401143acdd2ebb7a871636 (diff)
downloadsrc-b66f2d16a0435b7e7f3edde6101797004ae8d3b9.tar.gz
src-b66f2d16a0435b7e7f3edde6101797004ae8d3b9.zip
Initial import of OpenSSH post-2.2.0 snapshot dated 2000-09-09
Notes
Notes: svn path=/vendor-crypto/openssh/dist/; revision=65668
Diffstat (limited to 'crypto/openssh/crc32.c')
-rw-r--r--crypto/openssh/crc32.c85
1 files changed, 39 insertions, 46 deletions
diff --git a/crypto/openssh/crc32.c b/crypto/openssh/crc32.c
index 42c99dad353e..a4e1f27b096a 100644
--- a/crypto/openssh/crc32.c
+++ b/crypto/openssh/crc32.c
@@ -1,55 +1,48 @@
/*
- * The implementation here was originally done by Gary S. Brown.
- * I have borrowed the tables directly, and made some minor changes
- * to the crc32-function (including changing the interface).
- * //ylo
+ * COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or
+ * code or tables extracted from it, as desired without restriction.
+ *
+ * First, the polynomial itself and its table of feedback terms. The
+ * polynomial is
+ * X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
+ *
+ * Note that we take it "backwards" and put the highest-order term in
+ * the lowest-order bit. The X^32 term is "implied"; the LSB is the
+ * X^31 term, etc. The X^0 term (usually shown as "+1") results in
+ * the MSB being 1
+ *
+ * Note that the usual hardware shift register implementation, which
+ * is what we're using (we're merely optimizing it by doing eight-bit
+ * chunks at a time) shifts bits into the lowest-order term. In our
+ * implementation, that means shifting towards the right. Why do we
+ * do it this way? Because the calculated CRC must be transmitted in
+ * order from highest-order term to lowest-order term. UARTs transmit
+ * characters in order from LSB to MSB. By storing the CRC this way
+ * we hand it to the UART in the order low-byte to high-byte; the UART
+ * sends each low-bit to hight-bit; and the result is transmission bit
+ * by bit from highest- to lowest-order term without requiring any bit
+ * shuffling on our part. Reception works similarly
+ *
+ * The feedback terms table consists of 256, 32-bit entries. Notes
+ *
+ * The table can be generated at runtime if desired; code to do so
+ * is shown later. It might not be obvious, but the feedback
+ * terms simply represent the results of eight shift/xor opera
+ * tions for all combinations of data and CRC register values
+ *
+ * The values must be right-shifted by eight bits by the "updcrc
+ * logic; the shift must be unsigned (bring in zeroes). On some
+ * hardware you could probably optimize the shift in assembler by
+ * using byte-swap instructions
+ * polynomial $edb88320
*/
+
#include "includes.h"
-RCSID("$Id: crc32.c,v 1.4 1999/11/24 00:26:01 deraadt Exp $");
+RCSID("$OpenBSD: crc32.c,v 1.7 2000/09/07 20:27:51 deraadt Exp $");
#include "crc32.h"
- /* ============================================================= */
- /* COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or */
- /* code or tables extracted from it, as desired without restriction. */
- /* */
- /* First, the polynomial itself and its table of feedback terms. The */
- /* polynomial is */
- /* X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0 */
- /* */
- /* Note that we take it "backwards" and put the highest-order term in */
- /* the lowest-order bit. The X^32 term is "implied"; the LSB is the */
- /* X^31 term, etc. The X^0 term (usually shown as "+1") results in */
- /* the MSB being 1. */
- /* */
- /* Note that the usual hardware shift register implementation, which */
- /* is what we're using (we're merely optimizing it by doing eight-bit */
- /* chunks at a time) shifts bits into the lowest-order term. In our */
- /* implementation, that means shifting towards the right. Why do we */
- /* do it this way? Because the calculated CRC must be transmitted in */
- /* order from highest-order term to lowest-order term. UARTs transmit */
- /* characters in order from LSB to MSB. By storing the CRC this way, */
- /* we hand it to the UART in the order low-byte to high-byte; the UART */
- /* sends each low-bit to hight-bit; and the result is transmission bit */
- /* by bit from highest- to lowest-order term without requiring any bit */
- /* shuffling on our part. Reception works similarly. */
- /* */
- /* The feedback terms table consists of 256, 32-bit entries. Notes: */
- /* */
- /* The table can be generated at runtime if desired; code to do so */
- /* is shown later. It might not be obvious, but the feedback */
- /* terms simply represent the results of eight shift/xor opera- */
- /* tions for all combinations of data and CRC register values. */
- /* */
- /* The values must be right-shifted by eight bits by the "updcrc" */
- /* logic; the shift must be unsigned (bring in zeroes). On some */
- /* hardware you could probably optimize the shift in assembler by */
- /* using byte-swap instructions. */
- /* polynomial $edb88320 */
- /* */
- /* -------------------------------------------------------------------- */
-
static unsigned int crc32_tab[] = {
0x00000000L, 0x77073096L, 0xee0e612cL, 0x990951baL, 0x076dc419L,
0x706af48fL, 0xe963a535L, 0x9e6495a3L, 0x0edb8832L, 0x79dcb8a4L,
@@ -108,7 +101,7 @@ static unsigned int crc32_tab[] = {
/* Return a 32-bit CRC of the contents of the buffer. */
unsigned int
-crc32(const unsigned char *s, unsigned int len)
+ssh_crc32(const unsigned char *s, unsigned int len)
{
unsigned int i;
unsigned int crc32val;