Vendor import of llvm r114020 (from the release_28 branch):vendor/llvm/llvm-r114020

http://llvm.org/svn/llvm-project/llvm/branches/release_28@114020

Approved by:	rpaulo (mentor)

1 files changed, 3 insertions, 3 deletions

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 407178777a34..4b2e261094bd 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -1457,8 +1457,8 @@ bool RegMapping_Fer::compatible_class(MachineFunction &mf,
    order to get and store values in memory. To assign a physical register to a
    virtual register present in a given operand,
    use <tt>MachineOperand::setReg(p_reg)</tt>. To insert a store instruction,
-   use <tt>TargetRegisterInfo::storeRegToStackSlot(...)</tt>, and to insert a
-   load instruction, use <tt>TargetRegisterInfo::loadRegFromStackSlot</tt>.</p>
+   use <tt>TargetInstrInfo::storeRegToStackSlot(...)</tt>, and to insert a
+   load instruction, use <tt>TargetInstrInfo::loadRegFromStackSlot</tt>.</p>
 
 <p>The indirect mapping shields the application developer from the complexities
    of inserting load and store instructions. In order to map a virtual register
@@ -2162,7 +2162,7 @@ MOVSX32rm16 -&gt; movsx, 32-bit register, 16-bit memory
 
   <a href="mailto:sabre@nondot.org">Chris Lattner</a><br>
   <a href="http://llvm.org">The LLVM Compiler Infrastructure</a><br>
-  Last modified: $Date: 2010-06-15 23:58:33 +0200 (Tue, 15 Jun 2010) $
+  Last modified: $Date: 2010-09-01 00:01:07 +0200 (Wed, 01 Sep 2010) $
 </address>
 
 </body>