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author | Ed Schouten <ed@FreeBSD.org> | 2009-06-06 08:20:29 +0000 |
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committer | Ed Schouten <ed@FreeBSD.org> | 2009-06-06 08:20:29 +0000 |
commit | f4fe016fa15f703fe9c1b932d1e81e2c718521db (patch) | |
tree | 8a1bbd1a5b838080d31e5c93a1817006b8c62318 /lib/CodeGen/SelectionDAG/SelectionDAG.cpp | |
parent | 68eb509bdc5c7007520d5231cd92de28106236df (diff) | |
download | src-f4fe016fa15f703fe9c1b932d1e81e2c718521db.tar.gz src-f4fe016fa15f703fe9c1b932d1e81e2c718521db.zip |
Import LLVM, at r72995.vendor/llvm/llvm-r72995
We should now have support for #pragma weak.
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=193574
svn path=/vendor/llvm/llvm-r72995/; revision=193575; tag=vendor/llvm/llvm-r72995
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAG.cpp')
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 195896ee89dc..a9adce8fdc5d 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -154,7 +154,7 @@ bool ISD::isBuildVectorAllZeros(const SDNode *N) { // Do not accept an all-undef vector. if (i == e) return false; - // Do not accept build_vectors that aren't all constants or which have non-~0 + // Do not accept build_vectors that aren't all constants or which have non-0 // elements. SDValue Zero = N->getOperand(i); if (isa<ConstantSDNode>(Zero)) { @@ -166,7 +166,7 @@ bool ISD::isBuildVectorAllZeros(const SDNode *N) { } else return false; - // Okay, we have at least one ~0 value, check to see if the rest match or are + // Okay, we have at least one 0 value, check to see if the rest match or are // undefs. for (++i; i != e; ++i) if (N->getOperand(i) != Zero && @@ -2807,16 +2807,19 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, MVT VT, case ISD::ADDC: case ISD::ADDE: case ISD::SUB: - case ISD::FADD: - case ISD::FSUB: - case ISD::FMUL: - case ISD::FDIV: - case ISD::FREM: case ISD::UDIV: case ISD::SDIV: case ISD::UREM: case ISD::SREM: return N2; // fold op(arg1, undef) -> undef + case ISD::FADD: + case ISD::FSUB: + case ISD::FMUL: + case ISD::FDIV: + case ISD::FREM: + if (UnsafeFPMath) + return N2; + break; case ISD::MUL: case ISD::AND: case ISD::SRL: @@ -3059,7 +3062,7 @@ bool MeetsMaxMemopRequirement(std::vector<MVT> &MemOps, isSrcStr = isMemSrcFromString(Src, Str); bool isSrcConst = isa<ConstantSDNode>(Src); bool AllowUnalign = TLI.allowsUnalignedMemoryAccesses(); - MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr); + MVT VT = TLI.getOptimalMemOpType(Size, Align, isSrcConst, isSrcStr, DAG); if (VT != MVT::iAny) { unsigned NewAlign = (unsigned) TLI.getTargetData()->getABITypeAlignment(VT.getTypeForMVT()); |