diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-01-04 22:11:11 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-01-04 22:11:11 +0000 |
| commit | c82ad72f63369bc462e59458f09960d66daa58a9 (patch) | |
| tree | 58bc455a8d052220f9ae11e65d6f06d671a7a4c4 /lib/Target/AMDGPU/SIInsertWaits.cpp | |
| parent | b915e9e0fc85ba6f398b3fab0db6a81a8913af94 (diff) | |
Vendor import of llvm trunk r291012:vendor/llvm/llvm-trunk-r291012
Diffstat (limited to 'lib/Target/AMDGPU/SIInsertWaits.cpp')
| -rw-r--r-- | lib/Target/AMDGPU/SIInsertWaits.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/lib/Target/AMDGPU/SIInsertWaits.cpp b/lib/Target/AMDGPU/SIInsertWaits.cpp index 202a1e9ed8ac..fceabd7a8fdd 100644 --- a/lib/Target/AMDGPU/SIInsertWaits.cpp +++ b/lib/Target/AMDGPU/SIInsertWaits.cpp @@ -504,7 +504,7 @@ void SIInsertWaits::handleSendMsg(MachineBasicBlock &MBB, return; // There must be "S_NOP 0" between an instruction writing M0 and S_SENDMSG. - if (LastInstWritesM0 && I->getOpcode() == AMDGPU::S_SENDMSG) { + if (LastInstWritesM0 && (I->getOpcode() == AMDGPU::S_SENDMSG || I->getOpcode() == AMDGPU::S_SENDMSGHALT)) { BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_NOP)).addImm(0); LastInstWritesM0 = false; return; @@ -619,7 +619,8 @@ bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) { // signalling other hardware blocks if ((I->getOpcode() == AMDGPU::S_BARRIER && ST->needWaitcntBeforeBarrier()) || - I->getOpcode() == AMDGPU::S_SENDMSG) + I->getOpcode() == AMDGPU::S_SENDMSG || + I->getOpcode() == AMDGPU::S_SENDMSGHALT) Required = LastIssued; else Required = handleOperands(*I); |