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authorRoman Divacky <rdivacky@FreeBSD.org>2010-03-16 16:51:38 +0000
committerRoman Divacky <rdivacky@FreeBSD.org>2010-03-16 16:51:38 +0000
commitc69102774f9739c81ae1285ed9ae62405071c63c (patch)
tree458dd25677a43aef6390ecadb4423817f00e08b0 /lib/Target/ARM/ARMConstantIslandPass.cpp
parentea5b2dd11c0526581803e7eb58224a2eabf191e6 (diff)
downloadsrc-c69102774f9739c81ae1285ed9ae62405071c63c.tar.gz
src-c69102774f9739c81ae1285ed9ae62405071c63c.zip
Update LLVM to r98631.
Notes
Notes: svn path=/vendor/llvm/dist/; revision=205218
Diffstat (limited to 'lib/Target/ARM/ARMConstantIslandPass.cpp')
-rw-r--r--lib/Target/ARM/ARMConstantIslandPass.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/lib/Target/ARM/ARMConstantIslandPass.cpp b/lib/Target/ARM/ARMConstantIslandPass.cpp
index 8fa3c04b6c4d..1c5bd42d63da 100644
--- a/lib/Target/ARM/ARMConstantIslandPass.cpp
+++ b/lib/Target/ARM/ARMConstantIslandPass.cpp
@@ -1473,11 +1473,10 @@ bool ARMConstantIslands::UndoLRSpillRestore() {
bool MadeChange = false;
for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
MachineInstr *MI = PushPopMIs[i];
- // First two operands are predicates, the third is a zero since there
- // is no writeback.
+ // First two operands are predicates.
if (MI->getOpcode() == ARM::tPOP_RET &&
- MI->getOperand(3).getReg() == ARM::PC &&
- MI->getNumExplicitOperands() == 4) {
+ MI->getOperand(2).getReg() == ARM::PC &&
+ MI->getNumExplicitOperands() == 3) {
BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET));
MI->eraseFromParent();
MadeChange = true;