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| author | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
| commit | 044eb2f6afba375a914ac9d8024f8f5142bb912e (patch) | |
| tree | 1475247dc9f9fe5be155ebd4c9069c75aadf8c20 /lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | |
| parent | eb70dddbd77e120e5d490bd8fbe7ff3f8fa81c6b (diff) | |
| download | src-044eb2f6afba375a914ac9d8024f8f5142bb912e.tar.gz src-044eb2f6afba375a914ac9d8024f8f5142bb912e.zip | |
Vendor import of llvm trunk r321017:vendor/llvm/llvm-trunk-r321017
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=326938
svn path=/vendor/llvm/llvm-trunk-r321017/; revision=326939; tag=vendor/llvm/llvm-trunk-r321017
Diffstat (limited to 'lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp')
| -rw-r--r-- | lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp index a77df7a2598f..1cb9dd44f789 100644 --- a/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp +++ b/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp @@ -12,7 +12,6 @@ #include "MCTargetDesc/ARMAsmBackendDarwin.h" #include "MCTargetDesc/ARMAsmBackendELF.h" #include "MCTargetDesc/ARMAsmBackendWinCOFF.h" -#include "MCTargetDesc/ARMBaseInfo.h" #include "MCTargetDesc/ARMFixupKinds.h" #include "MCTargetDesc/ARMMCTargetDesc.h" #include "llvm/ADT/StringSwitch.h" @@ -25,7 +24,6 @@ #include "llvm/MC/MCELFObjectWriter.h" #include "llvm/MC/MCExpr.h" #include "llvm/MC/MCFixupKindInfo.h" -#include "llvm/MC/MCMachObjectWriter.h" #include "llvm/MC/MCObjectWriter.h" #include "llvm/MC/MCRegisterInfo.h" #include "llvm/MC/MCSectionELF.h" @@ -1127,30 +1125,30 @@ uint32_t ARMAsmBackendDarwin::generateCompactUnwindEncoding( } static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) { - unsigned AK = ARM::parseArch(Arch); + ARM::ArchKind AK = ARM::parseArch(Arch); switch (AK) { default: return MachO::CPU_SUBTYPE_ARM_V7; - case ARM::AK_ARMV4T: + case ARM::ArchKind::ARMV4T: return MachO::CPU_SUBTYPE_ARM_V4T; - case ARM::AK_ARMV5T: - case ARM::AK_ARMV5TE: - case ARM::AK_ARMV5TEJ: + case ARM::ArchKind::ARMV5T: + case ARM::ArchKind::ARMV5TE: + case ARM::ArchKind::ARMV5TEJ: return MachO::CPU_SUBTYPE_ARM_V5; - case ARM::AK_ARMV6: - case ARM::AK_ARMV6K: + case ARM::ArchKind::ARMV6: + case ARM::ArchKind::ARMV6K: return MachO::CPU_SUBTYPE_ARM_V6; - case ARM::AK_ARMV7A: + case ARM::ArchKind::ARMV7A: return MachO::CPU_SUBTYPE_ARM_V7; - case ARM::AK_ARMV7S: + case ARM::ArchKind::ARMV7S: return MachO::CPU_SUBTYPE_ARM_V7S; - case ARM::AK_ARMV7K: + case ARM::ArchKind::ARMV7K: return MachO::CPU_SUBTYPE_ARM_V7K; - case ARM::AK_ARMV6M: + case ARM::ArchKind::ARMV6M: return MachO::CPU_SUBTYPE_ARM_V6M; - case ARM::AK_ARMV7M: + case ARM::ArchKind::ARMV7M: return MachO::CPU_SUBTYPE_ARM_V7M; - case ARM::AK_ARMV7EM: + case ARM::ArchKind::ARMV7EM: return MachO::CPU_SUBTYPE_ARM_V7EM; } } |