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| author | Dimitry Andric <dim@FreeBSD.org> | 2012-12-02 13:10:19 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2012-12-02 13:10:19 +0000 |
| commit | 522600a229b950314b5f4af84eba4f3e8a0ffea1 (patch) | |
| tree | 32b4679ab4b8f28e5228daafc65e9dc436935353 /lib/Target/Hexagon/HexagonSchedule.td | |
| parent | 902a7b529820e6a0aa85f98f21afaeb1805a22f8 (diff) | |
| download | src-522600a229b950314b5f4af84eba4f3e8a0ffea1.tar.gz src-522600a229b950314b5f4af84eba4f3e8a0ffea1.zip | |
Vendor import of llvm release_32 branch r168974 (effectively, 3.2 RC2):vendor/llvm/llvm-release_32-r168974
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=243789
svn path=/vendor/llvm/llvm-release_32-r168974/; revision=243790; tag=vendor/llvm/llvm-release_32-r168974
Diffstat (limited to 'lib/Target/Hexagon/HexagonSchedule.td')
| -rw-r--r-- | lib/Target/Hexagon/HexagonSchedule.td | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/lib/Target/Hexagon/HexagonSchedule.td b/lib/Target/Hexagon/HexagonSchedule.td index d1076b8e4412..b5ff69a701cd 100644 --- a/lib/Target/Hexagon/HexagonSchedule.td +++ b/lib/Target/Hexagon/HexagonSchedule.td @@ -47,6 +47,7 @@ def HexagonModel : SchedMachineModel { // Max issue per cycle == bundle width. let IssueWidth = 4; let Itineraries = HexagonItineraries; + let LoadLatency = 1; } //===----------------------------------------------------------------------===// |