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authorEd Schouten <ed@FreeBSD.org>2010-10-21 19:02:02 +0000
committerEd Schouten <ed@FreeBSD.org>2010-10-21 19:02:02 +0000
commit217b614317dad692116a3a06fe94ea8f61a59edb (patch)
tree4cfe2eee875a959effca0881df14c079103447fa /lib/arm/floatunssidfvfp.S
downloadsrc-217b614317dad692116a3a06fe94ea8f61a59edb.tar.gz
src-217b614317dad692116a3a06fe94ea8f61a59edb.zip
Import compiler-rt r117047.vendor/compiler-rt/compiler-rt-r117047
Notes
Notes: svn path=/vendor/compiler-rt/dist/; revision=214152 svn path=/vendor/compiler-rt/compiler-rt-r117047/; revision=214153; tag=vendor/compiler-rt/compiler-rt-r117047
Diffstat (limited to 'lib/arm/floatunssidfvfp.S')
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1 files changed, 24 insertions, 0 deletions
diff --git a/lib/arm/floatunssidfvfp.S b/lib/arm/floatunssidfvfp.S
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+//===-- floatunssidfvfp.S - Implement floatunssidfvfp ---------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "../assembly.h"
+
+//
+// extern double __floatunssidfvfp(unsigned int a);
+//
+// Converts a 32-bit int to a double precision float.
+// Uses Darwin calling convention where a double precision result is
+// return in GPR register pair.
+//
+ .align 2
+DEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp)
+ fmsr s15, r0 // move int to float register s15
+ fuitod d7, s15 // convert 32-bit int in s15 to double in d7
+ fmrrd r0, r1, d7 // move d7 to result register pair r0/r1
+ bx lr