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author | Dimitry Andric <dim@FreeBSD.org> | 2021-07-29 20:15:26 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2021-07-29 20:15:26 +0000 |
commit | 344a3780b2e33f6ca763666c380202b18aab72a3 (patch) | |
tree | f0b203ee6eb71d7fdd792373e3c81eb18d6934dd /llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | |
parent | b60736ec1405bb0a8dd40989f67ef4c93da068ab (diff) | |
download | src-344a3780b2e33f6ca763666c380202b18aab72a3.tar.gz src-344a3780b2e33f6ca763666c380202b18aab72a3.zip |
Vendor import of llvm-project main 88e66fa60ae5, the last commit beforevendor/llvm-project/llvmorg-13-init-16847-g88e66fa60ae5vendor/llvm-project/llvmorg-12.0.1-rc2-0-ge7dac564cd0evendor/llvm-project/llvmorg-12.0.1-0-gfed41342a82f
the upstream release/13.x branch was created.
Diffstat (limited to 'llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp')
-rw-r--r-- | llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 61 |
1 files changed, 30 insertions, 31 deletions
diff --git a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp index 197fd3c7aa74..7631bb4bccfb 100644 --- a/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp +++ b/llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp @@ -294,6 +294,11 @@ public: return (unsigned) Imm.Val >> 1; } + unsigned getG8pReg() const { + assert(isEvenRegNumber() && "Invalid access!"); + return (unsigned)Imm.Val; + } + unsigned getCCReg() const { assert(isCCRegNumber() && "Invalid access!"); return (unsigned) (Kind == Immediate ? Imm.Val : Expr.CRVal); @@ -359,6 +364,15 @@ public: bool isS16ImmX4() const { return Kind == Expression || (Kind == Immediate && isInt<16>(getImm()) && (getImm() & 3) == 0); } + + bool isHashImmX8() const { + // The Hash Imm form is used for instructions that check or store a hash. + // These instructions have a small immediate range that spans between + // -8 and -512. + return (Kind == Immediate && getImm() <= -8 && getImm() >= -512 && + (getImm() & 7) == 0); + } + bool isS16ImmX16() const { return Kind == Expression || (Kind == Immediate && isInt<16>(getImm()) && (getImm() & 15) == 0); } @@ -423,6 +437,9 @@ public: && isUInt<5>(getExprCRVal())) || (Kind == Immediate && isUInt<5>(getImm())); } + + bool isEvenRegNumber() const { return isRegNumber() && (getImm() & 1) == 0; } + bool isCRBitMask() const { return Kind == Immediate && isUInt<8>(getImm()) && isPowerOf2_32(getImm()); } bool isATBitsAsHint() const { return false; } @@ -453,6 +470,11 @@ public: Inst.addOperand(MCOperand::createReg(XRegsNoX0[getReg()])); } + void addRegG8pRCOperands(MCInst &Inst, unsigned N) const { + assert(N == 1 && "Invalid number of operands!"); + Inst.addOperand(MCOperand::createReg(XRegs[getG8pReg()])); + } + void addRegGxRCOperands(MCInst &Inst, unsigned N) const { if (isPPC64()) addRegG8RCOperands(Inst, N); @@ -1132,29 +1154,6 @@ void PPCAsmParser::ProcessInstruction(MCInst &Inst, } break; } - case PPC::CP_COPYx: - case PPC::CP_COPY_FIRST: { - MCInst TmpInst; - TmpInst.setOpcode(PPC::CP_COPY); - TmpInst.addOperand(Inst.getOperand(0)); - TmpInst.addOperand(Inst.getOperand(1)); - TmpInst.addOperand(MCOperand::createImm(Opcode == PPC::CP_COPYx ? 0 : 1)); - - Inst = TmpInst; - break; - } - case PPC::CP_PASTEx : - case PPC::CP_PASTE_LAST: { - MCInst TmpInst; - TmpInst.setOpcode(Opcode == PPC::CP_PASTEx ? PPC::CP_PASTE - : PPC::CP_PASTE_rec); - TmpInst.addOperand(Inst.getOperand(0)); - TmpInst.addOperand(Inst.getOperand(1)); - TmpInst.addOperand(MCOperand::createImm(Opcode == PPC::CP_PASTEx ? 0 : 1)); - - Inst = TmpInst; - break; - } } } @@ -1208,28 +1207,28 @@ bool PPCAsmParser::MatchRegisterName(unsigned &RegNo, int64_t &IntVal) { return true; StringRef Name = getParser().getTok().getString(); - if (Name.equals_lower("lr")) { + if (Name.equals_insensitive("lr")) { RegNo = isPPC64() ? PPC::LR8 : PPC::LR; IntVal = 8; - } else if (Name.equals_lower("ctr")) { + } else if (Name.equals_insensitive("ctr")) { RegNo = isPPC64() ? PPC::CTR8 : PPC::CTR; IntVal = 9; - } else if (Name.equals_lower("vrsave")) { + } else if (Name.equals_insensitive("vrsave")) { RegNo = PPC::VRSAVE; IntVal = 256; - } else if (Name.startswith_lower("r") && + } else if (Name.startswith_insensitive("r") && !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { RegNo = isPPC64() ? XRegs[IntVal] : RRegs[IntVal]; - } else if (Name.startswith_lower("f") && + } else if (Name.startswith_insensitive("f") && !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { RegNo = FRegs[IntVal]; - } else if (Name.startswith_lower("vs") && + } else if (Name.startswith_insensitive("vs") && !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 64) { RegNo = VSRegs[IntVal]; - } else if (Name.startswith_lower("v") && + } else if (Name.startswith_insensitive("v") && !Name.substr(1).getAsInteger(10, IntVal) && IntVal < 32) { RegNo = VRegs[IntVal]; - } else if (Name.startswith_lower("cr") && + } else if (Name.startswith_insensitive("cr") && !Name.substr(2).getAsInteger(10, IntVal) && IntVal < 8) { RegNo = CRRegs[IntVal]; } else |