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author | Warner Losh <imp@FreeBSD.org> | 2015-02-27 22:16:54 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2015-02-27 22:16:54 +0000 |
commit | da75c2cc5808a45edc76752ba495dcc5dcd4346c (patch) | |
tree | 74a0899e9f467d761efca9e14d7d3213fb899de8 /src/arm/s3c2416.dtsi | |
parent | ab9104d36764981b663e037d0e48496993a070a4 (diff) | |
download | src-da75c2cc5808a45edc76752ba495dcc5dcd4346c.tar.gz src-da75c2cc5808a45edc76752ba495dcc5dcd4346c.zip |
Import from device-tree git://xenbits.xen.org/people/ianc/device-tree-rebasing.git @c8c1b3a77934768c7f7a4a9c10140c8bec529059vendor/device-tree/ian-c8c1b3a7
Notes
Notes:
svn path=/vendor/device-tree/dist/; revision=279377
svn path=/vendor/device-tree/ian-c8c1b3a7/; revision=279379; tag=vendor/device-tree/ian-c8c1b3a7
Diffstat (limited to 'src/arm/s3c2416.dtsi')
-rw-r--r-- | src/arm/s3c2416.dtsi | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/src/arm/s3c2416.dtsi b/src/arm/s3c2416.dtsi new file mode 100644 index 000000000000..30b8f7e47454 --- /dev/null +++ b/src/arm/s3c2416.dtsi @@ -0,0 +1,125 @@ +/* + * Samsung's S3C2416 SoC device tree source + * + * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <dt-bindings/clock/s3c2443.h> +#include "s3c24xx.dtsi" +#include "s3c2416-pinctrl.dtsi" + +/ { + model = "Samsung S3C2416 SoC"; + compatible = "samsung,s3c2416"; + + aliases { + serial3 = &uart3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu { + compatible = "arm,arm926ejs"; + }; + }; + + interrupt-controller@4a000000 { + compatible = "samsung,s3c2416-irq"; + }; + + clocks: clock-controller@0x4c000000 { + compatible = "samsung,s3c2416-clock"; + reg = <0x4c000000 0x40>; + #clock-cells = <1>; + }; + + pinctrl@56000000 { + compatible = "samsung,s3c2416-pinctrl"; + }; + + timer@51000000 { + clocks = <&clocks PCLK_PWM>; + clock-names = "timers"; + }; + + serial@50000000 { + compatible = "samsung,s3c2440-uart"; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>, + <&clocks SCLK_UART>; + }; + + serial@50004000 { + compatible = "samsung,s3c2440-uart"; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>, + <&clocks SCLK_UART>; + }; + + serial@50008000 { + compatible = "samsung,s3c2440-uart"; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>, + <&clocks SCLK_UART>; + }; + + uart3: serial@5000C000 { + compatible = "samsung,s3c2440-uart"; + reg = <0x5000C000 0x4000>; + interrupts = <1 18 24 4>, <1 18 25 4>; + clock-names = "uart", "clk_uart_baud2", + "clk_uart_baud3"; + clocks = <&clocks PCLK_UART3>, <&clocks PCLK_UART3>, + <&clocks SCLK_UART>; + status = "disabled"; + }; + + sdhci@4AC00000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4AC00000 0x100>; + interrupts = <0 0 21 3>; + clock-names = "hsmmc", "mmc_busclk.0", + "mmc_busclk.2"; + clocks = <&clocks HCLK_HSMMC0>, <&clocks HCLK_HSMMC0>, + <&clocks MUX_HSMMC0>; + status = "disabled"; + }; + + sdhci@4A800000 { + compatible = "samsung,s3c6410-sdhci"; + reg = <0x4A800000 0x100>; + interrupts = <0 0 20 3>; + clock-names = "hsmmc", "mmc_busclk.0", + "mmc_busclk.2"; + clocks = <&clocks HCLK_HSMMC1>, <&clocks HCLK_HSMMC1>, + <&clocks MUX_HSMMC1>; + status = "disabled"; + }; + + watchdog@53000000 { + interrupts = <1 9 27 3>; + clocks = <&clocks PCLK_WDT>; + clock-names = "watchdog"; + }; + + rtc@57000000 { + compatible = "samsung,s3c2416-rtc"; + clocks = <&clocks PCLK_RTC>; + clock-names = "rtc"; + }; + + i2c@54000000 { + compatible = "samsung,s3c2440-i2c"; + clocks = <&clocks PCLK_I2C0>; + clock-names = "i2c"; + }; +}; |