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authorAndrew Turner <andrew@FreeBSD.org>2021-12-17 09:33:57 +0000
committerAndrew Turner <andrew@FreeBSD.org>2021-12-20 13:58:13 +0000
commitc1381f07f61a66979f1569995f37f2a0413c0413 (patch)
treebcba77f009d9e47945d6d5f45ec1d10739d39dfd /stand/efi/loader/arch/arm64
parentcae1884d4791726f5acf5d64bba9a3583b63e38b (diff)
downloadsrc-c1381f07f61a66979f1569995f37f2a0413c0413.tar.gz
src-c1381f07f61a66979f1569995f37f2a0413c0413.zip
Don't sync the I/D caches when they are coherent
In the arm64 loader we need to syncronise the I and D caches. On some newer CPUs the I and D caches are coherent so we don't need to perform these operations. While here remove the arguments to cpu_inval_icache as they are unneeded. Reported by: cperciva Tested by: cperciva Sponsored by: Innovate UK
Diffstat (limited to 'stand/efi/loader/arch/arm64')
-rw-r--r--stand/efi/loader/arch/arm64/exec.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/stand/efi/loader/arch/arm64/exec.c b/stand/efi/loader/arch/arm64/exec.c
index 7783d46cd8e1..6cf4a4fd8e4d 100644
--- a/stand/efi/loader/arch/arm64/exec.c
+++ b/stand/efi/loader/arch/arm64/exec.c
@@ -128,7 +128,7 @@ elf64_exec(struct preloaded_file *fp)
clean_size = (vm_offset_t)efi_translate(kernendp) - clean_addr;
cpu_flush_dcache((void *)clean_addr, clean_size);
- cpu_inval_icache(NULL, 0);
+ cpu_inval_icache();
(*entry)(modulep);
panic("exec returned");