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| author | Ian Lepore <ian@FreeBSD.org> | 2015-10-19 19:18:02 +0000 |
|---|---|---|
| committer | Ian Lepore <ian@FreeBSD.org> | 2015-10-19 19:18:02 +0000 |
| commit | 935c21a18e5c215c5dafd2cc255cae1f549d461c (patch) | |
| tree | c7c0a44d2f398d381d8caa3301ed64550a3c330e /sys/arm/arm/cpufunc.c | |
| parent | d2a489eb1aaae1c79f22660d12fd29a3e99fd336 (diff) | |
| download | src-935c21a18e5c215c5dafd2cc255cae1f549d461c.tar.gz src-935c21a18e5c215c5dafd2cc255cae1f549d461c.zip | |
Set the correct values in the arm aux control register, based on chip type.
The bits in the aux control register vary based on the processor type. In
the past we've always just set the 'smp' and "broadcast tlb/cache ops' bits,
which worked fine for the first few SoCs we supported. Now that we support
most of the cortex-a series processors, it's important to get the right bits
set based on the processor type.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>
Notes
Notes:
svn path=/head/; revision=289602
Diffstat (limited to 'sys/arm/arm/cpufunc.c')
| -rw-r--r-- | sys/arm/arm/cpufunc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/arm/arm/cpufunc.c b/sys/arm/arm/cpufunc.c index fea0581a381f..734ee587abea 100644 --- a/sys/arm/arm/cpufunc.c +++ b/sys/arm/arm/cpufunc.c @@ -1294,7 +1294,7 @@ cortexa_setup(void) /* And again. */ cpu_idcache_wbinv_all(); -#ifdef SMP +#if defined(SMP) && !defined(ARM_NEW_PMAP) armv7_auxctrl((1 << 6) | (1 << 0), (1 << 6) | (1 << 0)); /* Enable SMP + TLB broadcasting */ #endif |