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authorAndriy Gapon <avg@FreeBSD.org>2021-06-09 09:10:50 +0000
committerAndriy Gapon <avg@FreeBSD.org>2021-11-06 17:51:50 +0000
commit507fdedd83cd7aca7f1b208e93e9128d7da02b11 (patch)
tree1422a959362bf06b092606109c7440136d51271b /sys/arm64/rockchip
parent69d202f22400c5b64331fbbcd37b66df8d265c64 (diff)
downloadsrc-507fdedd83cd7aca7f1b208e93e9128d7da02b11.tar.gz
src-507fdedd83cd7aca7f1b208e93e9128d7da02b11.zip
rk3328_codec: add delays between register writes in the initial setup
MFC after: 1 month
Diffstat (limited to 'sys/arm64/rockchip')
-rw-r--r--sys/arm64/rockchip/rk3328_codec.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/sys/arm64/rockchip/rk3328_codec.c b/sys/arm64/rockchip/rk3328_codec.c
index 22f36389e1c6..b00a61f58054 100644
--- a/sys/arm64/rockchip/rk3328_codec.c
+++ b/sys/arm64/rockchip/rk3328_codec.c
@@ -296,61 +296,77 @@ rkcodec_attach(device_t dev)
val = RKCODEC_READ(sc, CODEC_DAC_PWR_CTRL);
val |= DAC_PWR_CTRL_DAC_PWR;
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
+ DELAY(1000);
val |= DAC_PWR_CTRL_DACL_PATH_REFV |
DAC_PWR_CTRL_DACR_PATH_REFV;
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
+ DELAY(1000);
val |= DAC_PWR_CTRL_HPOUTL_ZERO_CROSSING |
DAC_PWR_CTRL_HPOUTR_ZERO_CROSSING;
RKCODEC_WRITE(sc, CODEC_DAC_PWR_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_HPOUT_POP_CTRL);
val |= HPOUT_POP_CTRL_HPOUTR_POP | HPOUT_POP_CTRL_HPOUTL_POP;
val &= ~(HPOUT_POP_CTRL_HPOUTR_POP_XCHARGE | HPOUT_POP_CTRL_HPOUTL_POP_XCHARGE);
RKCODEC_WRITE(sc, CODEC_HPOUT_POP_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_HPMIX_CTRL);
val |= HPMIX_CTRL_HPMIXL_EN | HPMIX_CTRL_HPMIXR_EN;
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
+ DELAY(1000);
val |= HPMIX_CTRL_HPMIXL_INIT_EN | HPMIX_CTRL_HPMIXR_INIT_EN;
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_HPOUT_CTRL);
val |= HPOUT_CTRL_HPOUTL_EN | HPOUT_CTRL_HPOUTR_EN;
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
+ DELAY(1000);
val |= HPOUT_CTRL_HPOUTL_INIT_EN | HPOUT_CTRL_HPOUTR_INIT_EN;
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_DAC_CLK_CTRL);
val |= DAC_CLK_CTRL_DACL_REFV_ON | DAC_CLK_CTRL_DACR_REFV_ON;
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
+ DELAY(1000);
val |= DAC_CLK_CTRL_DACL_CLK_ON | DAC_CLK_CTRL_DACR_CLK_ON;
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
+ DELAY(1000);
val |= DAC_CLK_CTRL_DACL_ON | DAC_CLK_CTRL_DACR_ON;
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
+ DELAY(1000);
val |= DAC_CLK_CTRL_DACL_INIT_ON | DAC_CLK_CTRL_DACR_INIT_ON;
RKCODEC_WRITE(sc, CODEC_DAC_CLK_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_DAC_SELECT);
val |= DAC_SELECT_DACL_SELECT | DAC_SELECT_DACR_SELECT;
RKCODEC_WRITE(sc, CODEC_DAC_SELECT, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_HPMIX_CTRL);
val |= HPMIX_CTRL_HPMIXL_INIT2_EN | HPMIX_CTRL_HPMIXR_INIT2_EN;
RKCODEC_WRITE(sc, CODEC_HPMIX_CTRL, val);
+ DELAY(1000);
val = RKCODEC_READ(sc, CODEC_HPOUT_CTRL);
val |= HPOUT_CTRL_HPOUTL_UNMUTE | HPOUT_CTRL_HPOUTR_UNMUTE;
RKCODEC_WRITE(sc, CODEC_HPOUT_CTRL, val);
+ DELAY(1000);
RKCODEC_WRITE(sc, CODEC_HPOUTL_GAIN_CTRL, 0x1f);
RKCODEC_WRITE(sc, CODEC_HPOUTR_GAIN_CTRL, 0x1f);
+ DELAY(1000);
rkcodec_set_mute(sc, false);