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authorAndrew Turner <andrew@FreeBSD.org>2022-10-18 16:37:43 +0000
committerAndrew Turner <andrew@FreeBSD.org>2022-10-27 16:05:46 +0000
commit7ddba690f8aea5cc0bd496cd7c8fabaf6ee9f4ef (patch)
tree9451b1cf0e557ee23c67f3e1d4c360a3e0259a52 /sys/arm64
parent60c96dbf20da7014c014e19c47b57c30b338bfe0 (diff)
downloadsrc-7ddba690f8aea5cc0bd496cd7c8fabaf6ee9f4ef.tar.gz
src-7ddba690f8aea5cc0bd496cd7c8fabaf6ee9f4ef.zip
Remove an unneeded cpu_dcache_wb_range from arm64
The cpu_dcache_wb_range function is an expensive function that is unneeded in ddb. It is used when the cache needs to be written to RAM, e.g. when working with a non-cache coherent device. Remove it as cpu_icache_sync_range already has the needed d-cache handling to ensure any changed memory is visible to the i-cache. Reviewed by: imp Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D37037
Diffstat (limited to 'sys/arm64')
-rw-r--r--sys/arm64/arm64/db_interface.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/sys/arm64/arm64/db_interface.c b/sys/arm64/arm64/db_interface.c
index dc0fa8ac5e1e..59f8132645ef 100644
--- a/sys/arm64/arm64/db_interface.c
+++ b/sys/arm64/arm64/db_interface.c
@@ -167,8 +167,10 @@ db_write_bytes(vm_offset_t addr, size_t size, char *data)
*dst++ = *data++;
dsb(ish);
- /* Clean D-cache and invalidate I-cache */
- cpu_dcache_wb_range(addr, (vm_size_t)size);
+ /*
+ * Ensure the I & D cache are in sync if we wrote
+ * to executable memory.
+ */
cpu_icache_sync_range(addr, (vm_size_t)size);
}
}