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authorEmmanuel Vadot <manu@FreeBSD.org>2021-07-24 15:44:18 +0000
committerEmmanuel Vadot <manu@FreeBSD.org>2021-07-24 15:46:25 +0000
commit12faeba9953ac7fa5198b258dcd80f89b3b4b947 (patch)
tree358ea07d80099711c2635e222575978264773e9e /sys/arm
parenta2e3e1187309f9404940b61ca49a93bd0536559d (diff)
downloadsrc-12faeba9953ac7fa5198b258dcd80f89b3b4b947.tar.gz
src-12faeba9953ac7fa5198b258dcd80f89b3b4b947.zip
allwinner: rsb: Set the PMIC to RSB mode
With recent ATF (v2.5) the PMIC is reset to I2C mode. Without a PMIC no regulators can be changed/enabled/disabled This fixes cpufreq on A64 (at least) and anything else that needs regulators handled by the PMIC. MFC after: 3 days Sponsored by: Diablotin Systems
Diffstat (limited to 'sys/arm')
-rw-r--r--sys/arm/allwinner/aw_rsb.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sys/arm/allwinner/aw_rsb.c b/sys/arm/allwinner/aw_rsb.c
index 48103af6ac6e..e6714107d7b4 100644
--- a/sys/arm/allwinner/aw_rsb.c
+++ b/sys/arm/allwinner/aw_rsb.c
@@ -71,6 +71,10 @@ __FBSDID("$FreeBSD$");
#define DLEN_READ (1 << 4)
#define RSB_DATA0 0x1c
#define RSB_DATA1 0x20
+#define RSB_PMCR 0x28
+#define RSB_PMCR_START (1 << 31)
+#define RSB_PMCR_DATA(x) (x << 16)
+#define RSB_PMCR_REG(x) (x << 8)
#define RSB_CMD 0x2c
#define CMD_SRTA 0xe8
#define CMD_RD8 0x8b
@@ -93,6 +97,10 @@ __FBSDID("$FreeBSD$");
#define RSB_ADDR_PMIC_SECONDARY 0x745
#define RSB_ADDR_PERIPH_IC 0xe89
+#define PMIC_MODE_REG 0x3e
+#define PMIC_MODE_I2C 0x00
+#define PMIC_MODE_RSB 0x7c
+
#define A31_P2WI 1
#define A23_RSB 2
@@ -436,6 +444,9 @@ rsb_attach(device_t dev)
goto fail;
}
+ /* Set the PMIC into RSB mode as ATF might have leave it in I2C mode */
+ RSB_WRITE(sc, RSB_PMCR, RSB_PMCR_REG(PMIC_MODE_REG) | RSB_PMCR_DATA(PMIC_MODE_RSB) | RSB_PMCR_START);
+
sc->iicbus = device_add_child(dev, "iicbus", -1);
if (sc->iicbus == NULL) {
device_printf(dev, "cannot add iicbus child device\n");